Re: [PATCH v5 08/10] dt-bindings: arm: Adds CoreSight TPDA hardware definitions

[Mike Leach <mike.leach@linaro.org>]

Hi

On Tue, 12 Apr 2022 at 13:51, Mao Jinlong <quic_jinlmao@quicinc.com> wrote:
>
> Adds new coresight-tpda.yaml file describing the bindings required
> to define tpda in the device trees.
>
> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
> ---
>  .../bindings/arm/coresight-tpda.yaml          | 119 ++++++++++++++++++
>  1 file changed, 119 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/coresight-tpda.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/coresight-tpda.yaml
> new file mode 100644
> index 000000000000..2c79de0a7928
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/coresight-tpda.yaml
> @@ -0,0 +1,119 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/coresight-tpda.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Trace, Profiling and Diagnostics Aggregator - TPDA
> +
> +description: |
> +  TPDAs are responsible for packetization and timestamping of data sets
> +  utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or
> +  more attached TPDM and pushing the resultant (packetized) data out a
> +  master ATB interface. Performing an arbitrated ATB interleaving (funneling)
> +  task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
> +
> +maintainers:
> +  - Suzuki K Poulose <suzuki.poulose@arm.com>
> +  - Mathieu Poirier <mathieu.poirier@linaro.org>
> +

as mentioned in patch 03 - these should be bindings maintainers.

with the above change

Reviewed by: Mike Leach <mike.leach@linaro.org>




> +properties:
> +  $nodename:
> +    pattern: "^tpda(@[0-9a-f]+)$"
> +  compatible:
> +    items:
> +      - const: qcom,coresight-tpda
> +      - const: arm,primecell
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: apb_pclk
> +
> +  in-ports:
> +    type: object
> +    description: |
> +      Input connections from TPDM to TPDA
> +    $ref: /schemas/graph.yaml#/properties/ports
> +
> +    properties:
> +      '#address-cells':
> +        const: 1
> +
> +      '#size-cells':
> +        const: 0
> +
> +    patternProperties:
> +      "^port@[0-9a-f]+$":
> +        type: object
> +        required:
> +          - reg
> +
> +    required:
> +      - '#size-cells'
> +      - '#address-cells'
> +
> +  out-ports:
> +    type: object
> +    description: |
> +      Output connections from the TPDA to legacy CoreSight trace bus.
> +    $ref: /schemas/graph.yaml#/properties/ports
> +
> +    properties:
> +     port:
> +       description:
> +         Output connection from the TPDA to legacy CoreSight Trace bus.
> +       $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> +    - compatible
> +    - reg
> +    - clocks
> +    - clock-names
> +    - in-ports
> +    - out-ports
> +
> +additionalProperties: false
> +
> +examples:
> +  # minimum tpda definition.
> +  - |
> +    tpda@6004000 {
> +       compatible = "qcom,coresight-tpda", "arm,primecell";
> +       reg = <0x6004000 0x1000>;
> +
> +       qcom,tpda-atid = <65>;
> +
> +       clocks = <&aoss_qmp>;
> +       clock-names = "apb_pclk";
> +
> +       in-ports {
> +         #address-cells = <1>;
> +         #size-cells = <0>;
> +
> +        port@0 {
> +          reg = <0>;
> +          tpda_qdss_0_in_tpdm_dcc: endpoint {
> +            remote-endpoint =
> +              <&tpdm_dcc_out_tpda_qdss_0>;
> +            };
> +        };
> +      };
> +
> +       out-ports {
> +         port {
> +                 tpda_qdss_out_funnel_in0: endpoint {
> +                    remote-endpoint =
> +                    <&funnel_in0_in_tpda_qdss>;
> +                  };
> +          };
> +       };
> +    };
> +
> +...
> --
> 2.17.1
>


--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK