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From: Guo Ren <guoren@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: anup@brainfault.org, paul.walmsley@sifive.com,
	palmer@dabbelt.com, conor.dooley@microchip.com, heiko@sntech.de,
	rostedt@goodmis.org, mhiramat@kernel.org, jolsa@redhat.com,
	bp@suse.de, jpoimboe@kernel.org, suagrfillet@gmail.com,
	andy.chiu@sifive.com, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 1/5] riscv: ftrace: Fixup panic by disabling preemption
Date: Thu, 24 Nov 2022 10:10:30 +0800	[thread overview]
Message-ID: <CAJF2gTRvSkXD+dmVGfObrKE6ZsJdQdcH1G-hRxmYsMSoMbm8vg@mail.gmail.com> (raw)
In-Reply-To: <Y359eOOrm/lpDHjt@spud>

On Thu, Nov 24, 2022 at 4:07 AM Conor Dooley <conor@kernel.org> wrote:
>
> On Wed, Nov 23, 2022 at 10:39:46AM -0500, guoren@kernel.org wrote:
> > From: Andy Chiu <andy.chiu@sifive.com>
> >
> > In RISCV, we must use an AUIPC + JALR pair to encode an immediate,
> > forming a jump that jumps to an address over 4K. This may cause errors
> > if we want to enable kernel preemption and remove dependency from
> > patching code with stop_machine(). For example, if a task was switched
> > out on auipc. And, if we changed the ftrace function before it was
> > switched back, then it would jump to an address that has updated 11:0
> > bits mixing with previous XLEN:12 part.
> >
> > p: patched area performed by dynamic ftrace
> > ftrace_prologue:
> > p|      REG_S   ra, -SZREG(sp)
> > p|      auipc   ra, 0x? ------------> preempted
> >                                       ...
> >                               change ftrace function
> >                                       ...
> > p|      jalr    -?(ra) <------------- switched back
> > p|      REG_L   ra, -SZREG(sp)
> > func:
> >       xxx
> >       ret
> >
> > Fixes: fc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
>
> ==========
> verify_fixes - FAILED
>
> Commit: be26b864dac9 ("riscv: ftrace: Fixup panic by disabling preemption")
>         Fixes tag: Fixes: fc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
>         Has these problem(s):
>                 - Target SHA1 does not exist
>
> This should instead be:
> Fixes: afc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
Thank you! Sorry, I missed the first letter :P

>
> Thanks,
> Conor.
>


-- 
Best Regards
 Guo Ren

WARNING: multiple messages have this Message-ID (diff)
From: Guo Ren <guoren@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: anup@brainfault.org, paul.walmsley@sifive.com,
	palmer@dabbelt.com,  conor.dooley@microchip.com, heiko@sntech.de,
	rostedt@goodmis.org,  mhiramat@kernel.org, jolsa@redhat.com,
	bp@suse.de, jpoimboe@kernel.org,  suagrfillet@gmail.com,
	andy.chiu@sifive.com, linux-riscv@lists.infradead.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 1/5] riscv: ftrace: Fixup panic by disabling preemption
Date: Thu, 24 Nov 2022 10:10:30 +0800	[thread overview]
Message-ID: <CAJF2gTRvSkXD+dmVGfObrKE6ZsJdQdcH1G-hRxmYsMSoMbm8vg@mail.gmail.com> (raw)
In-Reply-To: <Y359eOOrm/lpDHjt@spud>

On Thu, Nov 24, 2022 at 4:07 AM Conor Dooley <conor@kernel.org> wrote:
>
> On Wed, Nov 23, 2022 at 10:39:46AM -0500, guoren@kernel.org wrote:
> > From: Andy Chiu <andy.chiu@sifive.com>
> >
> > In RISCV, we must use an AUIPC + JALR pair to encode an immediate,
> > forming a jump that jumps to an address over 4K. This may cause errors
> > if we want to enable kernel preemption and remove dependency from
> > patching code with stop_machine(). For example, if a task was switched
> > out on auipc. And, if we changed the ftrace function before it was
> > switched back, then it would jump to an address that has updated 11:0
> > bits mixing with previous XLEN:12 part.
> >
> > p: patched area performed by dynamic ftrace
> > ftrace_prologue:
> > p|      REG_S   ra, -SZREG(sp)
> > p|      auipc   ra, 0x? ------------> preempted
> >                                       ...
> >                               change ftrace function
> >                                       ...
> > p|      jalr    -?(ra) <------------- switched back
> > p|      REG_L   ra, -SZREG(sp)
> > func:
> >       xxx
> >       ret
> >
> > Fixes: fc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
>
> ==========
> verify_fixes - FAILED
>
> Commit: be26b864dac9 ("riscv: ftrace: Fixup panic by disabling preemption")
>         Fixes tag: Fixes: fc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
>         Has these problem(s):
>                 - Target SHA1 does not exist
>
> This should instead be:
> Fixes: afc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
Thank you! Sorry, I missed the first letter :P

>
> Thanks,
> Conor.
>


-- 
Best Regards
 Guo Ren

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  reply	other threads:[~2022-11-24  2:10 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-23 15:39 [PATCH V3 0/5] riscv: ftrace: Fixup ftrace detour code & Optimization guoren
2022-11-23 15:39 ` guoren
2022-11-23 15:39 ` [PATCH V3 1/5] riscv: ftrace: Fixup panic by disabling preemption guoren
2022-11-23 15:39   ` guoren
2022-11-23 20:07   ` Conor Dooley
2022-11-23 20:07     ` Conor Dooley
2022-11-24  2:10     ` Guo Ren [this message]
2022-11-24  2:10       ` Guo Ren
2022-11-23 15:39 ` [PATCH V3 2/5] riscv: ftrace: Remove wasted nops for !RISCV_ISA_C guoren
2022-11-23 15:39   ` guoren
2022-11-23 15:39 ` [PATCH V3 3/5] riscv: ftrace: Reduce the detour code size to half guoren
2022-11-23 15:39   ` guoren
2022-11-23 20:00   ` Conor Dooley
2022-11-23 20:00     ` Conor Dooley
2022-11-24  2:11     ` Guo Ren
2022-11-24  2:11       ` Guo Ren
2022-11-23 15:39 ` [PATCH V3 4/5] riscv: ftrace: Add ftrace_graph_func guoren
2022-11-23 15:39   ` guoren
2022-11-23 15:39 ` [PATCH V3 5/5] riscv: ftrace: Make ftrace_caller call ftrace_graph_func guoren
2022-11-23 15:39   ` guoren

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