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From: Guo Ren <guoren@kernel.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: "Anup Patel" <anup.patel@wdc.com>,
	"Atish Patra" <atish.patra@wdc.com>,
	"Palmer Dabbelt" <palmerdabbelt@google.com>,
	"Christoph Müllner" <christoph.muellner@vrull.eu>,
	philipp.tomsich@vrull.eu, "Christoph Hellwig" <hch@lst.de>,
	liush <liush@allwinnertech.com>,
	wefu@redhat.com, "Wei Wu (吴伟)" <lazyparser@gmail.com>,
	"Drew Fustini" <drew@beagleboard.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
	heinrich.schuchardt@canonical.com, gordan.markus@canonical.com,
	"Guo Ren" <guoren@linux.alibaba.com>,
	"Chen-Yu Tsai" <wens@csie.org>
Subject: Re: [RFC PATCH V4 6/6] riscv: soc: Add Allwinner SoC kconfig option
Date: Mon, 13 Sep 2021 17:20:25 +0800	[thread overview]
Message-ID: <CAJF2gTT_8VLTt0B=LxXAPWVpHaBaVxy+V0rGCjr7JZyRiO7LfQ@mail.gmail.com> (raw)
In-Reply-To: <20210913084520.kkbsupogkzv226x3@gilmour>

On Mon, Sep 13, 2021 at 4:45 PM Maxime Ripard <maxime@cerno.tech> wrote:
>
> Hi,
>
> On Sat, Sep 11, 2021 at 05:21:39PM +0800, guoren@kernel.org wrote:
> > From: Liu Shaohua <liush@allwinnertech.com>
> >
> > Add Allwinner kconfig option which selects SoC specific and common
> > drivers that is required for this SoC.
> >
> > Allwinner D1 uses custom PTE attributes to solve non-coherency SOC
> > interconnect issues for dma synchronization, so we set the default
> > value when SOC_SUNXI selected.
> >
> > Signed-off-by: Liu Shaohua <liush@allwinnertech.com>
> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > Signed-off-by: Wei Fu <wefu@redhat.com>
> > Cc: Anup Patel <anup.patel@wdc.com>
> > Cc: Atish Patra <atish.patra@wdc.com>
> > Cc: Christoph Hellwig <hch@lst.de>
> > Cc: Chen-Yu Tsai <wens@csie.org>
> > Cc: Drew Fustini <drew@beagleboard.org>
> > Cc: Maxime Ripard <maxime@cerno.tech>
> > Cc: Palmer Dabbelt <palmerdabbelt@google.com>
> > Cc: Wei Wu <lazyparser@gmail.com>
> > ---
> >  arch/riscv/Kconfig.socs      | 15 +++++++++++++++
> >  arch/riscv/configs/defconfig |  1 +
> >  2 files changed, 16 insertions(+)
> >
> > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > index 30676ebb16eb..8721c000ef23 100644
> > --- a/arch/riscv/Kconfig.socs
> > +++ b/arch/riscv/Kconfig.socs
> > @@ -70,4 +70,19 @@ config SOC_CANAAN_K210_DTB_SOURCE
> >
> >  endif
> >
> > +config SOC_SUNXI
> > +     bool "Allwinner SoCs"
> > +     depends on MMU
> > +     select DWMAC_GENERIC
> > +     select ERRATA_THEAD
> > +     select RISCV_DMA_NONCOHERENT
> > +     select RISCV_ERRATA_ALTERNATIVE
> > +     select SERIAL_8250
> > +     select SERIAL_8250_CONSOLE
> > +     select SERIAL_8250_DW
> > +     select SIFIVE_PLIC
> > +     select STMMAC_ETH
> > +     help
> > +       This enables support for Allwinner SoC platforms like the D1.
> > +
>
> I'm not sure we should select the drivers there. We could very well
> imagine a board without UART, or even more so without ethernet.
We just want people could bring D1 up easier, 8250 is the basic component.


>
> These options should be in the defconfig.
>
> Maxime



--
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

WARNING: multiple messages have this Message-ID (diff)
From: Guo Ren <guoren@kernel.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: "Anup Patel" <anup.patel@wdc.com>,
	"Atish Patra" <atish.patra@wdc.com>,
	"Palmer Dabbelt" <palmerdabbelt@google.com>,
	"Christoph Müllner" <christoph.muellner@vrull.eu>,
	philipp.tomsich@vrull.eu, "Christoph Hellwig" <hch@lst.de>,
	liush <liush@allwinnertech.com>,
	wefu@redhat.com, "Wei Wu (吴伟)" <lazyparser@gmail.com>,
	"Drew Fustini" <drew@beagleboard.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
	heinrich.schuchardt@canonical.com, gordan.markus@canonical.com,
	"Guo Ren" <guoren@linux.alibaba.com>,
	"Chen-Yu Tsai" <wens@csie.org>
Subject: Re: [RFC PATCH V4 6/6] riscv: soc: Add Allwinner SoC kconfig option
Date: Mon, 13 Sep 2021 17:20:25 +0800	[thread overview]
Message-ID: <CAJF2gTT_8VLTt0B=LxXAPWVpHaBaVxy+V0rGCjr7JZyRiO7LfQ@mail.gmail.com> (raw)
In-Reply-To: <20210913084520.kkbsupogkzv226x3@gilmour>

On Mon, Sep 13, 2021 at 4:45 PM Maxime Ripard <maxime@cerno.tech> wrote:
>
> Hi,
>
> On Sat, Sep 11, 2021 at 05:21:39PM +0800, guoren@kernel.org wrote:
> > From: Liu Shaohua <liush@allwinnertech.com>
> >
> > Add Allwinner kconfig option which selects SoC specific and common
> > drivers that is required for this SoC.
> >
> > Allwinner D1 uses custom PTE attributes to solve non-coherency SOC
> > interconnect issues for dma synchronization, so we set the default
> > value when SOC_SUNXI selected.
> >
> > Signed-off-by: Liu Shaohua <liush@allwinnertech.com>
> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > Signed-off-by: Wei Fu <wefu@redhat.com>
> > Cc: Anup Patel <anup.patel@wdc.com>
> > Cc: Atish Patra <atish.patra@wdc.com>
> > Cc: Christoph Hellwig <hch@lst.de>
> > Cc: Chen-Yu Tsai <wens@csie.org>
> > Cc: Drew Fustini <drew@beagleboard.org>
> > Cc: Maxime Ripard <maxime@cerno.tech>
> > Cc: Palmer Dabbelt <palmerdabbelt@google.com>
> > Cc: Wei Wu <lazyparser@gmail.com>
> > ---
> >  arch/riscv/Kconfig.socs      | 15 +++++++++++++++
> >  arch/riscv/configs/defconfig |  1 +
> >  2 files changed, 16 insertions(+)
> >
> > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > index 30676ebb16eb..8721c000ef23 100644
> > --- a/arch/riscv/Kconfig.socs
> > +++ b/arch/riscv/Kconfig.socs
> > @@ -70,4 +70,19 @@ config SOC_CANAAN_K210_DTB_SOURCE
> >
> >  endif
> >
> > +config SOC_SUNXI
> > +     bool "Allwinner SoCs"
> > +     depends on MMU
> > +     select DWMAC_GENERIC
> > +     select ERRATA_THEAD
> > +     select RISCV_DMA_NONCOHERENT
> > +     select RISCV_ERRATA_ALTERNATIVE
> > +     select SERIAL_8250
> > +     select SERIAL_8250_CONSOLE
> > +     select SERIAL_8250_DW
> > +     select SIFIVE_PLIC
> > +     select STMMAC_ETH
> > +     help
> > +       This enables support for Allwinner SoC platforms like the D1.
> > +
>
> I'm not sure we should select the drivers there. We could very well
> imagine a board without UART, or even more so without ethernet.
We just want people could bring D1 up easier, 8250 is the basic component.


>
> These options should be in the defconfig.
>
> Maxime



--
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-09-13  9:20 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-11  9:21 [RFC PATCH V4 0/6] riscv: Add PBMT & DMA for D1 bringup guoren
2021-09-11  9:21 ` guoren
2021-09-11  9:21 ` [RFC PATCH V4 1/6] riscv: pgtable: Add custom protection_map init guoren
2021-09-11  9:21   ` guoren
2021-09-15  7:45   ` Christoph Hellwig
2021-09-15  7:45     ` Christoph Hellwig
2021-09-15 23:52     ` Guo Ren
2021-09-15 23:52       ` Guo Ren
2021-09-11  9:21 ` [RFC PATCH V4 2/6] riscv: errata: pgtable: Add custom Svpbmt supported for Allwinner D1 guoren
2021-09-11  9:21   ` guoren
2021-09-15  7:47   ` Christoph Hellwig
2021-09-15  7:47     ` Christoph Hellwig
2021-09-16  0:48     ` Guo Ren
2021-09-16  0:48       ` Guo Ren
2021-09-16  7:31   ` Atish Patra
2021-09-16  7:31     ` Atish Patra
2021-09-11  9:21 ` [RFC PATCH V4 3/6] RISC-V: Support a new config option for non-coherent DMA guoren
2021-09-11  9:21   ` guoren
2021-09-15  7:48   ` Christoph Hellwig
2021-09-15  7:48     ` Christoph Hellwig
2021-09-16  1:20     ` Guo Ren
2021-09-16  1:20       ` Guo Ren
2021-09-16  4:39       ` Atish Patra
2021-09-16  4:39         ` Atish Patra
2021-09-16  6:09         ` Guo Ren
2021-09-16  6:09           ` Guo Ren
2021-09-11  9:21 ` [RFC PATCH V4 4/6] RISC-V: Implement arch_sync_dma* functions guoren
2021-09-11  9:21   ` guoren
2021-09-15  7:50   ` Christoph Hellwig
2021-09-15  7:50     ` Christoph Hellwig
2021-09-16  1:32     ` Guo Ren
2021-09-16  1:32       ` Guo Ren
2021-09-16  4:24       ` Anup Patel
2021-09-16  4:24         ` Anup Patel
2021-09-16  4:42         ` Atish Patra
2021-09-16  4:42           ` Atish Patra
2021-09-11  9:21 ` [RFC PATCH V4 5/6] riscv: errata: Support T-HEAD custom dcache ops guoren
2021-09-11  9:21   ` guoren
2021-09-11  9:21 ` [RFC PATCH V4 6/6] riscv: soc: Add Allwinner SoC kconfig option guoren
2021-09-11  9:21   ` guoren
2021-09-13  8:45   ` Maxime Ripard
2021-09-13  8:45     ` Maxime Ripard
2021-09-13  9:20     ` Guo Ren [this message]
2021-09-13  9:20       ` Guo Ren
2021-09-13 18:48       ` Randy Dunlap
2021-09-13 18:48         ` Randy Dunlap
2021-09-14  2:34         ` Guo Ren
2021-09-14  2:34           ` Guo Ren
2021-09-14  3:06           ` Randy Dunlap
2021-09-14  3:06             ` Randy Dunlap
2021-09-14  5:16             ` Anup Patel
2021-09-14  5:16               ` Anup Patel
2021-09-14  5:20               ` Randy Dunlap
2021-09-14  5:20                 ` Randy Dunlap
2021-09-14  9:29           ` Arnd Bergmann
2021-09-14  9:29             ` Arnd Bergmann
2021-09-14 10:07             ` Krzysztof Kozlowski
2021-09-14 10:07               ` Krzysztof Kozlowski
2021-09-14 10:13               ` Maxime Ripard
2021-09-14 10:13                 ` Maxime Ripard
2021-09-14 12:09                 ` Krzysztof Kozlowski
2021-09-14 12:09                   ` Krzysztof Kozlowski
2021-09-14 13:02                   ` Arnd Bergmann
2021-09-14 13:02                     ` Arnd Bergmann
2021-09-16  6:37             ` Guo Ren
2021-09-16  6:37               ` Guo Ren
2021-09-14  3:49     ` Heinrich Schuchardt
2021-09-14  3:49       ` Heinrich Schuchardt
2021-09-14  5:16       ` Samuel Holland
2021-09-14  5:16         ` Samuel Holland
2021-09-14  6:30         ` Heinrich Schuchardt
2021-09-14  6:30           ` Heinrich Schuchardt
2021-09-14  7:20       ` Maxime Ripard
2021-09-14  7:20         ` Maxime Ripard
2021-09-14  9:26     ` Ben Dooks
2021-09-14  9:26       ` Ben Dooks

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