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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Pankaj Dubey <pankaj.dubey@samsung.com>
Cc: linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, arnd@arndb.de,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	kgene@kernel.org, m.reichl@fivetechno.de, a.hajda@samsung.com,
	cwchoi00@gmail.com,
	Javier Martinez Canillas <javier@osg.samsung.com>
Subject: Re: [PATCH v9 09/12] ARM: EXYNOS: introduce exynos_cpu_info struct
Date: Fri, 7 Apr 2017 12:41:44 +0200	[thread overview]
Message-ID: <CAJKOXPdWo_3Og-NuPRnzC3FgF2mGZup6+BC1_=9CUW-3dTz99w@mail.gmail.com> (raw)
In-Reply-To: <1490879826-16754-10-git-send-email-pankaj.dubey@samsung.com>

On Thu, Mar 30, 2017 at 3:17 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
> Various Exynos SoC has different CPU related information, such as CPU
> boot register, programming sequence making CPU up/down. Currently this
> is handled by adding lots of soc_is_exynosMMM checks in the code, in
> an attempt to remove the dependency of such helper functions specific to
> each SoC, let's separate this information pertaining to CPU by introducing
> a new "struct exynos_cpu_info". This struct will contain differences
> associated with CPU on various Exynos SoC. This can be matched by using
> generic API "soc_device_match".
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
>  arch/arm/mach-exynos/platsmp.c | 146 +++++++++++++++++++++++++++++++++++++----
>  1 file changed, 135 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index cb6d199..ff369b9 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -19,6 +19,7 @@
>  #include <linux/smp.h>
>  #include <linux/io.h>
>  #include <linux/of_address.h>
> +#include <linux/sys_soc.h>
>  #include <linux/soc/samsung/exynos-regs-pmu.h>
>
>  #include <asm/cacheflush.h>
> @@ -33,6 +34,16 @@
>
>  extern void exynos4_secondary_startup(void);
>
> +/*
> + * struct exynos_cpu_info - Exynos CPU related info/operations
> + * @cpu_boot_reg: computes cpu boot address for requested cpu
> + */
> +struct exynos_cpu_info {
> +       void __iomem* (*cpu_boot_reg)(u32 cpu);
> +};

Beside Marek comments, I think we are getting too many structures for
differentiating Exynos. Actually all of them describe the same -
difference between Exynos revisions. Having many separate structures
means that you have to initialize all of them in different places in
different (probably) order. The good benefit is however making them
local (static) so the scope is limited... but anyway I dislike the
duplication.

How about combining all of them into one (except the firmware which
has its own register function):

struct exynos_revision_data {
void __iomem* (*boot_vector_addr)(void);
void __iomem* (*boot_vector_flag)(void);
void (*enter_aftr)(void);
void __iomem* (*cpu_boot_reg)(u32 cpu);
void (*cpu_power_down)(u32 cpu);
void (*cpu_power_up)(u32 cpu);
};

Best regards,
Krzysztof


> +
> +static const struct exynos_cpu_info *cpu_info;
> +
>  #ifdef CONFIG_HOTPLUG_CPU
>  static inline void cpu_leave_lowpower(u32 core_id)
>  {
> @@ -168,27 +179,57 @@ int exynos_cluster_power_state(int cluster)
>                 S5P_CORE_LOCAL_PWR_EN);
>  }
>
> -static void __iomem *cpu_boot_reg_base(void)
> +static void __iomem *exynos4210_rev11_cpu_boot_reg(u32 cpu)
>  {
> -       if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
> -               return pmu_base_addr + S5P_INFORM5;
> -       return sysram_base_addr;
> +       void __iomem *boot_reg = pmu_base_addr;
> +
> +       if (!boot_reg)
> +               return IOMEM_ERR_PTR(-ENODEV);
> +
> +       boot_reg += S5P_INFORM5;
> +
> +       return boot_reg;
>  }
>
> -static inline void __iomem *cpu_boot_reg(int cpu)
> +static void __iomem *exynos4412_cpu_boot_reg(u32 cpu)
>  {
> -       void __iomem *boot_reg;
> +       void __iomem *boot_reg = sysram_base_addr;
>
> -       boot_reg = cpu_boot_reg_base();
>         if (!boot_reg)
>                 return IOMEM_ERR_PTR(-ENODEV);
> -       if (soc_is_exynos4412())
> -               boot_reg += 4*cpu;
> -       else if (soc_is_exynos5420() || soc_is_exynos5800())
> -               boot_reg += 4;
> +
> +       boot_reg += 4*cpu;
> +
>         return boot_reg;
>  }
>
> +static void __iomem *exynos5420_cpu_boot_reg(u32 cpu)
> +{
> +       void __iomem *boot_reg = sysram_base_addr;
> +
> +       if (!sysram_base_addr)
> +               return IOMEM_ERR_PTR(-ENODEV);
> +
> +       boot_reg += 4;
> +
> +       return boot_reg;
> +}
> +
> +static void __iomem *exynos_common_cpu_boot_reg(u32 cpu)
> +{
> +       if (!sysram_base_addr)
> +               return IOMEM_ERR_PTR(-ENODEV);
> +
> +       return sysram_base_addr;
> +}
> +
> +static inline void __iomem *cpu_boot_reg(int cpu)
> +{
> +       if (cpu_info && cpu_info->cpu_boot_reg)
> +               return cpu_info->cpu_boot_reg(cpu);
> +       return NULL;
> +}
> +
>  /*
>   * Set wake up by local power mode and execute software reset for given core.
>   *
> @@ -296,13 +337,84 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr)
>         return ret;
>  }
>
> +static const struct exynos_cpu_info exynos3250_cpu_info = {
> +       .cpu_boot_reg = exynos_common_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos5420_cpu_info = {
> +       .cpu_boot_reg = exynos5420_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos4210_rev11_cpu_info = {
> +       .cpu_boot_reg = exynos4210_rev11_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos4412_cpu_info = {
> +       .cpu_boot_reg = exynos4412_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos_common_cpu_info = {
> +       .cpu_boot_reg = exynos_common_cpu_boot_reg,
> +};
> +
> +static const struct soc_device_attribute exynos_soc_revision[] = {
> +       {
> +               .soc_id = "EXYNOS4210",
> +               .revision = "11",
> +               .data = &exynos4210_rev11_cpu_info
> +       }, {
> +               .soc_id = "EXYNOS4210",
> +               .revision = "10",
> +               .data = &exynos_common_cpu_info
> +       }
> +};
> +
> +static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
> +       {
> +               .compatible = "samsung,exynos3250",
> +               .data = &exynos3250_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos4212",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos4412",
> +               .data = &exynos4412_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5250",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5260",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5410",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5420",
> +               .data = &exynos5420_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5440",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5800",
> +               .data = &exynos5420_cpu_info
> +       },
> +       { /*sentinel*/ },
> +};
> +
>  static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
>  {
>         unsigned long timeout;
> +       const struct soc_device_attribute *match;
>         u32 mpidr = cpu_logical_map(cpu);
>         u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
>         int ret = -ENOSYS;
>
> +       if (of_machine_is_compatible("samsung,exynos4210")) {
> +               match = soc_device_match(exynos_soc_revision);
> +               if (match)
> +                       cpu_info = (const struct exynos_cpu_info *) match->data;
> +       }
> +
>         /*
>          * Set synchronisation state between this boot processor
>          * and the secondary one
> @@ -387,6 +499,18 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
>
>  static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
>  {
> +       const struct of_device_id *match;
> +       struct device_node *np;
> +
> +       if (!of_machine_is_compatible("samsung,exynos4210")) {
> +               np = of_find_matching_node_and_match(NULL,
> +                               exynos_pmu_of_device_ids, &match);
> +               if (!np)
> +                       pr_err("failed to find supported CPU\n");
> +               else
> +                       cpu_info = (const struct exynos_cpu_info *) match->data;
> +       }
> +
>         exynos_sysram_init();
>
>         exynos_set_delayed_reset_assertion(true);
> --
> 2.7.4
>

WARNING: multiple messages have this Message-ID (diff)
From: krzk@kernel.org (Krzysztof Kozlowski)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 09/12] ARM: EXYNOS: introduce exynos_cpu_info struct
Date: Fri, 7 Apr 2017 12:41:44 +0200	[thread overview]
Message-ID: <CAJKOXPdWo_3Og-NuPRnzC3FgF2mGZup6+BC1_=9CUW-3dTz99w@mail.gmail.com> (raw)
In-Reply-To: <1490879826-16754-10-git-send-email-pankaj.dubey@samsung.com>

On Thu, Mar 30, 2017 at 3:17 PM, Pankaj Dubey <pankaj.dubey@samsung.com> wrote:
> Various Exynos SoC has different CPU related information, such as CPU
> boot register, programming sequence making CPU up/down. Currently this
> is handled by adding lots of soc_is_exynosMMM checks in the code, in
> an attempt to remove the dependency of such helper functions specific to
> each SoC, let's separate this information pertaining to CPU by introducing
> a new "struct exynos_cpu_info". This struct will contain differences
> associated with CPU on various Exynos SoC. This can be matched by using
> generic API "soc_device_match".
>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> ---
>  arch/arm/mach-exynos/platsmp.c | 146 +++++++++++++++++++++++++++++++++++++----
>  1 file changed, 135 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index cb6d199..ff369b9 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -19,6 +19,7 @@
>  #include <linux/smp.h>
>  #include <linux/io.h>
>  #include <linux/of_address.h>
> +#include <linux/sys_soc.h>
>  #include <linux/soc/samsung/exynos-regs-pmu.h>
>
>  #include <asm/cacheflush.h>
> @@ -33,6 +34,16 @@
>
>  extern void exynos4_secondary_startup(void);
>
> +/*
> + * struct exynos_cpu_info - Exynos CPU related info/operations
> + * @cpu_boot_reg: computes cpu boot address for requested cpu
> + */
> +struct exynos_cpu_info {
> +       void __iomem* (*cpu_boot_reg)(u32 cpu);
> +};

Beside Marek comments, I think we are getting too many structures for
differentiating Exynos. Actually all of them describe the same -
difference between Exynos revisions. Having many separate structures
means that you have to initialize all of them in different places in
different (probably) order. The good benefit is however making them
local (static) so the scope is limited... but anyway I dislike the
duplication.

How about combining all of them into one (except the firmware which
has its own register function):

struct exynos_revision_data {
void __iomem* (*boot_vector_addr)(void);
void __iomem* (*boot_vector_flag)(void);
void (*enter_aftr)(void);
void __iomem* (*cpu_boot_reg)(u32 cpu);
void (*cpu_power_down)(u32 cpu);
void (*cpu_power_up)(u32 cpu);
};

Best regards,
Krzysztof


> +
> +static const struct exynos_cpu_info *cpu_info;
> +
>  #ifdef CONFIG_HOTPLUG_CPU
>  static inline void cpu_leave_lowpower(u32 core_id)
>  {
> @@ -168,27 +179,57 @@ int exynos_cluster_power_state(int cluster)
>                 S5P_CORE_LOCAL_PWR_EN);
>  }
>
> -static void __iomem *cpu_boot_reg_base(void)
> +static void __iomem *exynos4210_rev11_cpu_boot_reg(u32 cpu)
>  {
> -       if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
> -               return pmu_base_addr + S5P_INFORM5;
> -       return sysram_base_addr;
> +       void __iomem *boot_reg = pmu_base_addr;
> +
> +       if (!boot_reg)
> +               return IOMEM_ERR_PTR(-ENODEV);
> +
> +       boot_reg += S5P_INFORM5;
> +
> +       return boot_reg;
>  }
>
> -static inline void __iomem *cpu_boot_reg(int cpu)
> +static void __iomem *exynos4412_cpu_boot_reg(u32 cpu)
>  {
> -       void __iomem *boot_reg;
> +       void __iomem *boot_reg = sysram_base_addr;
>
> -       boot_reg = cpu_boot_reg_base();
>         if (!boot_reg)
>                 return IOMEM_ERR_PTR(-ENODEV);
> -       if (soc_is_exynos4412())
> -               boot_reg += 4*cpu;
> -       else if (soc_is_exynos5420() || soc_is_exynos5800())
> -               boot_reg += 4;
> +
> +       boot_reg += 4*cpu;
> +
>         return boot_reg;
>  }
>
> +static void __iomem *exynos5420_cpu_boot_reg(u32 cpu)
> +{
> +       void __iomem *boot_reg = sysram_base_addr;
> +
> +       if (!sysram_base_addr)
> +               return IOMEM_ERR_PTR(-ENODEV);
> +
> +       boot_reg += 4;
> +
> +       return boot_reg;
> +}
> +
> +static void __iomem *exynos_common_cpu_boot_reg(u32 cpu)
> +{
> +       if (!sysram_base_addr)
> +               return IOMEM_ERR_PTR(-ENODEV);
> +
> +       return sysram_base_addr;
> +}
> +
> +static inline void __iomem *cpu_boot_reg(int cpu)
> +{
> +       if (cpu_info && cpu_info->cpu_boot_reg)
> +               return cpu_info->cpu_boot_reg(cpu);
> +       return NULL;
> +}
> +
>  /*
>   * Set wake up by local power mode and execute software reset for given core.
>   *
> @@ -296,13 +337,84 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr)
>         return ret;
>  }
>
> +static const struct exynos_cpu_info exynos3250_cpu_info = {
> +       .cpu_boot_reg = exynos_common_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos5420_cpu_info = {
> +       .cpu_boot_reg = exynos5420_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos4210_rev11_cpu_info = {
> +       .cpu_boot_reg = exynos4210_rev11_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos4412_cpu_info = {
> +       .cpu_boot_reg = exynos4412_cpu_boot_reg,
> +};
> +
> +static const struct exynos_cpu_info exynos_common_cpu_info = {
> +       .cpu_boot_reg = exynos_common_cpu_boot_reg,
> +};
> +
> +static const struct soc_device_attribute exynos_soc_revision[] = {
> +       {
> +               .soc_id = "EXYNOS4210",
> +               .revision = "11",
> +               .data = &exynos4210_rev11_cpu_info
> +       }, {
> +               .soc_id = "EXYNOS4210",
> +               .revision = "10",
> +               .data = &exynos_common_cpu_info
> +       }
> +};
> +
> +static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
> +       {
> +               .compatible = "samsung,exynos3250",
> +               .data = &exynos3250_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos4212",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos4412",
> +               .data = &exynos4412_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5250",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5260",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5410",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5420",
> +               .data = &exynos5420_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5440",
> +               .data = &exynos_common_cpu_info
> +       }, {
> +               .compatible = "samsung,exynos5800",
> +               .data = &exynos5420_cpu_info
> +       },
> +       { /*sentinel*/ },
> +};
> +
>  static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
>  {
>         unsigned long timeout;
> +       const struct soc_device_attribute *match;
>         u32 mpidr = cpu_logical_map(cpu);
>         u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
>         int ret = -ENOSYS;
>
> +       if (of_machine_is_compatible("samsung,exynos4210")) {
> +               match = soc_device_match(exynos_soc_revision);
> +               if (match)
> +                       cpu_info = (const struct exynos_cpu_info *) match->data;
> +       }
> +
>         /*
>          * Set synchronisation state between this boot processor
>          * and the secondary one
> @@ -387,6 +499,18 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
>
>  static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
>  {
> +       const struct of_device_id *match;
> +       struct device_node *np;
> +
> +       if (!of_machine_is_compatible("samsung,exynos4210")) {
> +               np = of_find_matching_node_and_match(NULL,
> +                               exynos_pmu_of_device_ids, &match);
> +               if (!np)
> +                       pr_err("failed to find supported CPU\n");
> +               else
> +                       cpu_info = (const struct exynos_cpu_info *) match->data;
> +       }
> +
>         exynos_sysram_init();
>
>         exynos_set_delayed_reset_assertion(true);
> --
> 2.7.4
>

  parent reply	other threads:[~2017-04-07 10:41 UTC|newest]

Thread overview: 98+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20170330131417epcas1p48a7f41b90177294b7918ecf31df130d1@epcas1p4.samsung.com>
2017-03-30 13:16 ` [PATCH v9 00/12] Introducing Exynos ChipId driver Pankaj Dubey
2017-03-30 13:16   ` Pankaj Dubey
     [not found]   ` <CGME20170330131419epcas5p4ac36250d3a9225643e327e60f47956c2@epcas5p4.samsung.com>
2017-03-30 13:16     ` [PATCH v9 01/12] ARM: EXYNOS: refactor firmware specific routines Pankaj Dubey
2017-03-30 13:16       ` Pankaj Dubey
2017-04-07  7:45       ` Krzysztof Kozlowski
2017-04-07  7:45         ` Krzysztof Kozlowski
2017-04-07  8:06         ` pankaj.dubey
2017-04-07  8:06           ` pankaj.dubey
     [not found]   ` <CGME20170330131421epcas5p40b0ad9c1003d3ab807667ae2b05d25bc@epcas5p4.samsung.com>
2017-03-30 13:16     ` [PATCH v9 02/12] ARM: EXYNOS: remove usage of soc_is_exynosMMMM from pm.c Pankaj Dubey
2017-03-30 13:16       ` Pankaj Dubey
2017-04-07  8:24       ` Krzysztof Kozlowski
2017-04-07  8:24         ` Krzysztof Kozlowski
2017-04-07 12:12         ` pankaj.dubey
2017-04-07 12:12           ` pankaj.dubey
2017-04-07 12:24           ` Krzysztof Kozlowski
2017-04-07 12:24             ` Krzysztof Kozlowski
2017-04-07 14:13             ` pankaj.dubey
2017-04-07 14:13               ` pankaj.dubey
     [not found]   ` <CGME20170330131424epcas5p4fccfab06e5d77d70d09c3835c3332ee5@epcas5p4.samsung.com>
2017-03-30 13:16     ` [PATCH v9 03/12] ARM: EXYNOS: remove secondary startup initialization from smp_prepare_cpus Pankaj Dubey
2017-03-30 13:16       ` Pankaj Dubey
2017-04-07  8:31       ` Krzysztof Kozlowski
2017-04-07  8:31         ` Krzysztof Kozlowski
2017-04-07 12:15         ` pankaj.dubey
2017-04-07 12:15           ` pankaj.dubey
     [not found]   ` <CGME20170330131427epcas5p4c3d238022dc75694ad3baa8a1018ea04@epcas5p4.samsung.com>
2017-03-30 13:16     ` [PATCH v9 04/12] soc: samsung: add exynos chipid driver support Pankaj Dubey
2017-03-30 13:16       ` Pankaj Dubey
2017-03-30 13:50       ` Arnd Bergmann
2017-03-30 13:50         ` Arnd Bergmann
2017-03-31  5:36         ` pankaj.dubey
2017-03-31  5:36           ` pankaj.dubey
2017-03-31  8:09           ` Arnd Bergmann
2017-03-31  8:09             ` Arnd Bergmann
2017-04-03  9:21             ` pankaj.dubey
2017-04-03  9:21               ` pankaj.dubey
2017-04-03  7:57       ` Marek Szyprowski
2017-04-03  7:57         ` Marek Szyprowski
2017-04-03  9:35         ` pankaj.dubey
2017-04-03  9:35           ` pankaj.dubey
2017-04-07  9:13       ` Krzysztof Kozlowski
2017-04-07  9:13         ` Krzysztof Kozlowski
2017-04-07 12:18         ` pankaj.dubey
2017-04-07 12:18           ` pankaj.dubey
     [not found]   ` <CGME20170330131429epcas5p414565c5a9f2c38f3f6660b72f9ad68a2@epcas5p4.samsung.com>
2017-03-30 13:16     ` [PATCH v9 05/12] ARM: EXYNOS: enable exynos_chipid for ARCH_EXYNOS Pankaj Dubey
2017-03-30 13:16       ` Pankaj Dubey
     [not found]   ` <CGME20170330131431epcas5p447a730e1bb194162f262a819ae665efb@epcas5p4.samsung.com>
2017-03-30 13:17     ` [PATCH v9 06/12] ARM64: " Pankaj Dubey
2017-03-30 13:17       ` Pankaj Dubey
2017-03-30 13:51       ` Arnd Bergmann
2017-03-30 13:51         ` Arnd Bergmann
     [not found]   ` <CGME20170330131434epcas1p4e42fe06bae3456c39e0f93a2f8ae4bc0@epcas1p4.samsung.com>
2017-03-30 13:17     ` [PATCH v9 07/12] ARM: EXYNOS: introduce soc specific pm ops Pankaj Dubey
2017-03-30 13:17       ` Pankaj Dubey
2017-03-30 14:03       ` Arnd Bergmann
2017-03-30 14:03         ` Arnd Bergmann
2017-04-07  9:24       ` Krzysztof Kozlowski
2017-04-07  9:24         ` Krzysztof Kozlowski
2017-04-07 14:11         ` pankaj.dubey
2017-04-07 14:11           ` pankaj.dubey
2017-04-07 14:57           ` Krzysztof Kozlowski
2017-04-07 14:57             ` Krzysztof Kozlowski
     [not found]   ` <CGME20170330131436epcas1p4a4f8bf7b64b4a5ff9ee692adc4e7d001@epcas1p4.samsung.com>
2017-03-30 13:17     ` [PATCH v9 08/12] ARM: EXYNOS: move exynos_boot_vector_{addr,flag} ops to exynos_s2r_data Pankaj Dubey
2017-03-30 13:17       ` [PATCH v9 08/12] ARM: EXYNOS: move exynos_boot_vector_{addr, flag} " Pankaj Dubey
2017-04-07 10:32       ` [PATCH v9 08/12] ARM: EXYNOS: move exynos_boot_vector_{addr,flag} " Krzysztof Kozlowski
2017-04-07 10:32         ` [PATCH v9 08/12] ARM: EXYNOS: move exynos_boot_vector_{addr, flag} " Krzysztof Kozlowski
2017-04-07 13:52         ` [PATCH v9 08/12] ARM: EXYNOS: move exynos_boot_vector_{addr,flag} " pankaj.dubey
2017-04-07 13:52           ` [PATCH v9 08/12] ARM: EXYNOS: move exynos_boot_vector_{addr, flag} " pankaj.dubey
     [not found]   ` <CGME20170330131438epcas1p459ce93da17fcd05249eddaef18d5021e@epcas1p4.samsung.com>
2017-03-30 13:17     ` [PATCH v9 09/12] ARM: EXYNOS: introduce exynos_cpu_info struct Pankaj Dubey
2017-03-30 13:17       ` Pankaj Dubey
2017-04-03  7:57       ` Marek Szyprowski
2017-04-03  7:57         ` Marek Szyprowski
2017-04-03  9:54         ` pankaj.dubey
2017-04-03  9:54           ` pankaj.dubey
2017-04-07 10:41       ` Krzysztof Kozlowski [this message]
2017-04-07 10:41         ` Krzysztof Kozlowski
2017-04-07 14:00         ` pankaj.dubey
2017-04-07 14:00           ` pankaj.dubey
2017-04-07 14:18           ` Krzysztof Kozlowski
2017-04-07 14:18             ` Krzysztof Kozlowski
2017-04-07 10:47       ` Krzysztof Kozlowski
2017-04-07 10:47         ` Krzysztof Kozlowski
     [not found]   ` <CGME20170330131440epcas1p4f27192272761aa593b6cf083453e8adc@epcas1p4.samsung.com>
2017-03-30 13:17     ` [PATCH v9 10/12] ARM: EXYNOS: move power_{down,up} to per SoC struct exynos_cpu_info Pankaj Dubey
2017-03-30 13:17       ` [PATCH v9 10/12] ARM: EXYNOS: move power_{down, up} " Pankaj Dubey
2017-04-07 12:04       ` [PATCH v9 10/12] ARM: EXYNOS: move power_{down,up} " Krzysztof Kozlowski
2017-04-07 12:04         ` Krzysztof Kozlowski
2017-04-07 14:12         ` pankaj.dubey
2017-04-07 14:12           ` pankaj.dubey
     [not found]   ` <CGME20170330131442epcas5p4f2be72cb3ec506847d8e832675e682c4@epcas5p4.samsung.com>
2017-03-30 13:17     ` [PATCH v9 11/12] ARM: EXYNOS: move cpu_restart as a SoC specific hook to exynos_cpu_info Pankaj Dubey
2017-03-30 13:17       ` Pankaj Dubey
2017-04-07 12:23       ` Krzysztof Kozlowski
2017-04-07 12:23         ` Krzysztof Kozlowski
     [not found]   ` <CGME20170330131444epcas5p45051cf7e6ec7a993c2c9f84254b89a19@epcas5p4.samsung.com>
2017-03-30 13:17     ` [PATCH v9 12/12] ARM: EXYNOS: refactor of mach-exynos to use chipid information Pankaj Dubey
2017-03-30 13:17       ` Pankaj Dubey
2017-03-30 14:01       ` Arnd Bergmann
2017-03-30 14:01         ` Arnd Bergmann
2017-03-31  6:01         ` pankaj.dubey
2017-03-31  6:01           ` pankaj.dubey
2017-03-31  8:22           ` Arnd Bergmann
2017-03-31  8:22             ` Arnd Bergmann
2017-04-03  9:25             ` pankaj.dubey
2017-04-03  9:25               ` pankaj.dubey

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