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* [PATCHi v1] add instruction time-out interrupt support
@ 2021-07-16  6:58 ` Yongqiang Niu
  0 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
	Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
	Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
	linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang


Yongqiang Niu (1):
  mailbox: cmdq: add instruction time-out interrupt support

 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

-- 
1.8.1.1.dirty


^ permalink raw reply	[flat|nested] 16+ messages in thread
* [PATCHi v1] add instruction time-out interrupt support
@ 2021-07-16  6:58 ` Yongqiang Niu
  0 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
	Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
	Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
	linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang


Yongqiang Niu (1):
  mailbox: cmdq: add instruction time-out interrupt support

 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

-- 
1.8.1.1.dirty
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

^ permalink raw reply	[flat|nested] 16+ messages in thread
* [PATCHi v1] add instruction time-out interrupt support
@ 2021-07-16  6:58 ` Yongqiang Niu
  0 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
	Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
	Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
	linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang


Yongqiang Niu (1):
  mailbox: cmdq: add instruction time-out interrupt support

 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

-- 
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 16+ messages in thread
* [PATCHi v1] add instruction time-out interrupt support
@ 2021-07-16  6:58 ` Yongqiang Niu
  0 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: devicetree, Project_Global_Chrome_Upstream_Group, David Airlie,
	Jassi Brar, linux-kernel, dri-devel, Yongqiang Niu,
	Dennis YC Hsieh, Fabien Parent, Rob Herring, linux-mediatek,
	Hsin-Yi Wang, Matthias Brugger, linux-arm-kernel


Yongqiang Niu (1):
  mailbox: cmdq: add instruction time-out interrupt support

 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

-- 
1.8.1.1.dirty


^ permalink raw reply	[flat|nested] 16+ messages in thread
* [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
  2021-07-16  6:58 ` Yongqiang Niu
  (?)
  (?)
@ 2021-07-16  6:58   ` Yongqiang Niu
  -1 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
	Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
	Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
	linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang

add time-out cycle setting to make sure time-out interrupt irq
will happened when instruction time-out for wait and poll

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index de4793e..9a76bcd 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -35,6 +35,7 @@
 #define CMDQ_THR_END_ADDR		0x24
 #define CMDQ_THR_WAIT_TOKEN		0x30
 #define CMDQ_THR_PRIORITY		0x40
+#define CMDQ_THR_INSTN_TIMEOUT_CYCLES	0x50
 
 #define GCE_GCTL_VALUE			0x48
 
@@ -53,6 +54,15 @@
 #define CMDQ_JUMP_BY_OFFSET		0x10000000
 #define CMDQ_JUMP_BY_PA			0x10000001
 
+/*
+ * instruction time-out
+ * cycles to issue instruction time-out interrupt for wait and poll instructions
+ * GCE axi_clock 156MHz
+ * 1 cycle = 6.41ns
+ * instruction time out 2^22*2*6.41ns = 53ms
+ */
+#define CMDQ_INSTN_TIMEOUT_CYCLES	22
+
 struct cmdq_thread {
 	struct mbox_chan	*chan;
 	void __iomem		*base;
@@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
 		writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
 		       thread->base + CMDQ_THR_END_ADDR);
 
+		writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
 		writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
 		writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
 		writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
-- 
1.8.1.1.dirty


^ permalink raw reply related	[flat|nested] 16+ messages in thread
* [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16  6:58   ` Yongqiang Niu
  0 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
	Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
	Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
	linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang

add time-out cycle setting to make sure time-out interrupt irq
will happened when instruction time-out for wait and poll

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index de4793e..9a76bcd 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -35,6 +35,7 @@
 #define CMDQ_THR_END_ADDR		0x24
 #define CMDQ_THR_WAIT_TOKEN		0x30
 #define CMDQ_THR_PRIORITY		0x40
+#define CMDQ_THR_INSTN_TIMEOUT_CYCLES	0x50
 
 #define GCE_GCTL_VALUE			0x48
 
@@ -53,6 +54,15 @@
 #define CMDQ_JUMP_BY_OFFSET		0x10000000
 #define CMDQ_JUMP_BY_PA			0x10000001
 
+/*
+ * instruction time-out
+ * cycles to issue instruction time-out interrupt for wait and poll instructions
+ * GCE axi_clock 156MHz
+ * 1 cycle = 6.41ns
+ * instruction time out 2^22*2*6.41ns = 53ms
+ */
+#define CMDQ_INSTN_TIMEOUT_CYCLES	22
+
 struct cmdq_thread {
 	struct mbox_chan	*chan;
 	void __iomem		*base;
@@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
 		writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
 		       thread->base + CMDQ_THR_END_ADDR);
 
+		writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
 		writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
 		writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
 		writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
-- 
1.8.1.1.dirty
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

^ permalink raw reply related	[flat|nested] 16+ messages in thread
* [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16  6:58   ` Yongqiang Niu
  0 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
	Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
	Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
	linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang

add time-out cycle setting to make sure time-out interrupt irq
will happened when instruction time-out for wait and poll

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index de4793e..9a76bcd 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -35,6 +35,7 @@
 #define CMDQ_THR_END_ADDR		0x24
 #define CMDQ_THR_WAIT_TOKEN		0x30
 #define CMDQ_THR_PRIORITY		0x40
+#define CMDQ_THR_INSTN_TIMEOUT_CYCLES	0x50
 
 #define GCE_GCTL_VALUE			0x48
 
@@ -53,6 +54,15 @@
 #define CMDQ_JUMP_BY_OFFSET		0x10000000
 #define CMDQ_JUMP_BY_PA			0x10000001
 
+/*
+ * instruction time-out
+ * cycles to issue instruction time-out interrupt for wait and poll instructions
+ * GCE axi_clock 156MHz
+ * 1 cycle = 6.41ns
+ * instruction time out 2^22*2*6.41ns = 53ms
+ */
+#define CMDQ_INSTN_TIMEOUT_CYCLES	22
+
 struct cmdq_thread {
 	struct mbox_chan	*chan;
 	void __iomem		*base;
@@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
 		writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
 		       thread->base + CMDQ_THR_END_ADDR);
 
+		writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
 		writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
 		writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
 		writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
-- 
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 16+ messages in thread
* [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16  6:58   ` Yongqiang Niu
  0 siblings, 0 replies; 16+ messages in thread
From: Yongqiang Niu @ 2021-07-16  6:58 UTC (permalink / raw)
  To: Chun-Kuang Hu
  Cc: devicetree, Project_Global_Chrome_Upstream_Group, David Airlie,
	Jassi Brar, linux-kernel, dri-devel, Yongqiang Niu,
	Dennis YC Hsieh, Fabien Parent, Rob Herring, linux-mediatek,
	Hsin-Yi Wang, Matthias Brugger, linux-arm-kernel

add time-out cycle setting to make sure time-out interrupt irq
will happened when instruction time-out for wait and poll

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index de4793e..9a76bcd 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -35,6 +35,7 @@
 #define CMDQ_THR_END_ADDR		0x24
 #define CMDQ_THR_WAIT_TOKEN		0x30
 #define CMDQ_THR_PRIORITY		0x40
+#define CMDQ_THR_INSTN_TIMEOUT_CYCLES	0x50
 
 #define GCE_GCTL_VALUE			0x48
 
@@ -53,6 +54,15 @@
 #define CMDQ_JUMP_BY_OFFSET		0x10000000
 #define CMDQ_JUMP_BY_PA			0x10000001
 
+/*
+ * instruction time-out
+ * cycles to issue instruction time-out interrupt for wait and poll instructions
+ * GCE axi_clock 156MHz
+ * 1 cycle = 6.41ns
+ * instruction time out 2^22*2*6.41ns = 53ms
+ */
+#define CMDQ_INSTN_TIMEOUT_CYCLES	22
+
 struct cmdq_thread {
 	struct mbox_chan	*chan;
 	void __iomem		*base;
@@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
 		writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
 		       thread->base + CMDQ_THR_END_ADDR);
 
+		writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
 		writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
 		writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
 		writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
-- 
1.8.1.1.dirty


^ permalink raw reply related	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
  2021-07-16  6:58   ` Yongqiang Niu
  (?)
  (?)
@ 2021-07-16  7:37     ` Hsin-Yi Wang
  -1 siblings, 0 replies; 16+ messages in thread
From: Hsin-Yi Wang @ 2021-07-16  7:37 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
	David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
	Dennis YC Hsieh, Devicetree List,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	moderated list:ARM/Mediatek SoC support, lkml, dri-devel,
	Project_Global_Chrome_Upstream_Group

On Fri, Jul 16, 2021 at 2:58 PM Yongqiang Niu
<yongqiang.niu@mediatek.com> wrote:
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>

Hi, it seems that this series is based on
https://patchwork.kernel.org/project/linux-mediatek/patch/1624440623-4585-4-git-send-email-yongqiang.niu@mediatek.com/?

Please state it if it's not based on linux-next, thanks!

> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms
> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16  7:37     ` Hsin-Yi Wang
  0 siblings, 0 replies; 16+ messages in thread
From: Hsin-Yi Wang @ 2021-07-16  7:37 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
	David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
	Dennis YC Hsieh, Devicetree List,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	moderated list:ARM/Mediatek SoC support, lkml, dri-devel,
	Project_Global_Chrome_Upstream_Group

On Fri, Jul 16, 2021 at 2:58 PM Yongqiang Niu
<yongqiang.niu@mediatek.com> wrote:
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>

Hi, it seems that this series is based on
https://patchwork.kernel.org/project/linux-mediatek/patch/1624440623-4585-4-git-send-email-yongqiang.niu@mediatek.com/?

Please state it if it's not based on linux-next, thanks!

> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms
> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16  7:37     ` Hsin-Yi Wang
  0 siblings, 0 replies; 16+ messages in thread
From: Hsin-Yi Wang @ 2021-07-16  7:37 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
	David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
	Dennis YC Hsieh, Devicetree List,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	moderated list:ARM/Mediatek SoC support, lkml, dri-devel,
	Project_Global_Chrome_Upstream_Group

On Fri, Jul 16, 2021 at 2:58 PM Yongqiang Niu
<yongqiang.niu@mediatek.com> wrote:
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>

Hi, it seems that this series is based on
https://patchwork.kernel.org/project/linux-mediatek/patch/1624440623-4585-4-git-send-email-yongqiang.niu@mediatek.com/?

Please state it if it's not based on linux-next, thanks!

> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms
> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16  7:37     ` Hsin-Yi Wang
  0 siblings, 0 replies; 16+ messages in thread
From: Hsin-Yi Wang @ 2021-07-16  7:37 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Project_Global_Chrome_Upstream_Group,
	Devicetree List, David Airlie, Jassi Brar, lkml, dri-devel,
	Dennis YC Hsieh, Fabien Parent, Rob Herring,
	moderated list:ARM/Mediatek SoC support, Matthias Brugger,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE

On Fri, Jul 16, 2021 at 2:58 PM Yongqiang Niu
<yongqiang.niu@mediatek.com> wrote:
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>

Hi, it seems that this series is based on
https://patchwork.kernel.org/project/linux-mediatek/patch/1624440623-4585-4-git-send-email-yongqiang.niu@mediatek.com/?

Please state it if it's not based on linux-next, thanks!

> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms
> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
  2021-07-16  6:58   ` Yongqiang Niu
  (?)
  (?)
@ 2021-07-16 16:42     ` Chun-Kuang Hu
  -1 siblings, 0 replies; 16+ messages in thread
From: Chun-Kuang Hu @ 2021-07-16 16:42 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
	David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
	Dennis YC Hsieh, DTML, Linux ARM,
	moderated list:ARM/Mediatek SoC support, linux-kernel,
	DRI Development, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang

Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月16日 週五 下午2:58寫道：
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms

I think every client has different timeout value, so it's not a good
idea to have a unique timeout value in mailbox controller. Client
could use timer or something similar to detect timeout.

Regards,
Chun-Kuang.

> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16 16:42     ` Chun-Kuang Hu
  0 siblings, 0 replies; 16+ messages in thread
From: Chun-Kuang Hu @ 2021-07-16 16:42 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
	David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
	Dennis YC Hsieh, DTML, Linux ARM,
	moderated list:ARM/Mediatek SoC support, linux-kernel,
	DRI Development, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang

Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月16日 週五 下午2:58寫道：
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms

I think every client has different timeout value, so it's not a good
idea to have a unique timeout value in mailbox controller. Client
could use timer or something similar to detect timeout.

Regards,
Chun-Kuang.

> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16 16:42     ` Chun-Kuang Hu
  0 siblings, 0 replies; 16+ messages in thread
From: Chun-Kuang Hu @ 2021-07-16 16:42 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
	David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
	Dennis YC Hsieh, DTML, Linux ARM,
	moderated list:ARM/Mediatek SoC support, linux-kernel,
	DRI Development, Project_Global_Chrome_Upstream_Group,
	Hsin-Yi Wang

Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月16日 週五 下午2:58寫道：
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms

I think every client has different timeout value, so it's not a good
idea to have a unique timeout value in mailbox controller. Client
could use timer or something similar to detect timeout.

Regards,
Chun-Kuang.

> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH v1] mailbox: cmdq: add instruction time-out interrupt support
@ 2021-07-16 16:42     ` Chun-Kuang Hu
  0 siblings, 0 replies; 16+ messages in thread
From: Chun-Kuang Hu @ 2021-07-16 16:42 UTC (permalink / raw)
  To: Yongqiang Niu
  Cc: Chun-Kuang Hu, Project_Global_Chrome_Upstream_Group, DTML,
	David Airlie, Jassi Brar, linux-kernel, DRI Development,
	Dennis YC Hsieh, Fabien Parent, Rob Herring,
	moderated list:ARM/Mediatek SoC support, Hsin-Yi Wang,
	Matthias Brugger, Linux ARM

Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年7月16日 週五 下午2:58寫道：
>
> add time-out cycle setting to make sure time-out interrupt irq
> will happened when instruction time-out for wait and poll
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de4793e..9a76bcd 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -35,6 +35,7 @@
>  #define CMDQ_THR_END_ADDR              0x24
>  #define CMDQ_THR_WAIT_TOKEN            0x30
>  #define CMDQ_THR_PRIORITY              0x40
> +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES  0x50
>
>  #define GCE_GCTL_VALUE                 0x48
>
> @@ -53,6 +54,15 @@
>  #define CMDQ_JUMP_BY_OFFSET            0x10000000
>  #define CMDQ_JUMP_BY_PA                        0x10000001
>
> +/*
> + * instruction time-out
> + * cycles to issue instruction time-out interrupt for wait and poll instructions
> + * GCE axi_clock 156MHz
> + * 1 cycle = 6.41ns
> + * instruction time out 2^22*2*6.41ns = 53ms

I think every client has different timeout value, so it's not a good
idea to have a unique timeout value in mailbox controller. Client
could use timer or something similar to detect timeout.

Regards,
Chun-Kuang.

> + */
> +#define CMDQ_INSTN_TIMEOUT_CYCLES      22
> +
>  struct cmdq_thread {
>         struct mbox_chan        *chan;
>         void __iomem            *base;
> @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
>                 writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
>                        thread->base + CMDQ_THR_END_ADDR);
>
> +               writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
>                 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
>                 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
>                 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
> --
> 1.8.1.1.dirty
>

^ permalink raw reply	[flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-07-16 16:44 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-16  6:58 [PATCHi v1] add instruction time-out interrupt support Yongqiang Niu
2021-07-16  6:58 ` Yongqiang Niu
2021-07-16  6:58 ` Yongqiang Niu
2021-07-16  6:58 ` Yongqiang Niu
2021-07-16  6:58 ` [PATCH v1] mailbox: cmdq: " Yongqiang Niu
2021-07-16  6:58   ` Yongqiang Niu
2021-07-16  6:58   ` Yongqiang Niu
2021-07-16  6:58   ` Yongqiang Niu
2021-07-16  7:37   ` Hsin-Yi Wang
2021-07-16  7:37     ` Hsin-Yi Wang
2021-07-16  7:37     ` Hsin-Yi Wang
2021-07-16  7:37     ` Hsin-Yi Wang
2021-07-16 16:42   ` Chun-Kuang Hu
2021-07-16 16:42     ` Chun-Kuang Hu
2021-07-16 16:42     ` Chun-Kuang Hu
2021-07-16 16:42     ` Chun-Kuang Hu

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