[PATCH v1 8/9] early pt: enable cyc packet

[PATCH v1 8/9] early pt: enable cyc packet

[Luming Yu]

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enable CYC packet

Signed-off-by: Luming Yu <luming.yu@intel.com>

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From 8b5d8f3150216e1b671456b60be20a3456262a0d Mon Sep 17 00:00:00 2001
From: Luming Yu <luming.yu@intel.com>
Date: Fri, 29 Sep 2017 22:10:41 +0800
Subject: [PATCH v1 8/9] early pt: enable cyc packet

enable CYC packet

Signed-off-by: Luming Yu <luming.yu@intel.com>
---
 arch/x86/events/intel/early_pt.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/x86/events/intel/early_pt.c b/arch/x86/events/intel/early_pt.c
index 645d2ca..95225d6 100644
--- a/arch/x86/events/intel/early_pt.c
+++ b/arch/x86/events/intel/early_pt.c
@@ -58,6 +58,7 @@ static unsigned addr_range_num = 0;
 
 static int mtc_freq = 0;
 static int psb_freq = 0;
+static int cyc_thresh = 0;
 
 static unsigned long pt_addr0_start = 0, pt_addr0_end = 0;
 static unsigned long pt_addr1_start = 0, pt_addr1_end = 0;
@@ -206,6 +207,9 @@ static int start_early_pt(void *arg)
 	if (psb_freq && ((1U << (psb_freq - 1)) & psb_freq_mask))
 		val |= (psb_freq -1) << 24;
 
+	if (cyc_thresh && ((1U << (cyc_thresh-1)) & cyc_thresh_mask))
+		val |= ((cyc_thresh -1) << 19) | CYC_EN;
+
 	if (wrmsrl_safe(MSR_IA32_RTIT_CTL, val) < 0) {
 		pr_info("early_pt start failed on cpu[%d]\n", cpu);
 		__this_cpu_write(early_pt_running, false);
@@ -424,3 +428,9 @@ static int __init early_pt_psb_freq_setup(char *arg)
 	return 0;
 }
 early_param("psb_freq", early_pt_psb_freq_setup);
+static int __init early_pt_cyc_thresh_setup(char *arg)
+{
+	sscanf(arg, "%d", &cyc_thresh);
+	return 0;
+}
+early_param("cyc_thresh", early_pt_cyc_thresh_setup);
-- 
2.7.5