[Qemu-devel] a quesion

[Qemu-devel] a quesion

[Michael Rolnik]

Hi all,

1. How to implement a device that has 4 registers in IO space e.g. AVR
EEPROM?
2. what is a SoC container object? How?

-- 
Best Regards,
Michael Rolnik

Re: [Qemu-devel] a quesion

[Peter Maydell]

On 16 August 2016 at 14:53, Michael Rolnik <mrolnik@gmail.com> wrote:
> 1. How to implement a device that has 4 registers in IO space e.g. AVR
> EEPROM?

Since for your AVR target the IO space is just turned into
accesses to physical memory, ie the inb/outb default case
does something like this:

+            cpu_physical_memory_read(PHYS_BASE_REGS + port
+                                              + AVR_CPU_IO_REGS_BASE,
&data, 1);

you don't need to do anything special for the device being
in IO space. You just need to implement a device which has
a MemoryRegion which handles its 4 registers, and then
have the board or SoC create that device and map it into
the memory space at the right address. hw/misc/zynq_slcr.c
is perhaps one example of a device that's just some simple
registers (though it has a lot more than 4, the principles
are the same).

> 2. what is a SoC container object? How?

An "SoC container" is a device which doesn't have any interesting
functionality itself, but just creates a lot of other devices
and maps them to the right places in the address space. A good
example is hw/arm/fsl-imx6.c.

thanks
-- PMM

Re: [Qemu-devel] a quesion

[Michael Rolnik]

thanks Peter.

On Tue, Aug 16, 2016 at 5:07 PM, Peter Maydell <peter.maydell@linaro.org>
wrote:

> On 16 August 2016 at 14:53, Michael Rolnik <mrolnik@gmail.com> wrote:
> > 1. How to implement a device that has 4 registers in IO space e.g. AVR
> > EEPROM?
>
> Since for your AVR target the IO space is just turned into
> accesses to physical memory, ie the inb/outb default case
> does something like this:
>
> +            cpu_physical_memory_read(PHYS_BASE_REGS + port
> +                                              + AVR_CPU_IO_REGS_BASE,
> &data, 1);
>
> you don't need to do anything special for the device being
> in IO space. You just need to implement a device which has
> a MemoryRegion which handles its 4 registers, and then
> have the board or SoC create that device and map it into
> the memory space at the right address. hw/misc/zynq_slcr.c
> is perhaps one example of a device that's just some simple
> registers (though it has a lot more than 4, the principles
> are the same).
>
> > 2. what is a SoC container object? How?
>
> An "SoC container" is a device which doesn't have any interesting
> functionality itself, but just creates a lot of other devices
> and maps them to the right places in the address space. A good
> example is hw/arm/fsl-imx6.c.
>
> thanks
> -- PMM
>



-- 
Best Regards,
Michael Rolnik

Re: [Qemu-devel] a quesion

[Michael Rolnik]

another question.
is it possible to measure number of executed instruction between two calls
to device read/write functions?

I know there is qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) function, but it
requires to assume that icount is used and CPU frequence.

thanks,
Michael

On Tue, Aug 16, 2016 at 5:09 PM, Michael Rolnik <mrolnik@gmail.com> wrote:

> thanks Peter.
>
> On Tue, Aug 16, 2016 at 5:07 PM, Peter Maydell <peter.maydell@linaro.org>
> wrote:
>
>> On 16 August 2016 at 14:53, Michael Rolnik <mrolnik@gmail.com> wrote:
>> > 1. How to implement a device that has 4 registers in IO space e.g. AVR
>> > EEPROM?
>>
>> Since for your AVR target the IO space is just turned into
>> accesses to physical memory, ie the inb/outb default case
>> does something like this:
>>
>> +            cpu_physical_memory_read(PHYS_BASE_REGS + port
>> +                                              + AVR_CPU_IO_REGS_BASE,
>> &data, 1);
>>
>> you don't need to do anything special for the device being
>> in IO space. You just need to implement a device which has
>> a MemoryRegion which handles its 4 registers, and then
>> have the board or SoC create that device and map it into
>> the memory space at the right address. hw/misc/zynq_slcr.c
>> is perhaps one example of a device that's just some simple
>> registers (though it has a lot more than 4, the principles
>> are the same).
>>
>> > 2. what is a SoC container object? How?
>>
>> An "SoC container" is a device which doesn't have any interesting
>> functionality itself, but just creates a lot of other devices
>> and maps them to the right places in the address space. A good
>> example is hw/arm/fsl-imx6.c.
>>
>> thanks
>> -- PMM
>>
>
>
>
> --
> Best Regards,
> Michael Rolnik
>



-- 
Best Regards,
Michael Rolnik

Re: [Qemu-devel] a quesion

[Richard Henderson]

On 08/17/2016 12:57 AM, Michael Rolnik wrote:
> another question.
> is it possible to measure number of executed instruction between two calls to
> device read/write functions?

Not really.

>
> I know there is qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) function, but it requires
> to assume that icount is used and CPU frequence.

Indeed, which is why it's generally good enough to invent a plausible cpu 
frequency and use the (virtual) wall clock for the cycle counter.

See, for instance, target-alpha/sys_helper.c, helper_load_pcc.


r~