* [PATCH 0/4] add additional required properties for UniPhier ethernet nodes
@ 2018-04-24 4:46 ` Kunihiko Hayashi
0 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:46 UTC (permalink / raw)
To: Masahiro Yamada, linux-arm-kernel
Cc: Mark Rutland, devicetree, Masami Hiramatsu, Kunihiko Hayashi,
Jassi Brar, Rob Herring
Add required clocks and their names, resets and their names, and system
controller properties to fix the activation issues for the ethernet
controllers implemented on some UniPhier SoCs.
Kunihiko Hayashi (4):
ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet
node
arm64: dts: uniphier: add clock-names and reset-names to ethernet node
ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
arm64: dts: uniphier: add syscon-phy-mode property to each ethernet
node
arch/arm/boot/dts/uniphier-pro4.dtsi | 10 +++++++---
arch/arm/boot/dts/uniphier-pxs2.dtsi | 3 +++
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 5 ++++-
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 +++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 8 +++++++-
5 files changed, 24 insertions(+), 5 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 0/4] add additional required properties for UniPhier ethernet nodes
@ 2018-04-24 4:46 ` Kunihiko Hayashi
0 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:46 UTC (permalink / raw)
To: linux-arm-kernel
Add required clocks and their names, resets and their names, and system
controller properties to fix the activation issues for the ethernet
controllers implemented on some UniPhier SoCs.
Kunihiko Hayashi (4):
ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet
node
arm64: dts: uniphier: add clock-names and reset-names to ethernet node
ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
arm64: dts: uniphier: add syscon-phy-mode property to each ethernet
node
arch/arm/boot/dts/uniphier-pro4.dtsi | 10 +++++++---
arch/arm/boot/dts/uniphier-pxs2.dtsi | 3 +++
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 5 ++++-
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 +++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 8 +++++++-
5 files changed, 24 insertions(+), 5 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/4] ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node
2018-04-24 4:46 ` Kunihiko Hayashi
@ 2018-04-24 4:47 ` Kunihiko Hayashi
-1 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: Masahiro Yamada, linux-arm-kernel
Cc: Mark Rutland, devicetree, Masami Hiramatsu, Kunihiko Hayashi,
Jassi Brar, Rob Herring
The GIO clock/reset, Another MAC clock, and the PHY clock are required
for the ethernet of Pro4 SoC.
And add clock-names and reset-names to the ethernet node of PXs2 since
we need to distinguish clocks and resets now.
Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro4.dtsi | 7 +++++--
arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 ++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 844124b..392d7dd 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -371,8 +371,11 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
- clocks = <&sys_clk 6>;
- resets = <&sys_rst 6>;
+ clock-names = "gio", "ether", "ether-gb", "ether-phy";
+ clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>,
+ <&sys_clk 10>;
+ reset-names = "gio", "ether";
+ resets = <&sys_rst 12>, <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index debcbd1..a1839db 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -506,7 +506,9 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 1/4] ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node
@ 2018-04-24 4:47 ` Kunihiko Hayashi
0 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: linux-arm-kernel
The GIO clock/reset, Another MAC clock, and the PHY clock are required
for the ethernet of Pro4 SoC.
And add clock-names and reset-names to the ethernet node of PXs2 since
we need to distinguish clocks and resets now.
Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro4.dtsi | 7 +++++--
arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 ++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 844124b..392d7dd 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -371,8 +371,11 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
- clocks = <&sys_clk 6>;
- resets = <&sys_rst 6>;
+ clock-names = "gio", "ether", "ether-gb", "ether-phy";
+ clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>,
+ <&sys_clk 10>;
+ reset-names = "gio", "ether";
+ resets = <&sys_rst 12>, <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index debcbd1..a1839db 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -506,7 +506,9 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/4] arm64: dts: uniphier: add clock-names and reset-names to ethernet node
2018-04-24 4:46 ` Kunihiko Hayashi
@ 2018-04-24 4:47 ` Kunihiko Hayashi
-1 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: Masahiro Yamada, linux-arm-kernel
Cc: Mark Rutland, devicetree, Masami Hiramatsu, Kunihiko Hayashi,
Jassi Brar, Rob Herring
Add clock-names and reset-names because this node recognizes multiple
clocks and resets. ("ether", and so on, for each)
Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 2 ++
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++++
3 files changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index e62bda1..540e012 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -549,7 +549,9 @@
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rmii";
local-mac-address = [00 00 00 00 00 00];
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 9efe20d..845b407 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -604,7 +604,9 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 7c8f710..4ff043e 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -412,7 +412,9 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
@@ -430,7 +432,9 @@
interrupts = <0 67 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether1_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 7>;
+ reset-names = "ether";
resets = <&sys_rst 7>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/4] arm64: dts: uniphier: add clock-names and reset-names to ethernet node
@ 2018-04-24 4:47 ` Kunihiko Hayashi
0 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: linux-arm-kernel
Add clock-names and reset-names because this node recognizes multiple
clocks and resets. ("ether", and so on, for each)
Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 2 ++
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++++
3 files changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index e62bda1..540e012 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -549,7 +549,9 @@
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rmii";
local-mac-address = [00 00 00 00 00 00];
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 9efe20d..845b407 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -604,7 +604,9 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 7c8f710..4ff043e 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -412,7 +412,9 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
@@ -430,7 +432,9 @@
interrupts = <0 67 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether1_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 7>;
+ reset-names = "ether";
resets = <&sys_rst 7>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/4] ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
2018-04-24 4:46 ` Kunihiko Hayashi
@ 2018-04-24 4:47 ` Kunihiko Hayashi
-1 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: Masahiro Yamada, linux-arm-kernel
Cc: Mark Rutland, devicetree, Masami Hiramatsu, Kunihiko Hayashi,
Jassi Brar, Rob Herring
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro4.dtsi | 3 ++-
arch/arm/boot/dts/uniphier-pxs2.dtsi | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 392d7dd..49539f0 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -286,7 +286,7 @@
has-transaction-translator;
};
- soc-glue@5f800000 {
+ soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-pro4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@@ -378,6 +378,7 @@
resets = <&sys_rst 12>, <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index a1839db..641d961 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -512,6 +512,7 @@
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/4] ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
@ 2018-04-24 4:47 ` Kunihiko Hayashi
0 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: linux-arm-kernel
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pro4.dtsi | 3 ++-
arch/arm/boot/dts/uniphier-pxs2.dtsi | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 392d7dd..49539f0 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -286,7 +286,7 @@
has-transaction-translator;
};
- soc-glue at 5f800000 {
+ soc_glue: soc-glue at 5f800000 {
compatible = "socionext,uniphier-pro4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@@ -378,6 +378,7 @@
resets = <&sys_rst 12>, <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index a1839db..641d961 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -512,6 +512,7 @@
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/4] arm64: dts: uniphier: add syscon-phy-mode property to each ethernet node
2018-04-24 4:46 ` Kunihiko Hayashi
@ 2018-04-24 4:47 ` Kunihiko Hayashi
-1 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: Masahiro Yamada, linux-arm-kernel
Cc: Mark Rutland, devicetree, Masami Hiramatsu, Kunihiko Hayashi,
Jassi Brar, Rob Herring
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.
In addition, LD11 SoC has a built-in ethernet PHY. When we set "internal"
to phy-mode property, this built-in PHY is available.
This patch changes phy-mode property for LD11 to "internal", as default.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 3 ++-
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 1 +
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 +++-
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 540e012..cbc4f4b 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -553,8 +553,9 @@
clocks = <&sys_clk 6>;
reset-names = "ether";
resets = <&sys_rst 6>;
- phy-mode = "rmii";
+ phy-mode = "internal";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 845b407..1721d45 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -610,6 +610,7 @@
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 4ff043e..c703842 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -341,7 +341,7 @@
cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
- soc-glue@5f800000 {
+ soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-pxs3-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@@ -418,6 +418,7 @@
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio0: mdio {
#address-cells = <1>;
@@ -438,6 +439,7 @@
resets = <&sys_rst 7>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 1>;
mdio1: mdio {
#address-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/4] arm64: dts: uniphier: add syscon-phy-mode property to each ethernet node
@ 2018-04-24 4:47 ` Kunihiko Hayashi
0 siblings, 0 replies; 12+ messages in thread
From: Kunihiko Hayashi @ 2018-04-24 4:47 UTC (permalink / raw)
To: linux-arm-kernel
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.
In addition, LD11 SoC has a built-in ethernet PHY. When we set "internal"
to phy-mode property, this built-in PHY is available.
This patch changes phy-mode property for LD11 to "internal", as default.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 3 ++-
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 1 +
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 +++-
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 540e012..cbc4f4b 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -553,8 +553,9 @@
clocks = <&sys_clk 6>;
reset-names = "ether";
resets = <&sys_rst 6>;
- phy-mode = "rmii";
+ phy-mode = "internal";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 845b407..1721d45 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -610,6 +610,7 @@
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 4ff043e..c703842 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -341,7 +341,7 @@
cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
- soc-glue at 5f800000 {
+ soc_glue: soc-glue at 5f800000 {
compatible = "socionext,uniphier-pxs3-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@@ -418,6 +418,7 @@
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio0: mdio {
#address-cells = <1>;
@@ -438,6 +439,7 @@
resets = <&sys_rst 7>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 1>;
mdio1: mdio {
#address-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] add additional required properties for UniPhier ethernet nodes
2018-04-24 4:46 ` Kunihiko Hayashi
@ 2018-04-24 15:28 ` Masahiro Yamada
-1 siblings, 0 replies; 12+ messages in thread
From: Masahiro Yamada @ 2018-04-24 15:28 UTC (permalink / raw)
To: Kunihiko Hayashi
Cc: Mark Rutland, DTML, Masami Hiramatsu, Jassi Brar, Rob Herring,
linux-arm-kernel
2018-04-24 13:46 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>:
> Add required clocks and their names, resets and their names, and system
> controller properties to fix the activation issues for the ethernet
> controllers implemented on some UniPhier SoCs.
>
> Kunihiko Hayashi (4):
> ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet
> node
> arm64: dts: uniphier: add clock-names and reset-names to ethernet node
> ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
> arm64: dts: uniphier: add syscon-phy-mode property to each ethernet
> node
All applied to linux-uniphier. Thanks!
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 0/4] add additional required properties for UniPhier ethernet nodes
@ 2018-04-24 15:28 ` Masahiro Yamada
0 siblings, 0 replies; 12+ messages in thread
From: Masahiro Yamada @ 2018-04-24 15:28 UTC (permalink / raw)
To: linux-arm-kernel
2018-04-24 13:46 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>:
> Add required clocks and their names, resets and their names, and system
> controller properties to fix the activation issues for the ethernet
> controllers implemented on some UniPhier SoCs.
>
> Kunihiko Hayashi (4):
> ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet
> node
> arm64: dts: uniphier: add clock-names and reset-names to ethernet node
> ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
> arm64: dts: uniphier: add syscon-phy-mode property to each ethernet
> node
All applied to linux-uniphier. Thanks!
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2018-04-24 15:28 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
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2018-04-24 4:46 ` Kunihiko Hayashi
2018-04-24 4:47 ` [PATCH 1/4] ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node Kunihiko Hayashi
2018-04-24 4:47 ` Kunihiko Hayashi
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2018-04-24 4:47 ` Kunihiko Hayashi
2018-04-24 4:47 ` [PATCH 3/4] ARM: dts: uniphier: add syscon-phy-mode property to each " Kunihiko Hayashi
2018-04-24 4:47 ` Kunihiko Hayashi
2018-04-24 4:47 ` [PATCH 4/4] arm64: " Kunihiko Hayashi
2018-04-24 4:47 ` Kunihiko Hayashi
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2018-04-24 15:28 ` Masahiro Yamada
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