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From: Arnd Bergmann <arnd@arndb.de>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	gregkh <gregkh@linuxfoundation.org>,
	"open list:BROADCOM NVRAM DRIVER" <linux-mips@vger.kernel.org>,
	linux-pci <linux-pci@vger.kernel.org>,
	linux-staging@lists.linux.dev, neil@brown.name,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 6/6] staging: mt7621-pci: properly adjust base address for the IO window
Date: Sat, 25 Sep 2021 19:33:06 +0200	[thread overview]
Message-ID: <CAK8P3a0LXzyC1y4QapdjvtC2WRu8hU_0hENzZrz14ufoVP3ceQ@mail.gmail.com> (raw)
In-Reply-To: <20210924211139.3477-7-sergio.paracuellos@gmail.com>

On Fri, Sep 24, 2021 at 11:11 PM Sergio Paracuellos
<sergio.paracuellos@gmail.com> wrote:
>
> The value to adjust in the bridge register RALINK_PCI_IOBASE must take into
> account the raw value from DT, not only the translated linux port number.
> As long as io_offset is zero, the two are the same, but if you were to use
> multiple host bridge in the system, or pick a different bus address in DT,
> you can have a nonzero io_offset. At this means to take into account the
> bus address which is used to calculate this offset, substracting it from
> the IO resource start address.
>
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

Acked-by: Arnd Bergmann <arnd@arndb.de>

  reply	other threads:[~2021-09-25 17:33 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-24 21:11 [PATCH 0/6] MIPS: ralink: fix PCI IO resources Sergio Paracuellos
2021-09-24 21:11 ` [PATCH 1/6] Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT" Sergio Paracuellos
2021-09-24 21:11 ` [PATCH 2/6] Revert "staging: mt7621-pci: set end limit for 'ioport_resource'" Sergio Paracuellos
2021-09-25 17:33   ` Arnd Bergmann
2021-09-25 17:33     ` Arnd Bergmann
2021-09-24 21:11 ` [PATCH 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' Sergio Paracuellos
2021-09-25 17:32   ` Arnd Bergmann
2021-09-25 17:32     ` Arnd Bergmann
2021-09-24 21:11 ` [PATCH 4/6] PCI: allow architecture specific implementation of pci_remap_iospace() Sergio Paracuellos
2021-09-25  2:42   ` Bjorn Helgaas
2021-09-25 17:38   ` Arnd Bergmann
2021-09-25 17:38     ` Arnd Bergmann
2021-09-24 21:11 ` [PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()' Sergio Paracuellos
2021-09-25 17:32   ` Arnd Bergmann
2021-09-25 17:32     ` Arnd Bergmann
2021-09-25 18:08     ` Sergio Paracuellos
2021-09-25 18:08       ` Sergio Paracuellos
2021-09-25 19:34       ` Arnd Bergmann
2021-09-25 19:34         ` Arnd Bergmann
2021-09-25 20:16         ` Sergio Paracuellos
2021-09-25 20:16           ` Sergio Paracuellos
2021-09-24 21:11 ` [PATCH 6/6] staging: mt7621-pci: properly adjust base address for the IO window Sergio Paracuellos
2021-09-25 17:33   ` Arnd Bergmann [this message]
2021-09-25 17:33     ` Arnd Bergmann

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