* [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 14:51 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 14:51 UTC (permalink / raw)
To: SoC Team; +Cc: linux-arm-kernel, arm-soc
Hi,
please pull the following changes to your tree. The tree is based on
zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
Use hash-table for api feature check") which went to v5.10-rc6.
Thanks,
Michal
The following changes since commit acfdd18591eaac25446e976a0c0d190f8b3dbfb1:
firmware: xilinx: Use hash-table for api feature check (2020-11-24
15:13:54 +0100)
are available in the Git repository at:
https://github.com/Xilinx/linux-xlnx.git tags/zynqmp-soc-for-v5.11
for you to fetch changes up to b8d6b5c241b3dedaa03f845e25412935fef81c6b:
firmware: xilinx: Properly align function parameter (2020-12-09
15:09:11 +0100)
----------------------------------------------------------------
arm64: soc: ZynqMP SoC changes for v5.11
- Small alignments in Xilinx Firmware driver
- Exposing syscon interface for VCU driver
----------------------------------------------------------------
Michael Tretter (4):
soc: xilinx: vcu: drop useless success message
dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
soc: xilinx: vcu: use vcu-settings syscon registers
soc: xilinx: vcu: add missing register NUM_CORE
Michal Simek (4):
firmware: xilinx: Fix kernel-doc warnings
firmware: xilinx: Remove additional newline
firmware: xilinx: Add a blank line after function declaration
firmware: xilinx: Properly align function parameter
Wendy Liang (1):
firmware: xlnx-zynqmp: fix compilation warning
Zou Wei (1):
firmware: xilinx: Mark pm_api_features_map with static keyword
Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml |
34 ++++++++++++++++++++++++++++++++++
Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt |
9 ++-------
drivers/firmware/xilinx/zynqmp.c |
48 ++++++++++++++++++++++++------------------------
drivers/soc/xilinx/Kconfig | 1 +
drivers/soc/xilinx/xlnx_vcu.c |
96
+++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------
include/linux/firmware/xlnx-zynqmp.h |
45 ++++++++++++++++++++++++++++++++++++++++-----
include/linux/mfd/syscon/xlnx-vcu.h |
39 +++++++++++++++++++++++++++++++++++++++
7 files changed, 187 insertions(+), 85 deletions(-)
create mode 100644
Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
create mode 100644 include/linux/mfd/syscon/xlnx-vcu.h
[linux](zynqmp/soc)$
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
^ permalink raw reply [flat|nested] 12+ messages in thread
* [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 14:51 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 14:51 UTC (permalink / raw)
To: SoC Team; +Cc: arm-soc, linux-arm-kernel
Hi,
please pull the following changes to your tree. The tree is based on
zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
Use hash-table for api feature check") which went to v5.10-rc6.
Thanks,
Michal
The following changes since commit acfdd18591eaac25446e976a0c0d190f8b3dbfb1:
firmware: xilinx: Use hash-table for api feature check (2020-11-24
15:13:54 +0100)
are available in the Git repository at:
https://github.com/Xilinx/linux-xlnx.git tags/zynqmp-soc-for-v5.11
for you to fetch changes up to b8d6b5c241b3dedaa03f845e25412935fef81c6b:
firmware: xilinx: Properly align function parameter (2020-12-09
15:09:11 +0100)
----------------------------------------------------------------
arm64: soc: ZynqMP SoC changes for v5.11
- Small alignments in Xilinx Firmware driver
- Exposing syscon interface for VCU driver
----------------------------------------------------------------
Michael Tretter (4):
soc: xilinx: vcu: drop useless success message
dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
soc: xilinx: vcu: use vcu-settings syscon registers
soc: xilinx: vcu: add missing register NUM_CORE
Michal Simek (4):
firmware: xilinx: Fix kernel-doc warnings
firmware: xilinx: Remove additional newline
firmware: xilinx: Add a blank line after function declaration
firmware: xilinx: Properly align function parameter
Wendy Liang (1):
firmware: xlnx-zynqmp: fix compilation warning
Zou Wei (1):
firmware: xilinx: Mark pm_api_features_map with static keyword
Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml |
34 ++++++++++++++++++++++++++++++++++
Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt |
9 ++-------
drivers/firmware/xilinx/zynqmp.c |
48 ++++++++++++++++++++++++------------------------
drivers/soc/xilinx/Kconfig | 1 +
drivers/soc/xilinx/xlnx_vcu.c |
96
+++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------
include/linux/firmware/xlnx-zynqmp.h |
45 ++++++++++++++++++++++++++++++++++++++++-----
include/linux/mfd/syscon/xlnx-vcu.h |
39 +++++++++++++++++++++++++++++++++++++++
7 files changed, 187 insertions(+), 85 deletions(-)
create mode 100644
Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
create mode 100644 include/linux/mfd/syscon/xlnx-vcu.h
[linux](zynqmp/soc)$
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [GIT PULL] arm64: soc: ZynqMP changes for v5.11 (was Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11)
@ 2020-12-09 14:59 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 14:59 UTC (permalink / raw)
To: SoC Team; +Cc: linux-arm-kernel, arm-soc
Hi,
pull request below is correct. I just used incorrect subject line (c&p
error). Sorry about it. Please let me know if you want to send it again.
Thanks,
Michal
On 09. 12. 20 15:51, Michal Simek wrote:
> Hi,
>
> please pull the following changes to your tree. The tree is based on
> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
> Use hash-table for api feature check") which went to v5.10-rc6.
>
> Thanks,
> Michal
>
>
> The following changes since commit acfdd18591eaac25446e976a0c0d190f8b3dbfb1:
>
> firmware: xilinx: Use hash-table for api feature check (2020-11-24
> 15:13:54 +0100)
>
> are available in the Git repository at:
>
> https://github.com/Xilinx/linux-xlnx.git tags/zynqmp-soc-for-v5.11
>
> for you to fetch changes up to b8d6b5c241b3dedaa03f845e25412935fef81c6b:
>
> firmware: xilinx: Properly align function parameter (2020-12-09
> 15:09:11 +0100)
>
> ----------------------------------------------------------------
> arm64: soc: ZynqMP SoC changes for v5.11
>
> - Small alignments in Xilinx Firmware driver
> - Exposing syscon interface for VCU driver
>
> ----------------------------------------------------------------
> Michael Tretter (4):
> soc: xilinx: vcu: drop useless success message
> dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
> soc: xilinx: vcu: use vcu-settings syscon registers
> soc: xilinx: vcu: add missing register NUM_CORE
>
> Michal Simek (4):
> firmware: xilinx: Fix kernel-doc warnings
> firmware: xilinx: Remove additional newline
> firmware: xilinx: Add a blank line after function declaration
> firmware: xilinx: Properly align function parameter
>
> Wendy Liang (1):
> firmware: xlnx-zynqmp: fix compilation warning
>
> Zou Wei (1):
> firmware: xilinx: Mark pm_api_features_map with static keyword
>
> Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml |
> 34 ++++++++++++++++++++++++++++++++++
> Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt |
> 9 ++-------
> drivers/firmware/xilinx/zynqmp.c |
> 48 ++++++++++++++++++++++++------------------------
> drivers/soc/xilinx/Kconfig | 1 +
> drivers/soc/xilinx/xlnx_vcu.c |
> 96
> +++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------
> include/linux/firmware/xlnx-zynqmp.h |
> 45 ++++++++++++++++++++++++++++++++++++++++-----
> include/linux/mfd/syscon/xlnx-vcu.h |
> 39 +++++++++++++++++++++++++++++++++++++++
> 7 files changed, 187 insertions(+), 85 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
> create mode 100644 include/linux/mfd/syscon/xlnx-vcu.h
> [linux](zynqmp/soc)$
>
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
^ permalink raw reply [flat|nested] 12+ messages in thread
* [GIT PULL] arm64: soc: ZynqMP changes for v5.11 (was Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11)
@ 2020-12-09 14:59 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 14:59 UTC (permalink / raw)
To: SoC Team; +Cc: arm-soc, linux-arm-kernel
Hi,
pull request below is correct. I just used incorrect subject line (c&p
error). Sorry about it. Please let me know if you want to send it again.
Thanks,
Michal
On 09. 12. 20 15:51, Michal Simek wrote:
> Hi,
>
> please pull the following changes to your tree. The tree is based on
> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
> Use hash-table for api feature check") which went to v5.10-rc6.
>
> Thanks,
> Michal
>
>
> The following changes since commit acfdd18591eaac25446e976a0c0d190f8b3dbfb1:
>
> firmware: xilinx: Use hash-table for api feature check (2020-11-24
> 15:13:54 +0100)
>
> are available in the Git repository at:
>
> https://github.com/Xilinx/linux-xlnx.git tags/zynqmp-soc-for-v5.11
>
> for you to fetch changes up to b8d6b5c241b3dedaa03f845e25412935fef81c6b:
>
> firmware: xilinx: Properly align function parameter (2020-12-09
> 15:09:11 +0100)
>
> ----------------------------------------------------------------
> arm64: soc: ZynqMP SoC changes for v5.11
>
> - Small alignments in Xilinx Firmware driver
> - Exposing syscon interface for VCU driver
>
> ----------------------------------------------------------------
> Michael Tretter (4):
> soc: xilinx: vcu: drop useless success message
> dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
> soc: xilinx: vcu: use vcu-settings syscon registers
> soc: xilinx: vcu: add missing register NUM_CORE
>
> Michal Simek (4):
> firmware: xilinx: Fix kernel-doc warnings
> firmware: xilinx: Remove additional newline
> firmware: xilinx: Add a blank line after function declaration
> firmware: xilinx: Properly align function parameter
>
> Wendy Liang (1):
> firmware: xlnx-zynqmp: fix compilation warning
>
> Zou Wei (1):
> firmware: xilinx: Mark pm_api_features_map with static keyword
>
> Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml |
> 34 ++++++++++++++++++++++++++++++++++
> Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt |
> 9 ++-------
> drivers/firmware/xilinx/zynqmp.c |
> 48 ++++++++++++++++++++++++------------------------
> drivers/soc/xilinx/Kconfig | 1 +
> drivers/soc/xilinx/xlnx_vcu.c |
> 96
> +++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------
> include/linux/firmware/xlnx-zynqmp.h |
> 45 ++++++++++++++++++++++++++++++++++++++++-----
> include/linux/mfd/syscon/xlnx-vcu.h |
> 39 +++++++++++++++++++++++++++++++++++++++
> 7 files changed, 187 insertions(+), 85 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
> create mode 100644 include/linux/mfd/syscon/xlnx-vcu.h
> [linux](zynqmp/soc)$
>
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 17:01 ` Arnd Bergmann
0 siblings, 0 replies; 12+ messages in thread
From: Arnd Bergmann @ 2020-12-09 17:01 UTC (permalink / raw)
To: Michal Simek; +Cc: SoC Team, linux-arm-kernel, arm-soc
On Wed, Dec 9, 2020 at 3:51 PM Michal Simek <monstr@monstr.eu> wrote:
>
> Hi,
>
> please pull the following changes to your tree. The tree is based on
> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
> Use hash-table for api feature check") which went to v5.10-rc6.
Is it necessary that this is based on top of the bugfix? This means
I'd have to do a backmerged of -rc4 into my dt tree, which is something
I would prefer to avoid.
I also notice that the subject is the same as the DT pull request, which
seems to have messed up patchwork into thinking it is an updated
version of the former. If I had not noticed the backmerge, the DT pull
request would have gotten lost.
Arnd
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 17:01 ` Arnd Bergmann
0 siblings, 0 replies; 12+ messages in thread
From: Arnd Bergmann @ 2020-12-09 17:01 UTC (permalink / raw)
To: Michal Simek; +Cc: SoC Team, arm-soc, linux-arm-kernel
On Wed, Dec 9, 2020 at 3:51 PM Michal Simek <monstr@monstr.eu> wrote:
>
> Hi,
>
> please pull the following changes to your tree. The tree is based on
> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
> Use hash-table for api feature check") which went to v5.10-rc6.
Is it necessary that this is based on top of the bugfix? This means
I'd have to do a backmerged of -rc4 into my dt tree, which is something
I would prefer to avoid.
I also notice that the subject is the same as the DT pull request, which
seems to have messed up patchwork into thinking it is an updated
version of the former. If I had not noticed the backmerge, the DT pull
request would have gotten lost.
Arnd
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 18:06 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 18:06 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: SoC Team, linux-arm-kernel, arm-soc
Hi,
On 09. 12. 20 18:01, Arnd Bergmann wrote:
> On Wed, Dec 9, 2020 at 3:51 PM Michal Simek <monstr@monstr.eu> wrote:
>>
>> Hi,
>>
>> please pull the following changes to your tree. The tree is based on
>> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
>> Use hash-table for api feature check") which went to v5.10-rc6.
>
> Is it necessary that this is based on top of the bugfix? This means
> I'd have to do a backmerged of -rc4 into my dt tree, which is something
> I would prefer to avoid.
The patch from Zou Wei is fixing the hash table patch merge in rc6.
If you think I should drop it and send it after rc1 I am fine with it.
Just let me know which way you prefer.
>
> I also notice that the subject is the same as the DT pull request, which
> seems to have messed up patchwork into thinking it is an updated
> version of the former. If I had not noticed the backmerge, the DT pull
> request would have gotten lost.
I shoot an email that subject was wrong. It is targeting soc tree.
Sorry about it. Let's figured it out the first part about RC and then I
can send new PR with proper subject.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 18:06 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 18:06 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: SoC Team, arm-soc, linux-arm-kernel
Hi,
On 09. 12. 20 18:01, Arnd Bergmann wrote:
> On Wed, Dec 9, 2020 at 3:51 PM Michal Simek <monstr@monstr.eu> wrote:
>>
>> Hi,
>>
>> please pull the following changes to your tree. The tree is based on
>> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
>> Use hash-table for api feature check") which went to v5.10-rc6.
>
> Is it necessary that this is based on top of the bugfix? This means
> I'd have to do a backmerged of -rc4 into my dt tree, which is something
> I would prefer to avoid.
The patch from Zou Wei is fixing the hash table patch merge in rc6.
If you think I should drop it and send it after rc1 I am fine with it.
Just let me know which way you prefer.
>
> I also notice that the subject is the same as the DT pull request, which
> seems to have messed up patchwork into thinking it is an updated
> version of the former. If I had not noticed the backmerge, the DT pull
> request would have gotten lost.
I shoot an email that subject was wrong. It is targeting soc tree.
Sorry about it. Let's figured it out the first part about RC and then I
can send new PR with proper subject.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 19:36 ` Arnd Bergmann
0 siblings, 0 replies; 12+ messages in thread
From: Arnd Bergmann @ 2020-12-09 19:36 UTC (permalink / raw)
To: Michal Simek; +Cc: SoC Team, linux-arm-kernel, arm-soc
On Wed, Dec 9, 2020 at 7:06 PM Michal Simek <monstr@monstr.eu> wrote:
> On 09. 12. 20 18:01, Arnd Bergmann wrote:
> > On Wed, Dec 9, 2020 at 3:51 PM Michal Simek <monstr@monstr.eu> wrote:
> >>
> >> Hi,
> >>
> >> please pull the following changes to your tree. The tree is based on
> >> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
> >> Use hash-table for api feature check") which went to v5.10-rc6.
> >
> > Is it necessary that this is based on top of the bugfix? This means
> > I'd have to do a backmerged of -rc4 into my dt tree, which is something
> > I would prefer to avoid.
>
> The patch from Zou Wei is fixing the hash table patch merge in rc6.
> If you think I should drop it and send it after rc1 I am fine with it.
> Just let me know which way you prefer.
Ah, I see. I thought you meant this was a bugfix that was already
merged in -rc6 and you based the other patches on top of the
bugfix.
Since it's technically a regression fix, I'll cherry-pick this one for
v5.10.
Arnd
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 19:36 ` Arnd Bergmann
0 siblings, 0 replies; 12+ messages in thread
From: Arnd Bergmann @ 2020-12-09 19:36 UTC (permalink / raw)
To: Michal Simek; +Cc: SoC Team, arm-soc, linux-arm-kernel
On Wed, Dec 9, 2020 at 7:06 PM Michal Simek <monstr@monstr.eu> wrote:
> On 09. 12. 20 18:01, Arnd Bergmann wrote:
> > On Wed, Dec 9, 2020 at 3:51 PM Michal Simek <monstr@monstr.eu> wrote:
> >>
> >> Hi,
> >>
> >> please pull the following changes to your tree. The tree is based on
> >> zynqmp-soc-fixes-for-v5.10-rc6 tag or acfdd18591ea ("firmware: xilinx:
> >> Use hash-table for api feature check") which went to v5.10-rc6.
> >
> > Is it necessary that this is based on top of the bugfix? This means
> > I'd have to do a backmerged of -rc4 into my dt tree, which is something
> > I would prefer to avoid.
>
> The patch from Zou Wei is fixing the hash table patch merge in rc6.
> If you think I should drop it and send it after rc1 I am fine with it.
> Just let me know which way you prefer.
Ah, I see. I thought you meant this was a bugfix that was already
merged in -rc6 and you based the other patches on top of the
bugfix.
Since it's technically a regression fix, I'll cherry-pick this one for
v5.10.
Arnd
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 14:41 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 14:41 UTC (permalink / raw)
To: SoC Team; +Cc: arm-soc, linux-arm-kernel
Hi,
pull pull the following patches to your tree.
Thanks,
Michal
The following changes since commit 3650b228f83adda7e5ee532e2b90429c03f7b9ec:
Linux 5.10-rc1 (2020-10-25 15:14:11 -0700)
are available in the Git repository at:
https://github.com/Xilinx/linux-xlnx.git tags/zynq-dt-for-v5.10
for you to fetch changes up to a508f620b5a6e9b359a2baa46ec9a714c3e2f420:
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
(2020-12-09 15:20:11 +0100)
----------------------------------------------------------------
ARM: dts: zynq: DT changes for v5.11
- Adding support for Zturn-v5
- Small DT changes to clean errors from dt_binding_check
----------------------------------------------------------------
Alexandre GRIVEAUX (1):
ARM: zynq: Add Z-turn board V5
Michal Simek (6):
ARM: zynq: Fix compatible string for adi,adxl345 chip
ARM: zynq: Rename bus to be align with simple-bus yaml
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/zynq-7000.dtsi | 2 +-
arch/arm/boot/dts/zynq-zc702.dts | 8 +++++++-
arch/arm/boot/dts/zynq-zc770-xm011.dts | 2 +-
arch/arm/boot/dts/zynq-zc770-xm013.dts | 7 +++----
arch/arm/boot/dts/zynq-zturn-common.dtsi | 112
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/zynq-zturn-v5.dts | 15 +++++++++++++++
arch/arm/boot/dts/zynq-zturn.dts | 101
+----------------------------------------------------------------------------------------------------
arch/arm/boot/dts/zynq-zybo-z7.dts | 2 +-
9 files changed, 142 insertions(+), 108 deletions(-)
create mode 100644 arch/arm/boot/dts/zynq-zturn-common.dtsi
create mode 100644 arch/arm/boot/dts/zynq-zturn-v5.dts
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
^ permalink raw reply [flat|nested] 12+ messages in thread
* [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11
@ 2020-12-09 14:41 ` Michal Simek
0 siblings, 0 replies; 12+ messages in thread
From: Michal Simek @ 2020-12-09 14:41 UTC (permalink / raw)
To: SoC Team; +Cc: arm-soc, linux-arm-kernel
Hi,
pull pull the following patches to your tree.
Thanks,
Michal
The following changes since commit 3650b228f83adda7e5ee532e2b90429c03f7b9ec:
Linux 5.10-rc1 (2020-10-25 15:14:11 -0700)
are available in the Git repository at:
https://github.com/Xilinx/linux-xlnx.git tags/zynq-dt-for-v5.10
for you to fetch changes up to a508f620b5a6e9b359a2baa46ec9a714c3e2f420:
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
(2020-12-09 15:20:11 +0100)
----------------------------------------------------------------
ARM: dts: zynq: DT changes for v5.11
- Adding support for Zturn-v5
- Small DT changes to clean errors from dt_binding_check
----------------------------------------------------------------
Alexandre GRIVEAUX (1):
ARM: zynq: Add Z-turn board V5
Michal Simek (6):
ARM: zynq: Fix compatible string for adi,adxl345 chip
ARM: zynq: Rename bus to be align with simple-bus yaml
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/zynq-7000.dtsi | 2 +-
arch/arm/boot/dts/zynq-zc702.dts | 8 +++++++-
arch/arm/boot/dts/zynq-zc770-xm011.dts | 2 +-
arch/arm/boot/dts/zynq-zc770-xm013.dts | 7 +++----
arch/arm/boot/dts/zynq-zturn-common.dtsi | 112
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/zynq-zturn-v5.dts | 15 +++++++++++++++
arch/arm/boot/dts/zynq-zturn.dts | 101
+----------------------------------------------------------------------------------------------------
arch/arm/boot/dts/zynq-zybo-z7.dts | 2 +-
9 files changed, 142 insertions(+), 108 deletions(-)
create mode 100644 arch/arm/boot/dts/zynq-zturn-common.dtsi
create mode 100644 arch/arm/boot/dts/zynq-zturn-v5.dts
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-12-09 19:37 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-09 14:51 [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11 Michal Simek
2020-12-09 14:51 ` Michal Simek
2020-12-09 14:59 ` [GIT PULL] arm64: soc: ZynqMP changes for v5.11 (was Re: [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11) Michal Simek
2020-12-09 14:59 ` Michal Simek
2020-12-09 17:01 ` [GIT PULL] ARM: dts zynq: Xilinx DT changes for v5.11 Arnd Bergmann
2020-12-09 17:01 ` Arnd Bergmann
2020-12-09 18:06 ` Michal Simek
2020-12-09 18:06 ` Michal Simek
2020-12-09 19:36 ` Arnd Bergmann
2020-12-09 19:36 ` Arnd Bergmann
-- strict thread matches above, loose matches on Subject: below --
2020-12-09 14:41 Michal Simek
2020-12-09 14:41 ` Michal Simek
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