All of lore.kernel.org
 help / color / mirror / Atom feed
From: Arnd Bergmann <arnd@arndb.de>
To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Russell King <linux@armlinux.org.uk>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Phil Elwell <phil@raspberrypi.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Stefan Wahren <wahrenst@gmx.net>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	"moderated list:BROADCOM BCM2835 ARM ARCHITECTURE" 
	<linux-rpi-kernel@lists.infradead.org>
Subject: Re: [RFC] ARM: add multi_v7_lpae_defconfig
Date: Wed, 12 Feb 2020 21:19:29 +0100	[thread overview]
Message-ID: <CAK8P3a1tLrkymeJfXvDk_kxPvW_PQy6zNmrmO++dOPCWm71vOA@mail.gmail.com> (raw)
In-Reply-To: <20200110173425.21895-1-nsaenzjulienne@suse.de>

On Fri, Jan 10, 2020 at 6:35 PM Nicolas Saenz Julienne
<nsaenzjulienne@suse.de> wrote:
>
> The only missing configuration option preventing us from using
> multi_v7_defconfig with the RPi4 is ARM_LPAE. It's needed as the PCIe
> controller found on the SoC depends on 64bit addressing, yet can't be
> included as not all v7 boards support LPAE.
>
> Introduce multi_v7_lpae_defconfig, built off multi_v7_defconfig, which will
> avoid us having to duplicate and maintain multiple similar configurations.
>
> Note that merge_into_defconfig was taken from arch/powerpc/Makefile.
>
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

I like the idea, but I would note that a lot of platforms enabled in
multi_v7_defconfig do not support LPAE. In particular, the first ARMv7
cores (Cortex-A8, -A9, -A5, and PJ4) don't, but the later ones (Cortex-A7,
-A15, -A17, and PJ4C-MP) do.

Here is a list from the defconfig file

CONFIG_ARCH_VIRT=y
CONFIG_ARCH_ALPINE=y
CONFIG_ARCH_ARTPEC=y
CONFIG_MACH_ARTPEC6=y

Artpec is A9

CONFIG_ARCH_ASPEED=y
CONFIG_MACH_ASPEED_G6=y
CONFIG_ARCH_AT91=y
CONFIG_SOC_SAMA5D2=y
CONFIG_SOC_SAMA5D3=y
CONFIG_SOC_SAMA5D4=y

AT91/SAMA5 is A5

CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_CYGNUS=y
CONFIG_ARCH_BCM_HR2=y
CONFIG_ARCH_BCM_NSP=y
CONFIG_ARCH_BCM_5301X=y
CONFIG_ARCH_BCM_281XX=y
CONFIG_ARCH_BCM_21664=y
CONFIG_ARCH_BCM_63XX=y
CONFIG_ARCH_BRCMSTB=y

I think most of the above are A9, but not sure

CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_BERLIN=y
CONFIG_MACH_BERLIN_BG2CD=y
CONFIG_MACH_BERLIN_BG2Q=y
CONFIG_MACH_BERLIN_BG2=y

These are mixed, I think BG2CD is A7, but the older ones are A9 or PJ4

CONFIG_ARCH_DIGICOLOR=y

CX92755 is an A8

CONFIG_ARCH_EXYNOS=y

exynos is a mix of A9 and A15/A7, so this is fine

CONFIG_ARCH_HIGHBANK=y

A9 and A15, also fine

CONFIG_ARCH_HISI=y
CONFIG_ARCH_HI3xxx=y
CONFIG_ARCH_HIP01=y
CONFIG_ARCH_HIP04=y
CONFIG_ARCH_HIX5HD2=y
CONFIG_ARCH_MXC=y
CONFIG_SOC_IMX50=y
CONFIG_SOC_IMX51=y
CONFIG_SOC_IMX53=y

IMX5 is A8

CONFIG_SOC_IMX6Q=y
CONFIG_SOC_IMX6SL=y
CONFIG_SOC_IMX6SX=y

These older imx6 variants are A9, but the 6UL and 7D are A7.

CONFIG_SOC_IMX6UL=y
CONFIG_SOC_LS1021A=y
CONFIG_SOC_IMX7D=y
CONFIG_SOC_VF610=y

VF610 is an A5

CONFIG_ARCH_KEYSTONE=y
CONFIG_ARCH_MEDIATEK=y

Mediatek is mostly A7, but some A9

CONFIG_ARCH_MESON=y

Mixed

CONFIG_ARCH_MILBEAUT=y
CONFIG_ARCH_MILBEAUT_M10V=y
CONFIG_ARCH_MMP=y
CONFIG_MACH_MMP2_DT=y
CONFIG_MACH_MMP3_DT=y

MMP is a PJ4, I don't think there is LPAE, but not sure

CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_375=y
CONFIG_MACH_ARMADA_38X=y
CONFIG_MACH_ARMADA_39X=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_MACH_DOVE=y

Fairly sure only Armada XP has LPAE out of these

CONFIG_ARCH_OMAP3=y
CONFIG_ARCH_OMAP4=y
CONFIG_SOC_OMAP5=y
CONFIG_SOC_AM33XX=y
CONFIG_SOC_AM43XX=y
CONFIG_SOC_DRA7XX=y

only OMAP5 and DRA7 use an A15, the others are A8 or A9

CONFIG_ARCH_SIRF=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_MSM8X60=y
CONFIG_ARCH_MSM8960=y
CONFIG_ARCH_MSM8974=y

Not sure whether there is LPAE on Qualcomm's custom cores

CONFIG_ARCH_ROCKCHIP=y

Mixed

CONFIG_ARCH_RENESAS=y

Mixed

CONFIG_ARCH_SOCFPGA=y

A9 only

CONFIG_PLAT_SPEAR=y
CONFIG_ARCH_SPEAR13XX=y
CONFIG_MACH_SPEAR1310=y
CONFIG_MACH_SPEAR1340=y

A9 only

CONFIG_ARCH_STI=y
CONFIG_ARCH_STM32=y
CONFIG_ARCH_SUNXI=y

sunxi has A8 and A7 (and one that is A15+A7)

CONFIG_ARCH_TEGRA=y

Mixed

CONFIG_ARCH_UNIPHIER=y

 A9 only so far

CONFIG_ARCH_U8500=y

A9 only

CONFIG_ARCH_VEXPRESS=y

A9 or A15

CONFIG_ARCH_WM8850=y

A9

CONFIG_ARCH_ZYNQ=y

A9

I think it would make sense to either turn off the various A8/A9/A5 platforms
in the fragment, or add a CONFIG_ARCH_MULTI_V7VE option, and then
change the Kconfig dependencies so that the older platforms get turned off
when only V7 but not V7VE is set.

      Arnd

WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@arndb.de>
To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	Phil Elwell <phil@raspberrypi.org>,
	Russell King <linux@armlinux.org.uk>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Stefan Wahren <wahrenst@gmx.net>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	"moderated list:BROADCOM BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists.infradead.org>
Subject: Re: [RFC] ARM: add multi_v7_lpae_defconfig
Date: Wed, 12 Feb 2020 21:19:29 +0100	[thread overview]
Message-ID: <CAK8P3a1tLrkymeJfXvDk_kxPvW_PQy6zNmrmO++dOPCWm71vOA@mail.gmail.com> (raw)
In-Reply-To: <20200110173425.21895-1-nsaenzjulienne@suse.de>

On Fri, Jan 10, 2020 at 6:35 PM Nicolas Saenz Julienne
<nsaenzjulienne@suse.de> wrote:
>
> The only missing configuration option preventing us from using
> multi_v7_defconfig with the RPi4 is ARM_LPAE. It's needed as the PCIe
> controller found on the SoC depends on 64bit addressing, yet can't be
> included as not all v7 boards support LPAE.
>
> Introduce multi_v7_lpae_defconfig, built off multi_v7_defconfig, which will
> avoid us having to duplicate and maintain multiple similar configurations.
>
> Note that merge_into_defconfig was taken from arch/powerpc/Makefile.
>
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

I like the idea, but I would note that a lot of platforms enabled in
multi_v7_defconfig do not support LPAE. In particular, the first ARMv7
cores (Cortex-A8, -A9, -A5, and PJ4) don't, but the later ones (Cortex-A7,
-A15, -A17, and PJ4C-MP) do.

Here is a list from the defconfig file

CONFIG_ARCH_VIRT=y
CONFIG_ARCH_ALPINE=y
CONFIG_ARCH_ARTPEC=y
CONFIG_MACH_ARTPEC6=y

Artpec is A9

CONFIG_ARCH_ASPEED=y
CONFIG_MACH_ASPEED_G6=y
CONFIG_ARCH_AT91=y
CONFIG_SOC_SAMA5D2=y
CONFIG_SOC_SAMA5D3=y
CONFIG_SOC_SAMA5D4=y

AT91/SAMA5 is A5

CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_CYGNUS=y
CONFIG_ARCH_BCM_HR2=y
CONFIG_ARCH_BCM_NSP=y
CONFIG_ARCH_BCM_5301X=y
CONFIG_ARCH_BCM_281XX=y
CONFIG_ARCH_BCM_21664=y
CONFIG_ARCH_BCM_63XX=y
CONFIG_ARCH_BRCMSTB=y

I think most of the above are A9, but not sure

CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_BERLIN=y
CONFIG_MACH_BERLIN_BG2CD=y
CONFIG_MACH_BERLIN_BG2Q=y
CONFIG_MACH_BERLIN_BG2=y

These are mixed, I think BG2CD is A7, but the older ones are A9 or PJ4

CONFIG_ARCH_DIGICOLOR=y

CX92755 is an A8

CONFIG_ARCH_EXYNOS=y

exynos is a mix of A9 and A15/A7, so this is fine

CONFIG_ARCH_HIGHBANK=y

A9 and A15, also fine

CONFIG_ARCH_HISI=y
CONFIG_ARCH_HI3xxx=y
CONFIG_ARCH_HIP01=y
CONFIG_ARCH_HIP04=y
CONFIG_ARCH_HIX5HD2=y
CONFIG_ARCH_MXC=y
CONFIG_SOC_IMX50=y
CONFIG_SOC_IMX51=y
CONFIG_SOC_IMX53=y

IMX5 is A8

CONFIG_SOC_IMX6Q=y
CONFIG_SOC_IMX6SL=y
CONFIG_SOC_IMX6SX=y

These older imx6 variants are A9, but the 6UL and 7D are A7.

CONFIG_SOC_IMX6UL=y
CONFIG_SOC_LS1021A=y
CONFIG_SOC_IMX7D=y
CONFIG_SOC_VF610=y

VF610 is an A5

CONFIG_ARCH_KEYSTONE=y
CONFIG_ARCH_MEDIATEK=y

Mediatek is mostly A7, but some A9

CONFIG_ARCH_MESON=y

Mixed

CONFIG_ARCH_MILBEAUT=y
CONFIG_ARCH_MILBEAUT_M10V=y
CONFIG_ARCH_MMP=y
CONFIG_MACH_MMP2_DT=y
CONFIG_MACH_MMP3_DT=y

MMP is a PJ4, I don't think there is LPAE, but not sure

CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_375=y
CONFIG_MACH_ARMADA_38X=y
CONFIG_MACH_ARMADA_39X=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_MACH_DOVE=y

Fairly sure only Armada XP has LPAE out of these

CONFIG_ARCH_OMAP3=y
CONFIG_ARCH_OMAP4=y
CONFIG_SOC_OMAP5=y
CONFIG_SOC_AM33XX=y
CONFIG_SOC_AM43XX=y
CONFIG_SOC_DRA7XX=y

only OMAP5 and DRA7 use an A15, the others are A8 or A9

CONFIG_ARCH_SIRF=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_MSM8X60=y
CONFIG_ARCH_MSM8960=y
CONFIG_ARCH_MSM8974=y

Not sure whether there is LPAE on Qualcomm's custom cores

CONFIG_ARCH_ROCKCHIP=y

Mixed

CONFIG_ARCH_RENESAS=y

Mixed

CONFIG_ARCH_SOCFPGA=y

A9 only

CONFIG_PLAT_SPEAR=y
CONFIG_ARCH_SPEAR13XX=y
CONFIG_MACH_SPEAR1310=y
CONFIG_MACH_SPEAR1340=y

A9 only

CONFIG_ARCH_STI=y
CONFIG_ARCH_STM32=y
CONFIG_ARCH_SUNXI=y

sunxi has A8 and A7 (and one that is A15+A7)

CONFIG_ARCH_TEGRA=y

Mixed

CONFIG_ARCH_UNIPHIER=y

 A9 only so far

CONFIG_ARCH_U8500=y

A9 only

CONFIG_ARCH_VEXPRESS=y

A9 or A15

CONFIG_ARCH_WM8850=y

A9

CONFIG_ARCH_ZYNQ=y

A9

I think it would make sense to either turn off the various A8/A9/A5 platforms
in the fragment, or add a CONFIG_ARCH_MULTI_V7VE option, and then
change the Kconfig dependencies so that the older platforms get turned off
when only V7 but not V7VE is set.

      Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-02-12 20:19 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-10 17:34 [RFC] ARM: add multi_v7_lpae_defconfig Nicolas Saenz Julienne
2020-01-10 17:34 ` Nicolas Saenz Julienne
2020-01-10 17:56 ` Florian Fainelli
2020-01-10 17:56   ` Florian Fainelli
2020-02-12 20:19 ` Arnd Bergmann [this message]
2020-02-12 20:19   ` Arnd Bergmann
2020-02-12 20:27   ` Florian Fainelli
2020-02-12 20:27     ` Florian Fainelli

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAK8P3a1tLrkymeJfXvDk_kxPvW_PQy6zNmrmO++dOPCWm71vOA@mail.gmail.com \
    --to=arnd@arndb.de \
    --cc=f.fainelli@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rpi-kernel@lists.infradead.org \
    --cc=linux@armlinux.org.uk \
    --cc=nsaenzjulienne@suse.de \
    --cc=phil@raspberrypi.org \
    --cc=wahrenst@gmx.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.