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* qemu support for rv64imafd/rv64imafdc
@ 2021-02-10 10:10 Billa Surendra
  2021-02-10 20:28 ` Palmer Dabbelt
  0 siblings, 1 reply; 3+ messages in thread
From: Billa Surendra @ 2021-02-10 10:10 UTC (permalink / raw)
  To: qemu-riscv

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Dear all,

Does riscv qemu support  both kernel image generated with RV64IMAFD
extensions and Image generated with RV64IMAFDC ?. If the answer is yes, how
is it supporting both ?. Please reply to my question if anyone knows.

Thanks in advance
Billa

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: qemu support for rv64imafd/rv64imafdc
  2021-02-10 10:10 qemu support for rv64imafd/rv64imafdc Billa Surendra
@ 2021-02-10 20:28 ` Palmer Dabbelt
  2021-02-11  1:45   ` Billa Surendra
  0 siblings, 1 reply; 3+ messages in thread
From: Palmer Dabbelt @ 2021-02-10 20:28 UTC (permalink / raw)
  To: billa.iitmadras; +Cc: qemu-riscv

On Wed, 10 Feb 2021 02:10:35 PST (-0800), billa.iitmadras@gmail.com wrote:
> Does riscv qemu support  both kernel image generated with RV64IMAFD
> extensions and Image generated with RV64IMAFDC ?. If the answer is yes, how
> is it supporting both ?. Please reply to my question if anyone knows.

You can use CPU properties to enable/disable various ISA subsets.  Something like

    qemu-system-riscv64 -cpu rv64,c=off

would turn C off.  The other supported ISA subsets can be enabled/disabled in a
similar fashion, including everything you listed.  There's no known reason
RV64G (ie, non-C) kernels wouldn't work but they're not widely used so you may
run into some long-tail issues.  You need C for EFI, but most people aren't
using that on RISC-V yet.


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: qemu support for rv64imafd/rv64imafdc
  2021-02-10 20:28 ` Palmer Dabbelt
@ 2021-02-11  1:45   ` Billa Surendra
  0 siblings, 0 replies; 3+ messages in thread
From: Billa Surendra @ 2021-02-11  1:45 UTC (permalink / raw)
  To: Palmer Dabbelt; +Cc: qemu-riscv

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Thanks for the info.

On Thu, 11 Feb, 2021, 1:58 am Palmer Dabbelt, <palmer@dabbelt.com> wrote:

> On Wed, 10 Feb 2021 02:10:35 PST (-0800), billa.iitmadras@gmail.com wrote:
> > Does riscv qemu support  both kernel image generated with RV64IMAFD
> > extensions and Image generated with RV64IMAFDC ?. If the answer is yes,
> how
> > is it supporting both ?. Please reply to my question if anyone knows.
>
> You can use CPU properties to enable/disable various ISA subsets.
> Something like
>
>     qemu-system-riscv64 -cpu rv64,c=off
>
> would turn C off.  The other supported ISA subsets can be enabled/disabled
> in a
> similar fashion, including everything you listed.  There's no known reason
> RV64G (ie, non-C) kernels wouldn't work but they're not widely used so you
> may
> run into some long-tail issues.  You need C for EFI, but most people aren't
> using that on RISC-V yet.
>

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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-02-11  1:45 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-02-10 10:10 qemu support for rv64imafd/rv64imafdc Billa Surendra
2021-02-10 20:28 ` Palmer Dabbelt
2021-02-11  1:45   ` Billa Surendra

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