Re: [PATCH v2 1/3] drm/i915: Disable primary plane trickle feed for g4x

[Daniel Vetter <daniel@ffwll.ch>]

On Tue, May 21, 2013 at 2:35 PM, Ville Syrjälä
<ville.syrjala@linux.intel.com> wrote:
> On Tue, May 21, 2013 at 03:28:32PM +0300, ville.syrjala@linux.intel.com wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> The docs say that the trickle feed disable bit is present (for primary
>> planes only, not video sprites) on CTG, and that it must be set
>> for ELK. Just set it for all g4x chipsets.
>>
>> v2: Do it in init_clock_gating too
>
> Actually I just noticed that we don't set up this stuff in
> ironlake_init_clock_gating() either. Any opinions whether I should just
> kill the per-plane trickle feed stuff from *_init_clock_gating(), or
> should I add it to ironlake_init_clock_gating() as well?

This is a bit a crazy topic since conceptually it ties into the
wm/pipe-config stuff. And fastboot will make this stuff rather
interesting ... I expect that we'll eventually end up with a
post_modeset_fixup stage to patch up all these little bits&pieces -
fastboot would only call that one if possible.

For now I'm not sure what to do though. Ideas highly welcome ;-)
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch