* [PATCH] perf-c2c: Fix the wrong description.
@ 2020-07-09 13:03 qianjun
2020-07-22 5:03 ` jun qian
0 siblings, 1 reply; 2+ messages in thread
From: qianjun @ 2020-07-09 13:03 UTC (permalink / raw)
To: peterz, mingo, acme; +Cc: linux-kernel, qianjun
From: qianjun <qianjun@didiglobal.com>
Use L1Miss to replace L1Hit to describe the correct scene
Signed-off-by: qianjun <qianjun@didiglobal.com>
---
tools/perf/Documentation/perf-c2c.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/Documentation/perf-c2c.txt b/tools/perf/Documentation/perf-c2c.txt
index 98efdab..083e99a 100644
--- a/tools/perf/Documentation/perf-c2c.txt
+++ b/tools/perf/Documentation/perf-c2c.txt
@@ -186,7 +186,7 @@ For each cacheline in the 1) list we display following data:
Store Reference - Total, L1Hit, L1Miss
Total - all store accesses
L1Hit - store accesses that hit L1
- L1Hit - store accesses that missed L1
+ L1Miss - store accesses that missed L1
Load Dram
- count of local and remote DRAM accesses
--
1.8.3.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] perf-c2c: Fix the wrong description.
2020-07-09 13:03 [PATCH] perf-c2c: Fix the wrong description qianjun
@ 2020-07-22 5:03 ` jun qian
0 siblings, 0 replies; 2+ messages in thread
From: jun qian @ 2020-07-22 5:03 UTC (permalink / raw)
To: peterz, mingo, acme; +Cc: linux-kernel, qianjun, Yafang Shao
On Thu, Jul 9, 2020 at 9:07 PM qianjun <qianjun.kernel@gmail.com> wrote:
>
> From: qianjun <qianjun@didiglobal.com>
>
> Use L1Miss to replace L1Hit to describe the correct scene
>
> Signed-off-by: qianjun <qianjun@didiglobal.com>
> ---
> tools/perf/Documentation/perf-c2c.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/perf/Documentation/perf-c2c.txt b/tools/perf/Documentation/perf-c2c.txt
> index 98efdab..083e99a 100644
> --- a/tools/perf/Documentation/perf-c2c.txt
> +++ b/tools/perf/Documentation/perf-c2c.txt
> @@ -186,7 +186,7 @@ For each cacheline in the 1) list we display following data:
> Store Reference - Total, L1Hit, L1Miss
> Total - all store accesses
> L1Hit - store accesses that hit L1
> - L1Hit - store accesses that missed L1
> + L1Miss - store accesses that missed L1
>
> Load Dram
> - count of local and remote DRAM accesses
> --
> 1.8.3.1
>
hi man
I think it's a problem :)
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2020-07-09 13:03 [PATCH] perf-c2c: Fix the wrong description qianjun
2020-07-22 5:03 ` jun qian
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