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* [PATCH V2] python-numpy: Add support for riscv32
@ 2020-11-16 19:55 Khem Raj
  2020-11-16 22:02 ` [OE-core] " Alistair Francis
  0 siblings, 1 reply; 2+ messages in thread
From: Khem Raj @ 2020-11-16 19:55 UTC (permalink / raw)
  To: openembedded-core; +Cc: Khem Raj

Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
v2: Address upstream comments in proposed patch

 ...1-numpy-core-Define-RISCV-32-support.patch | 56 +++++++++++++++++++
 .../python-numpy/python-numpy.inc             |  1 +
 2 files changed, 57 insertions(+)
 create mode 100644 meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch

diff --git a/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch b/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch
new file mode 100644
index 0000000000..b60ca1d216
--- /dev/null
+++ b/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch
@@ -0,0 +1,56 @@
+From dbcf296f84e5cef6a3ff0f1c469a4508f1e0fb15 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Sun, 15 Nov 2020 15:32:39 -0800
+Subject: [PATCH] numpy/core: Define RISCV-32 support
+
+Helps compile on riscv32
+
+Upstream-Status: Submitted [https://github.com/numpy/numpy/pull/17780]
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ numpy/core/include/numpy/npy_cpu.h    | 9 +++++++--
+ numpy/core/include/numpy/npy_endian.h | 1 +
+ 2 files changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h
+index 4dbf9d84e..bc41a7eda 100644
+--- a/numpy/core/include/numpy/npy_cpu.h
++++ b/numpy/core/include/numpy/npy_cpu.h
+@@ -18,6 +18,7 @@
+  *              NPY_CPU_ARCEL
+  *              NPY_CPU_ARCEB
+  *              NPY_CPU_RISCV64
++ *              NPY_CPU_RISCV32
+  *              NPY_CPU_WASM
+  */
+ #ifndef _NPY_CPUARCH_H_
+@@ -100,8 +101,12 @@
+     #define NPY_CPU_ARCEL
+ #elif defined(__arc__) && defined(__BIG_ENDIAN__)
+     #define NPY_CPU_ARCEB
+-#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64
+-    #define NPY_CPU_RISCV64
++#elif defined(__riscv)
++    #if __riscv_xlen == 64
++	#define NPY_CPU_RISCV64
++    #elif __riscv_xlen == 32
++	#define NPY_CPU_RISCV32
++    #endif
+ #elif defined(__EMSCRIPTEN__)
+     /* __EMSCRIPTEN__ is defined by emscripten: an LLVM-to-Web compiler */
+     #define NPY_CPU_WASM
+diff --git a/numpy/core/include/numpy/npy_endian.h b/numpy/core/include/numpy/npy_endian.h
+index aa367a002..d59484573 100644
+--- a/numpy/core/include/numpy/npy_endian.h
++++ b/numpy/core/include/numpy/npy_endian.h
+@@ -49,6 +49,7 @@
+             || defined(NPY_CPU_PPC64LE)       \
+             || defined(NPY_CPU_ARCEL)         \
+             || defined(NPY_CPU_RISCV64)       \
++            || defined(NPY_CPU_RISCV32)       \
+             || defined(NPY_CPU_WASM)
+         #define NPY_BYTE_ORDER NPY_LITTLE_ENDIAN
+     #elif defined(NPY_CPU_PPC)                \
+-- 
+2.29.2
+
diff --git a/meta/recipes-devtools/python-numpy/python-numpy.inc b/meta/recipes-devtools/python-numpy/python-numpy.inc
index b1058b26c8..40f81046ee 100644
--- a/meta/recipes-devtools/python-numpy/python-numpy.inc
+++ b/meta/recipes-devtools/python-numpy/python-numpy.inc
@@ -7,6 +7,7 @@ SRCNAME = "numpy"
 
 SRC_URI = "https://github.com/${SRCNAME}/${SRCNAME}/releases/download/v${PV}/${SRCNAME}-${PV}.tar.gz \
            file://0001-Don-t-search-usr-and-so-on-for-libraries-by-default-.patch \
+           file://0001-numpy-core-Define-RISCV-32-support.patch \
            "
 SRC_URI[sha256sum] = "9179d259a9bc53ed7b153d31fc3156d1ca560d61079f53191cf177c3efc4a498"
 
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 2+ messages in thread
* Re: [OE-core] [PATCH V2] python-numpy: Add support for riscv32
  2020-11-16 19:55 [PATCH V2] python-numpy: Add support for riscv32 Khem Raj
@ 2020-11-16 22:02 ` Alistair Francis
  0 siblings, 0 replies; 2+ messages in thread
From: Alistair Francis @ 2020-11-16 22:02 UTC (permalink / raw)
  To: Khem Raj; +Cc: OE-core

On Mon, Nov 16, 2020 at 11:56 AM Khem Raj <raj.khem@gmail.com> wrote:
>
> Signed-off-by: Khem Raj <raj.khem@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
> v2: Address upstream comments in proposed patch
>
>  ...1-numpy-core-Define-RISCV-32-support.patch | 56 +++++++++++++++++++
>  .../python-numpy/python-numpy.inc             |  1 +
>  2 files changed, 57 insertions(+)
>  create mode 100644 meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch
>
> diff --git a/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch b/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch
> new file mode 100644
> index 0000000000..b60ca1d216
> --- /dev/null
> +++ b/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch
> @@ -0,0 +1,56 @@
> +From dbcf296f84e5cef6a3ff0f1c469a4508f1e0fb15 Mon Sep 17 00:00:00 2001
> +From: Khem Raj <raj.khem@gmail.com>
> +Date: Sun, 15 Nov 2020 15:32:39 -0800
> +Subject: [PATCH] numpy/core: Define RISCV-32 support
> +
> +Helps compile on riscv32
> +
> +Upstream-Status: Submitted [https://github.com/numpy/numpy/pull/17780]
> +Signed-off-by: Khem Raj <raj.khem@gmail.com>
> +---
> + numpy/core/include/numpy/npy_cpu.h    | 9 +++++++--
> + numpy/core/include/numpy/npy_endian.h | 1 +
> + 2 files changed, 8 insertions(+), 2 deletions(-)
> +
> +diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h
> +index 4dbf9d84e..bc41a7eda 100644
> +--- a/numpy/core/include/numpy/npy_cpu.h
> ++++ b/numpy/core/include/numpy/npy_cpu.h
> +@@ -18,6 +18,7 @@
> +  *              NPY_CPU_ARCEL
> +  *              NPY_CPU_ARCEB
> +  *              NPY_CPU_RISCV64
> ++ *              NPY_CPU_RISCV32
> +  *              NPY_CPU_WASM
> +  */
> + #ifndef _NPY_CPUARCH_H_
> +@@ -100,8 +101,12 @@
> +     #define NPY_CPU_ARCEL
> + #elif defined(__arc__) && defined(__BIG_ENDIAN__)
> +     #define NPY_CPU_ARCEB
> +-#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64
> +-    #define NPY_CPU_RISCV64
> ++#elif defined(__riscv)
> ++    #if __riscv_xlen == 64
> ++      #define NPY_CPU_RISCV64
> ++    #elif __riscv_xlen == 32
> ++      #define NPY_CPU_RISCV32
> ++    #endif
> + #elif defined(__EMSCRIPTEN__)
> +     /* __EMSCRIPTEN__ is defined by emscripten: an LLVM-to-Web compiler */
> +     #define NPY_CPU_WASM
> +diff --git a/numpy/core/include/numpy/npy_endian.h b/numpy/core/include/numpy/npy_endian.h
> +index aa367a002..d59484573 100644
> +--- a/numpy/core/include/numpy/npy_endian.h
> ++++ b/numpy/core/include/numpy/npy_endian.h
> +@@ -49,6 +49,7 @@
> +             || defined(NPY_CPU_PPC64LE)       \
> +             || defined(NPY_CPU_ARCEL)         \
> +             || defined(NPY_CPU_RISCV64)       \
> ++            || defined(NPY_CPU_RISCV32)       \
> +             || defined(NPY_CPU_WASM)
> +         #define NPY_BYTE_ORDER NPY_LITTLE_ENDIAN
> +     #elif defined(NPY_CPU_PPC)                \
> +--
> +2.29.2
> +
> diff --git a/meta/recipes-devtools/python-numpy/python-numpy.inc b/meta/recipes-devtools/python-numpy/python-numpy.inc
> index b1058b26c8..40f81046ee 100644
> --- a/meta/recipes-devtools/python-numpy/python-numpy.inc
> +++ b/meta/recipes-devtools/python-numpy/python-numpy.inc
> @@ -7,6 +7,7 @@ SRCNAME = "numpy"
>
>  SRC_URI = "https://github.com/${SRCNAME}/${SRCNAME}/releases/download/v${PV}/${SRCNAME}-${PV}.tar.gz \
>             file://0001-Don-t-search-usr-and-so-on-for-libraries-by-default-.patch \
> +           file://0001-numpy-core-Define-RISCV-32-support.patch \
>             "
>  SRC_URI[sha256sum] = "9179d259a9bc53ed7b153d31fc3156d1ca560d61079f53191cf177c3efc4a498"
>
> --
> 2.29.2
>
>
> 
>

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2020-11-16 19:55 [PATCH V2] python-numpy: Add support for riscv32 Khem Raj
2020-11-16 22:02 ` [OE-core] " Alistair Francis

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