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From: Alistair Francis <alistair23@gmail.com>
To: pannengyuan@huawei.com
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
	zhang.zhanghailiang@huawei.com,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH] riscv/sifive_u: fix a memory leak in soc_realize()
Date: Tue, 10 Dec 2019 10:38:29 -0800	[thread overview]
Message-ID: <CAKmqyKNH0NdhksX35C7Cm1e51in-iRBrmH8TJWGYregCgLgO6w@mail.gmail.com> (raw)
In-Reply-To: <1575962077-28800-1-git-send-email-pannengyuan@huawei.com>

On Mon, Dec 9, 2019 at 11:15 PM <pannengyuan@huawei.com> wrote:
>
> From: Pan Nengyuan <pannengyuan@huawei.com>
>
> Fix a minor memory leak in riscv_sifive_u_soc_realize()
>
> Reported-by: Euler Robot <euler.robot@huawei.com>
> Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/sifive_u.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 0140e95..0e12b3c 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
>          SIFIVE_U_PLIC_CONTEXT_BASE,
>          SIFIVE_U_PLIC_CONTEXT_STRIDE,
>          memmap[SIFIVE_U_PLIC].size);
> +    g_free(plic_hart_config);
>      sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base,
>          serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ));
>      sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base,
> --
> 2.7.2.windows.1
>
>
>


WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com>
To: pannengyuan@huawei.com
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	 Sagar Karandikar <sagark@eecs.berkeley.edu>,
	 Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	"open list:RISC-V" <qemu-riscv@nongnu.org>,
	 "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	zhang.zhanghailiang@huawei.com
Subject: Re: [PATCH] riscv/sifive_u: fix a memory leak in soc_realize()
Date: Tue, 10 Dec 2019 10:38:29 -0800	[thread overview]
Message-ID: <CAKmqyKNH0NdhksX35C7Cm1e51in-iRBrmH8TJWGYregCgLgO6w@mail.gmail.com> (raw)
In-Reply-To: <1575962077-28800-1-git-send-email-pannengyuan@huawei.com>

On Mon, Dec 9, 2019 at 11:15 PM <pannengyuan@huawei.com> wrote:
>
> From: Pan Nengyuan <pannengyuan@huawei.com>
>
> Fix a minor memory leak in riscv_sifive_u_soc_realize()
>
> Reported-by: Euler Robot <euler.robot@huawei.com>
> Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/sifive_u.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 0140e95..0e12b3c 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
>          SIFIVE_U_PLIC_CONTEXT_BASE,
>          SIFIVE_U_PLIC_CONTEXT_STRIDE,
>          memmap[SIFIVE_U_PLIC].size);
> +    g_free(plic_hart_config);
>      sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base,
>          serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ));
>      sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base,
> --
> 2.7.2.windows.1
>
>
>


  parent reply	other threads:[~2019-12-10 18:39 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-10  7:14 [PATCH] riscv/sifive_u: fix a memory leak in soc_realize() pannengyuan
2019-12-10  7:14 ` pannengyuan
2019-12-10  7:46 ` Philippe Mathieu-Daudé
2019-12-10 18:38 ` Alistair Francis [this message]
2019-12-10 18:38   ` Alistair Francis
2020-01-09 23:42 ` Palmer Dabbelt

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