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From: Alistair Francis <alistair23@gmail.com>
To: Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmer@sifive.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [Qemu-devel] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct access size
Date: Tue, 21 May 2019 15:31:00 -0700	[thread overview]
Message-ID: <CAKmqyKOaPEC=YdbwJkqZJBwTw++_9Cum5HSChtfnx7_uOmZ_HQ@mail.gmail.com> (raw)
In-Reply-To: <20190521104324.12835-5-Hesham.Almatary@cl.cam.ac.uk>

On Tue, May 21, 2019 at 3:45 AM Hesham Almatary
<Hesham.Almatary@cl.cam.ac.uk> wrote:
>
> The PMP check should be of the memory access size rather
> than TARGET_PAGE_SIZE.
>
> Signed-off-by: Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index d0b0f9cf88..ce1f47e4e3 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -410,7 +410,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>
>      if (riscv_feature(env, RISCV_FEATURE_PMP) &&
>          (ret == TRANSLATE_SUCCESS) &&
> -        !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type)) {
> +        !pmp_hart_has_privs(env, pa, size, 1 << access_type)) {
>          ret = TRANSLATE_PMP_FAIL;
>      }
>      if (ret == TRANSLATE_PMP_FAIL) {
> --
> 2.17.1
>
>


WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com>
To: Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	 Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmer@sifive.com>,
	 "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct access size
Date: Tue, 21 May 2019 15:31:00 -0700	[thread overview]
Message-ID: <CAKmqyKOaPEC=YdbwJkqZJBwTw++_9Cum5HSChtfnx7_uOmZ_HQ@mail.gmail.com> (raw)
In-Reply-To: <20190521104324.12835-5-Hesham.Almatary@cl.cam.ac.uk>

On Tue, May 21, 2019 at 3:45 AM Hesham Almatary
<Hesham.Almatary@cl.cam.ac.uk> wrote:
>
> The PMP check should be of the memory access size rather
> than TARGET_PAGE_SIZE.
>
> Signed-off-by: Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index d0b0f9cf88..ce1f47e4e3 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -410,7 +410,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>
>      if (riscv_feature(env, RISCV_FEATURE_PMP) &&
>          (ret == TRANSLATE_SUCCESS) &&
> -        !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type)) {
> +        !pmp_hart_has_privs(env, pa, size, 1 << access_type)) {
>          ret = TRANSLATE_PMP_FAIL;
>      }
>      if (ret == TRANSLATE_PMP_FAIL) {
> --
> 2.17.1
>
>


  reply	other threads:[~2019-05-21 22:47 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-21 10:43 [Qemu-devel] [PATCHv3 1/5] RISC-V: Only Check PMP if MMU translation succeeds Hesham Almatary
2019-05-21 10:43 ` [Qemu-riscv] " Hesham Almatary
2019-05-21 10:43 ` [Qemu-devel] [PATCHv3 2/5] RISC-V: Raise access fault exceptions on PMP violations Hesham Almatary
2019-05-21 10:43   ` [Qemu-riscv] " Hesham Almatary
2019-05-21 10:43 ` [Qemu-devel] [PATCHv3 3/5] RISC-V: Check PMP during Page Table Walks Hesham Almatary
2019-05-21 10:43   ` [Qemu-riscv] " Hesham Almatary
2019-05-21 22:37   ` [Qemu-devel] " Alistair Francis
2019-05-21 22:37     ` [Qemu-riscv] " Alistair Francis
2019-05-22  9:26     ` Hesham Almatary
2019-05-22  9:26       ` [Qemu-riscv] " Hesham Almatary
2019-05-29 18:25       ` Hesham Almatary
2019-05-29 18:25         ` [Qemu-riscv] " Hesham Almatary
2019-05-30  3:07       ` Alistair Francis
2019-05-30  3:07         ` [Qemu-riscv] " Alistair Francis
2019-05-30 13:09         ` Hesham Almatary
2019-05-30 13:09           ` [Qemu-riscv] " Hesham Almatary
2019-05-21 10:43 ` [Qemu-devel] [PATCHv3 4/5] RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off Hesham Almatary
2019-05-21 10:43   ` [Qemu-riscv] " Hesham Almatary
2019-05-21 22:38   ` [Qemu-devel] " Alistair Francis
2019-05-21 22:38     ` [Qemu-riscv] " Alistair Francis
2019-05-21 10:43 ` [Qemu-devel] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct access size Hesham Almatary
2019-05-21 10:43   ` [Qemu-riscv] " Hesham Almatary
2019-05-21 22:31   ` Alistair Francis [this message]
2019-05-21 22:31     ` [Qemu-riscv] [Qemu-devel] " Alistair Francis
2019-05-22  2:24     ` [Qemu-devel] [Qemu-riscv] " Jonathan Behrens
2019-05-22  2:24       ` [Qemu-riscv] [Qemu-devel] " Jonathan Behrens
2019-05-22  8:55       ` [Qemu-devel] [Qemu-riscv] " Hesham Almatary
2019-05-22  8:55         ` [Qemu-riscv] [Qemu-devel] " Hesham Almatary
2019-05-21 22:27 ` [Qemu-devel] [PATCHv3 1/5] RISC-V: Only Check PMP if MMU translation succeeds Alistair Francis
2019-05-21 22:27   ` [Qemu-riscv] " Alistair Francis

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