* [PATCH RESEND 0/2] Resolve some redundant property accessors
@ 2022-03-01 22:52 Bernhard Beschow
2022-03-01 22:52 ` [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters Bernhard Beschow
` (3 more replies)
0 siblings, 4 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-03-01 22:52 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-trivial, Bernhard Beschow
No changes. Just also CC'ed to qemu-trivial.
The QOM API already provides appropriate accessors, so reuse them.
Testing done:
:$ make check
Ok: 570
Expected Fail: 0
Fail: 0
Unexpected Pass: 0
Skipped: 178
Timeout: 0
Bernhard Beschow (2):
hw/vfio/pci-quirks: Resolve redundant property getters
hw/riscv/sifive_u: Resolve redundant property accessors
hw/riscv/sifive_u.c | 24 ++++--------------------
hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
2 files changed, 13 insertions(+), 45 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters
2022-03-01 22:52 [PATCH RESEND 0/2] Resolve some redundant property accessors Bernhard Beschow
@ 2022-03-01 22:52 ` Bernhard Beschow
2022-03-02 10:49 ` Bernhard Beschow
2022-03-21 10:57 ` Bernhard Beschow
2022-03-01 22:52 ` Bernhard Beschow
` (2 subsequent siblings)
3 siblings, 2 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-03-01 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-trivial, Alistair Francis, Alex Williamson,
Bernhard Beschow, Philippe Mathieu-Daudé
The QOM API already provides getters for uint64 and uint32 values, so reuse
them.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
1 file changed, 9 insertions(+), 25 deletions(-)
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index 0cf69a8c6d..f0147a050a 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -1565,22 +1565,6 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
return 0;
}
-static void vfio_pci_nvlink2_get_tgt(Object *obj, Visitor *v,
- const char *name,
- void *opaque, Error **errp)
-{
- uint64_t tgt = (uintptr_t) opaque;
- visit_type_uint64(v, name, &tgt, errp);
-}
-
-static void vfio_pci_nvlink2_get_link_speed(Object *obj, Visitor *v,
- const char *name,
- void *opaque, Error **errp)
-{
- uint32_t link_speed = (uint32_t)(uintptr_t) opaque;
- visit_type_uint32(v, name, &link_speed, errp);
-}
-
int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
{
int ret;
@@ -1618,9 +1602,9 @@ int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
nv2reg->size, p);
QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
- vfio_pci_nvlink2_get_tgt, NULL, NULL,
- (void *) (uintptr_t) cap->tgt);
+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
+ (uint64_t *) &cap->tgt,
+ OBJ_PROP_FLAG_READ);
trace_vfio_pci_nvidia_gpu_setup_quirk(vdev->vbasedev.name, cap->tgt,
nv2reg->size);
free_exit:
@@ -1679,15 +1663,15 @@ int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp)
QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
}
- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
- vfio_pci_nvlink2_get_tgt, NULL, NULL,
- (void *) (uintptr_t) captgt->tgt);
+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
+ (uint64_t *) &captgt->tgt,
+ OBJ_PROP_FLAG_READ);
trace_vfio_pci_nvlink2_setup_quirk_ssatgt(vdev->vbasedev.name, captgt->tgt,
atsdreg->size);
- object_property_add(OBJECT(vdev), "nvlink2-link-speed", "uint32",
- vfio_pci_nvlink2_get_link_speed, NULL, NULL,
- (void *) (uintptr_t) capspeed->link_speed);
+ object_property_add_uint32_ptr(OBJECT(vdev), "nvlink2-link-speed",
+ &capspeed->link_speed,
+ OBJ_PROP_FLAG_READ);
trace_vfio_pci_nvlink2_setup_quirk_lnkspd(vdev->vbasedev.name,
capspeed->link_speed);
free_exit:
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH RESEND 2/2] hw/riscv/sifive_u: Resolve redundant property accessors
2022-03-01 22:52 [PATCH RESEND 0/2] Resolve some redundant property accessors Bernhard Beschow
@ 2022-03-01 22:52 ` Bernhard Beschow
2022-03-01 22:52 ` Bernhard Beschow
` (2 subsequent siblings)
3 siblings, 0 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-03-01 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: open list:SiFive Machines, qemu-trivial, Bin Meng,
Philippe Mathieu-Daudé,
Alistair Francis, Palmer Dabbelt, Bernhard Beschow
The QOM API already provides accessors for uint32 values, so reuse them.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/riscv/sifive_u.c | 24 ++++--------------------
1 file changed, 4 insertions(+), 20 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 7fbc7dea42..747eb4ee89 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -713,36 +713,20 @@ static void sifive_u_machine_set_start_in_flash(Object *obj, bool value, Error *
s->start_in_flash = value;
}
-static void sifive_u_machine_get_uint32_prop(Object *obj, Visitor *v,
- const char *name, void *opaque,
- Error **errp)
-{
- visit_type_uint32(v, name, (uint32_t *)opaque, errp);
-}
-
-static void sifive_u_machine_set_uint32_prop(Object *obj, Visitor *v,
- const char *name, void *opaque,
- Error **errp)
-{
- visit_type_uint32(v, name, (uint32_t *)opaque, errp);
-}
-
static void sifive_u_machine_instance_init(Object *obj)
{
SiFiveUState *s = RISCV_U_MACHINE(obj);
s->start_in_flash = false;
s->msel = 0;
- object_property_add(obj, "msel", "uint32",
- sifive_u_machine_get_uint32_prop,
- sifive_u_machine_set_uint32_prop, NULL, &s->msel);
+ object_property_add_uint32_ptr(obj, "msel", &s->msel,
+ OBJ_PROP_FLAG_READWRITE);
object_property_set_description(obj, "msel",
"Mode Select (MSEL[3:0]) pin state");
s->serial = OTP_SERIAL;
- object_property_add(obj, "serial", "uint32",
- sifive_u_machine_get_uint32_prop,
- sifive_u_machine_set_uint32_prop, NULL, &s->serial);
+ object_property_add_uint32_ptr(obj, "serial", &s->serial,
+ OBJ_PROP_FLAG_READWRITE);
object_property_set_description(obj, "serial", "Board serial number");
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH RESEND 2/2] hw/riscv/sifive_u: Resolve redundant property accessors
@ 2022-03-01 22:52 ` Bernhard Beschow
0 siblings, 0 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-03-01 22:52 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-trivial, Bernhard Beschow, Philippe Mathieu-Daudé,
Alistair Francis, Bin Meng, Palmer Dabbelt,
open list:SiFive Machines
The QOM API already provides accessors for uint32 values, so reuse them.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/riscv/sifive_u.c | 24 ++++--------------------
1 file changed, 4 insertions(+), 20 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 7fbc7dea42..747eb4ee89 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -713,36 +713,20 @@ static void sifive_u_machine_set_start_in_flash(Object *obj, bool value, Error *
s->start_in_flash = value;
}
-static void sifive_u_machine_get_uint32_prop(Object *obj, Visitor *v,
- const char *name, void *opaque,
- Error **errp)
-{
- visit_type_uint32(v, name, (uint32_t *)opaque, errp);
-}
-
-static void sifive_u_machine_set_uint32_prop(Object *obj, Visitor *v,
- const char *name, void *opaque,
- Error **errp)
-{
- visit_type_uint32(v, name, (uint32_t *)opaque, errp);
-}
-
static void sifive_u_machine_instance_init(Object *obj)
{
SiFiveUState *s = RISCV_U_MACHINE(obj);
s->start_in_flash = false;
s->msel = 0;
- object_property_add(obj, "msel", "uint32",
- sifive_u_machine_get_uint32_prop,
- sifive_u_machine_set_uint32_prop, NULL, &s->msel);
+ object_property_add_uint32_ptr(obj, "msel", &s->msel,
+ OBJ_PROP_FLAG_READWRITE);
object_property_set_description(obj, "msel",
"Mode Select (MSEL[3:0]) pin state");
s->serial = OTP_SERIAL;
- object_property_add(obj, "serial", "uint32",
- sifive_u_machine_get_uint32_prop,
- sifive_u_machine_set_uint32_prop, NULL, &s->serial);
+ object_property_add_uint32_ptr(obj, "serial", &s->serial,
+ OBJ_PROP_FLAG_READWRITE);
object_property_set_description(obj, "serial", "Board serial number");
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 2/2] hw/riscv/sifive_u: Resolve redundant property accessors
2022-03-01 22:52 ` Bernhard Beschow
@ 2022-03-02 4:42 ` Alistair Francis
-1 siblings, 0 replies; 14+ messages in thread
From: Alistair Francis @ 2022-03-02 4:42 UTC (permalink / raw)
To: Bernhard Beschow
Cc: open list:SiFive Machines, QEMU Trivial, Bin Meng,
qemu-devel@nongnu.org Developers, Philippe Mathieu-Daudé,
Alistair Francis, Palmer Dabbelt
On Wed, Mar 2, 2022 at 8:57 AM Bernhard Beschow <shentey@gmail.com> wrote:
>
> The QOM API already provides accessors for uint32 values, so reuse them.
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_u.c | 24 ++++--------------------
> 1 file changed, 4 insertions(+), 20 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 7fbc7dea42..747eb4ee89 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -713,36 +713,20 @@ static void sifive_u_machine_set_start_in_flash(Object *obj, bool value, Error *
> s->start_in_flash = value;
> }
>
> -static void sifive_u_machine_get_uint32_prop(Object *obj, Visitor *v,
> - const char *name, void *opaque,
> - Error **errp)
> -{
> - visit_type_uint32(v, name, (uint32_t *)opaque, errp);
> -}
> -
> -static void sifive_u_machine_set_uint32_prop(Object *obj, Visitor *v,
> - const char *name, void *opaque,
> - Error **errp)
> -{
> - visit_type_uint32(v, name, (uint32_t *)opaque, errp);
> -}
> -
> static void sifive_u_machine_instance_init(Object *obj)
> {
> SiFiveUState *s = RISCV_U_MACHINE(obj);
>
> s->start_in_flash = false;
> s->msel = 0;
> - object_property_add(obj, "msel", "uint32",
> - sifive_u_machine_get_uint32_prop,
> - sifive_u_machine_set_uint32_prop, NULL, &s->msel);
> + object_property_add_uint32_ptr(obj, "msel", &s->msel,
> + OBJ_PROP_FLAG_READWRITE);
> object_property_set_description(obj, "msel",
> "Mode Select (MSEL[3:0]) pin state");
>
> s->serial = OTP_SERIAL;
> - object_property_add(obj, "serial", "uint32",
> - sifive_u_machine_get_uint32_prop,
> - sifive_u_machine_set_uint32_prop, NULL, &s->serial);
> + object_property_add_uint32_ptr(obj, "serial", &s->serial,
> + OBJ_PROP_FLAG_READWRITE);
> object_property_set_description(obj, "serial", "Board serial number");
> }
>
> --
> 2.35.1
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 2/2] hw/riscv/sifive_u: Resolve redundant property accessors
@ 2022-03-02 4:42 ` Alistair Francis
0 siblings, 0 replies; 14+ messages in thread
From: Alistair Francis @ 2022-03-02 4:42 UTC (permalink / raw)
To: Bernhard Beschow
Cc: qemu-devel@nongnu.org Developers, open list:SiFive Machines,
QEMU Trivial, Bin Meng, Philippe Mathieu-Daudé,
Alistair Francis, Palmer Dabbelt
On Wed, Mar 2, 2022 at 8:57 AM Bernhard Beschow <shentey@gmail.com> wrote:
>
> The QOM API already provides accessors for uint32 values, so reuse them.
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_u.c | 24 ++++--------------------
> 1 file changed, 4 insertions(+), 20 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 7fbc7dea42..747eb4ee89 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -713,36 +713,20 @@ static void sifive_u_machine_set_start_in_flash(Object *obj, bool value, Error *
> s->start_in_flash = value;
> }
>
> -static void sifive_u_machine_get_uint32_prop(Object *obj, Visitor *v,
> - const char *name, void *opaque,
> - Error **errp)
> -{
> - visit_type_uint32(v, name, (uint32_t *)opaque, errp);
> -}
> -
> -static void sifive_u_machine_set_uint32_prop(Object *obj, Visitor *v,
> - const char *name, void *opaque,
> - Error **errp)
> -{
> - visit_type_uint32(v, name, (uint32_t *)opaque, errp);
> -}
> -
> static void sifive_u_machine_instance_init(Object *obj)
> {
> SiFiveUState *s = RISCV_U_MACHINE(obj);
>
> s->start_in_flash = false;
> s->msel = 0;
> - object_property_add(obj, "msel", "uint32",
> - sifive_u_machine_get_uint32_prop,
> - sifive_u_machine_set_uint32_prop, NULL, &s->msel);
> + object_property_add_uint32_ptr(obj, "msel", &s->msel,
> + OBJ_PROP_FLAG_READWRITE);
> object_property_set_description(obj, "msel",
> "Mode Select (MSEL[3:0]) pin state");
>
> s->serial = OTP_SERIAL;
> - object_property_add(obj, "serial", "uint32",
> - sifive_u_machine_get_uint32_prop,
> - sifive_u_machine_set_uint32_prop, NULL, &s->serial);
> + object_property_add_uint32_ptr(obj, "serial", &s->serial,
> + OBJ_PROP_FLAG_READWRITE);
> object_property_set_description(obj, "serial", "Board serial number");
> }
>
> --
> 2.35.1
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters
2022-03-01 22:52 ` [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters Bernhard Beschow
@ 2022-03-02 10:49 ` Bernhard Beschow
2022-03-21 10:57 ` Bernhard Beschow
1 sibling, 0 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-03-02 10:49 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-trivial, Alex Williamson, Alistair Francis,
Philippe Mathieu-Daudé
Am 1. März 2022 22:52:19 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>The QOM API already provides getters for uint64 and uint32 values, so reuse
>them.
>
>Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Meh, I accidently swapped Alistair's Reviewed-by into this patch while dropping it from the other. Please ignore and sorry for that.
Best regards,
Bernhard
>Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>---
> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
> 1 file changed, 9 insertions(+), 25 deletions(-)
>
>diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
>index 0cf69a8c6d..f0147a050a 100644
>--- a/hw/vfio/pci-quirks.c
>+++ b/hw/vfio/pci-quirks.c
>@@ -1565,22 +1565,6 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
> return 0;
> }
>
>-static void vfio_pci_nvlink2_get_tgt(Object *obj, Visitor *v,
>- const char *name,
>- void *opaque, Error **errp)
>-{
>- uint64_t tgt = (uintptr_t) opaque;
>- visit_type_uint64(v, name, &tgt, errp);
>-}
>-
>-static void vfio_pci_nvlink2_get_link_speed(Object *obj, Visitor *v,
>- const char *name,
>- void *opaque, Error **errp)
>-{
>- uint32_t link_speed = (uint32_t)(uintptr_t) opaque;
>- visit_type_uint32(v, name, &link_speed, errp);
>-}
>-
> int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
> {
> int ret;
>@@ -1618,9 +1602,9 @@ int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
> nv2reg->size, p);
> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
>
>- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>- vfio_pci_nvlink2_get_tgt, NULL, NULL,
>- (void *) (uintptr_t) cap->tgt);
>+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>+ (uint64_t *) &cap->tgt,
>+ OBJ_PROP_FLAG_READ);
> trace_vfio_pci_nvidia_gpu_setup_quirk(vdev->vbasedev.name, cap->tgt,
> nv2reg->size);
> free_exit:
>@@ -1679,15 +1663,15 @@ int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp)
> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
> }
>
>- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>- vfio_pci_nvlink2_get_tgt, NULL, NULL,
>- (void *) (uintptr_t) captgt->tgt);
>+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>+ (uint64_t *) &captgt->tgt,
>+ OBJ_PROP_FLAG_READ);
> trace_vfio_pci_nvlink2_setup_quirk_ssatgt(vdev->vbasedev.name, captgt->tgt,
> atsdreg->size);
>
>- object_property_add(OBJECT(vdev), "nvlink2-link-speed", "uint32",
>- vfio_pci_nvlink2_get_link_speed, NULL, NULL,
>- (void *) (uintptr_t) capspeed->link_speed);
>+ object_property_add_uint32_ptr(OBJECT(vdev), "nvlink2-link-speed",
>+ &capspeed->link_speed,
>+ OBJ_PROP_FLAG_READ);
> trace_vfio_pci_nvlink2_setup_quirk_lnkspd(vdev->vbasedev.name,
> capspeed->link_speed);
> free_exit:
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters
2022-03-01 22:52 ` [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters Bernhard Beschow
2022-03-02 10:49 ` Bernhard Beschow
@ 2022-03-21 10:57 ` Bernhard Beschow
2022-03-21 13:06 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 14+ messages in thread
From: Bernhard Beschow @ 2022-03-21 10:57 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-trivial, Alex Williamson, Alistair Francis
Am 1. März 2022 22:52:19 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>The QOM API already provides getters for uint64 and uint32 values, so reuse
>them.
>
>Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>---
> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
> 1 file changed, 9 insertions(+), 25 deletions(-)
>
>diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
>index 0cf69a8c6d..f0147a050a 100644
>--- a/hw/vfio/pci-quirks.c
>+++ b/hw/vfio/pci-quirks.c
>@@ -1565,22 +1565,6 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
> return 0;
> }
>
>-static void vfio_pci_nvlink2_get_tgt(Object *obj, Visitor *v,
>- const char *name,
>- void *opaque, Error **errp)
>-{
>- uint64_t tgt = (uintptr_t) opaque;
>- visit_type_uint64(v, name, &tgt, errp);
>-}
>-
>-static void vfio_pci_nvlink2_get_link_speed(Object *obj, Visitor *v,
>- const char *name,
>- void *opaque, Error **errp)
>-{
>- uint32_t link_speed = (uint32_t)(uintptr_t) opaque;
>- visit_type_uint32(v, name, &link_speed, errp);
>-}
>-
> int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
> {
> int ret;
>@@ -1618,9 +1602,9 @@ int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
> nv2reg->size, p);
> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
>
>- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>- vfio_pci_nvlink2_get_tgt, NULL, NULL,
>- (void *) (uintptr_t) cap->tgt);
>+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>+ (uint64_t *) &cap->tgt,
>+ OBJ_PROP_FLAG_READ);
> trace_vfio_pci_nvidia_gpu_setup_quirk(vdev->vbasedev.name, cap->tgt,
> nv2reg->size);
> free_exit:
>@@ -1679,15 +1663,15 @@ int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp)
> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
> }
>
>- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>- vfio_pci_nvlink2_get_tgt, NULL, NULL,
>- (void *) (uintptr_t) captgt->tgt);
>+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>+ (uint64_t *) &captgt->tgt,
>+ OBJ_PROP_FLAG_READ);
> trace_vfio_pci_nvlink2_setup_quirk_ssatgt(vdev->vbasedev.name, captgt->tgt,
> atsdreg->size);
>
>- object_property_add(OBJECT(vdev), "nvlink2-link-speed", "uint32",
>- vfio_pci_nvlink2_get_link_speed, NULL, NULL,
>- (void *) (uintptr_t) capspeed->link_speed);
>+ object_property_add_uint32_ptr(OBJECT(vdev), "nvlink2-link-speed",
>+ &capspeed->link_speed,
>+ OBJ_PROP_FLAG_READ);
> trace_vfio_pci_nvlink2_setup_quirk_lnkspd(vdev->vbasedev.name,
> capspeed->link_speed);
> free_exit:
Ping
@Alistair: When resending, I accidently added a Reviewed-by with your name here which I asked to be ignored *after* you re-acked patch 2/2. In case you intended to ack this patch as well your voice would be needed again.
Thanks,
Bernhard
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters
2022-03-21 10:57 ` Bernhard Beschow
@ 2022-03-21 13:06 ` Philippe Mathieu-Daudé
2022-03-23 23:37 ` Bernhard Beschow
0 siblings, 1 reply; 14+ messages in thread
From: Philippe Mathieu-Daudé @ 2022-03-21 13:06 UTC (permalink / raw)
To: Bernhard Beschow, qemu-devel
Cc: qemu-trivial, Alex Williamson, Alistair Francis
On 21/3/22 11:57, Bernhard Beschow wrote:
> Am 1. März 2022 22:52:19 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>> The QOM API already provides getters for uint64 and uint32 values, so reuse
>> them.
>>
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
>> 1 file changed, 9 insertions(+), 25 deletions(-)
>>
>> diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
>> index 0cf69a8c6d..f0147a050a 100644
>> --- a/hw/vfio/pci-quirks.c
>> +++ b/hw/vfio/pci-quirks.c
>> @@ -1565,22 +1565,6 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
>> return 0;
>> }
>>
>> -static void vfio_pci_nvlink2_get_tgt(Object *obj, Visitor *v,
>> - const char *name,
>> - void *opaque, Error **errp)
>> -{
>> - uint64_t tgt = (uintptr_t) opaque;
>> - visit_type_uint64(v, name, &tgt, errp);
>> -}
>> -
>> -static void vfio_pci_nvlink2_get_link_speed(Object *obj, Visitor *v,
>> - const char *name,
>> - void *opaque, Error **errp)
>> -{
>> - uint32_t link_speed = (uint32_t)(uintptr_t) opaque;
>> - visit_type_uint32(v, name, &link_speed, errp);
>> -}
>> -
>> int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
>> {
>> int ret;
>> @@ -1618,9 +1602,9 @@ int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
>> nv2reg->size, p);
>> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
>>
>> - object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>> - vfio_pci_nvlink2_get_tgt, NULL, NULL,
>> - (void *) (uintptr_t) cap->tgt);
>> + object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>> + (uint64_t *) &cap->tgt,
>> + OBJ_PROP_FLAG_READ);
>> trace_vfio_pci_nvidia_gpu_setup_quirk(vdev->vbasedev.name, cap->tgt,
>> nv2reg->size);
>> free_exit:
>> @@ -1679,15 +1663,15 @@ int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp)
>> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
>> }
>>
>> - object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>> - vfio_pci_nvlink2_get_tgt, NULL, NULL,
>> - (void *) (uintptr_t) captgt->tgt);
>> + object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>> + (uint64_t *) &captgt->tgt,
>> + OBJ_PROP_FLAG_READ);
>> trace_vfio_pci_nvlink2_setup_quirk_ssatgt(vdev->vbasedev.name, captgt->tgt,
>> atsdreg->size);
>>
>> - object_property_add(OBJECT(vdev), "nvlink2-link-speed", "uint32",
>> - vfio_pci_nvlink2_get_link_speed, NULL, NULL,
>> - (void *) (uintptr_t) capspeed->link_speed);
>> + object_property_add_uint32_ptr(OBJECT(vdev), "nvlink2-link-speed",
>> + &capspeed->link_speed,
>> + OBJ_PROP_FLAG_READ);
>> trace_vfio_pci_nvlink2_setup_quirk_lnkspd(vdev->vbasedev.name,
>> capspeed->link_speed);
>> free_exit:
>
> Ping
>
> @Alistair: When resending, I accidently added a Reviewed-by with your name here which I asked to be ignored *after* you re-acked patch 2/2. In case you intended to ack this patch as well your voice would be needed again.
FWIW I expect these patches to get merged via the qemu-trivial@ tree
once the 7.1 development window opens.
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters
2022-03-21 13:06 ` Philippe Mathieu-Daudé
@ 2022-03-23 23:37 ` Bernhard Beschow
0 siblings, 0 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-03-23 23:37 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: qemu-trivial, Alex Williamson, Alistair Francis
Am 21. März 2022 13:06:29 UTC schrieb "Philippe Mathieu-Daudé" <philippe.mathieu.daude@gmail.com>:
>On 21/3/22 11:57, Bernhard Beschow wrote:
>> Am 1. März 2022 22:52:19 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>>> The QOM API already provides getters for uint64 and uint32 values, so reuse
>>> them.
>>>
>>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>>> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> ---
>>> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
>>> 1 file changed, 9 insertions(+), 25 deletions(-)
>>>
>>> diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
>>> index 0cf69a8c6d..f0147a050a 100644
>>> --- a/hw/vfio/pci-quirks.c
>>> +++ b/hw/vfio/pci-quirks.c
>>> @@ -1565,22 +1565,6 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
>>> return 0;
>>> }
>>>
>>> -static void vfio_pci_nvlink2_get_tgt(Object *obj, Visitor *v,
>>> - const char *name,
>>> - void *opaque, Error **errp)
>>> -{
>>> - uint64_t tgt = (uintptr_t) opaque;
>>> - visit_type_uint64(v, name, &tgt, errp);
>>> -}
>>> -
>>> -static void vfio_pci_nvlink2_get_link_speed(Object *obj, Visitor *v,
>>> - const char *name,
>>> - void *opaque, Error **errp)
>>> -{
>>> - uint32_t link_speed = (uint32_t)(uintptr_t) opaque;
>>> - visit_type_uint32(v, name, &link_speed, errp);
>>> -}
>>> -
>>> int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
>>> {
>>> int ret;
>>> @@ -1618,9 +1602,9 @@ int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
>>> nv2reg->size, p);
>>> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
>>>
>>> - object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>>> - vfio_pci_nvlink2_get_tgt, NULL, NULL,
>>> - (void *) (uintptr_t) cap->tgt);
>>> + object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>>> + (uint64_t *) &cap->tgt,
>>> + OBJ_PROP_FLAG_READ);
>>> trace_vfio_pci_nvidia_gpu_setup_quirk(vdev->vbasedev.name, cap->tgt,
>>> nv2reg->size);
>>> free_exit:
>>> @@ -1679,15 +1663,15 @@ int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp)
>>> QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
>>> }
>>>
>>> - object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
>>> - vfio_pci_nvlink2_get_tgt, NULL, NULL,
>>> - (void *) (uintptr_t) captgt->tgt);
>>> + object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
>>> + (uint64_t *) &captgt->tgt,
>>> + OBJ_PROP_FLAG_READ);
>>> trace_vfio_pci_nvlink2_setup_quirk_ssatgt(vdev->vbasedev.name, captgt->tgt,
>>> atsdreg->size);
>>>
>>> - object_property_add(OBJECT(vdev), "nvlink2-link-speed", "uint32",
>>> - vfio_pci_nvlink2_get_link_speed, NULL, NULL,
>>> - (void *) (uintptr_t) capspeed->link_speed);
>>> + object_property_add_uint32_ptr(OBJECT(vdev), "nvlink2-link-speed",
>>> + &capspeed->link_speed,
>>> + OBJ_PROP_FLAG_READ);
>>> trace_vfio_pci_nvlink2_setup_quirk_lnkspd(vdev->vbasedev.name,
>>> capspeed->link_speed);
>>> free_exit:
>>
>> Ping
>>
>> @Alistair: When resending, I accidently added a Reviewed-by with your name here which I asked to be ignored *after* you re-acked patch 2/2. In case you intended to ack this patch as well your voice would be needed again.
>
>FWIW I expect these patches to get merged via the qemu-trivial@ tree
>once the 7.1 development window opens.
Excellent!
Best regards,
Bernhard
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 0/2] Resolve some redundant property accessors
2022-03-01 22:52 [PATCH RESEND 0/2] Resolve some redundant property accessors Bernhard Beschow
2022-03-01 22:52 ` [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters Bernhard Beschow
2022-03-01 22:52 ` Bernhard Beschow
@ 2022-05-05 16:52 ` Bernhard Beschow
2022-05-13 10:39 ` Bernhard Beschow
2022-05-17 3:41 ` Alistair Francis
3 siblings, 1 reply; 14+ messages in thread
From: Bernhard Beschow @ 2022-05-05 16:52 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-trivial
Am 1. März 2022 22:52:18 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>No changes. Just also CC'ed to qemu-trivial.
>
>The QOM API already provides appropriate accessors, so reuse them.
>
>Testing done:
>
> :$ make check
> Ok: 570
> Expected Fail: 0
> Fail: 0
> Unexpected Pass: 0
> Skipped: 178
> Timeout: 0
>
>
>Bernhard Beschow (2):
> hw/vfio/pci-quirks: Resolve redundant property getters
> hw/riscv/sifive_u: Resolve redundant property accessors
>
> hw/riscv/sifive_u.c | 24 ++++--------------------
> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
> 2 files changed, 13 insertions(+), 45 deletions(-)
>
Ping
First round of trivial patches went already in for 7.1, hence a reminder.
Best regards,
Bernhard
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 0/2] Resolve some redundant property accessors
2022-05-05 16:52 ` [PATCH RESEND 0/2] Resolve some " Bernhard Beschow
@ 2022-05-13 10:39 ` Bernhard Beschow
0 siblings, 0 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-05-13 10:39 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-trivial
Am 5. Mai 2022 16:52:13 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>Am 1. März 2022 22:52:18 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>>No changes. Just also CC'ed to qemu-trivial.
>>
>>The QOM API already provides appropriate accessors, so reuse them.
>>
>>Testing done:
>>
>> :$ make check
>> Ok: 570
>> Expected Fail: 0
>> Fail: 0
>> Unexpected Pass: 0
>> Skipped: 178
>> Timeout: 0
>>
>>
>>Bernhard Beschow (2):
>> hw/vfio/pci-quirks: Resolve redundant property getters
>> hw/riscv/sifive_u: Resolve redundant property accessors
>>
>> hw/riscv/sifive_u.c | 24 ++++--------------------
>> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
>> 2 files changed, 13 insertions(+), 45 deletions(-)
>>
>
>Ping
>
>First round of trivial patches went already in for 7.1, hence a reminder.
>
>Best regards,
>Bernhard
Ping 2
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 0/2] Resolve some redundant property accessors
2022-03-01 22:52 [PATCH RESEND 0/2] Resolve some redundant property accessors Bernhard Beschow
` (2 preceding siblings ...)
2022-05-05 16:52 ` [PATCH RESEND 0/2] Resolve some " Bernhard Beschow
@ 2022-05-17 3:41 ` Alistair Francis
2022-05-17 11:11 ` Bernhard Beschow
3 siblings, 1 reply; 14+ messages in thread
From: Alistair Francis @ 2022-05-17 3:41 UTC (permalink / raw)
To: Bernhard Beschow; +Cc: qemu-devel@nongnu.org Developers, QEMU Trivial
On Wed, Mar 2, 2022 at 8:54 AM Bernhard Beschow <shentey@gmail.com> wrote:
>
> No changes. Just also CC'ed to qemu-trivial.
>
> The QOM API already provides appropriate accessors, so reuse them.
>
> Testing done:
>
> :$ make check
> Ok: 570
> Expected Fail: 0
> Fail: 0
> Unexpected Pass: 0
> Skipped: 178
> Timeout: 0
>
>
> Bernhard Beschow (2):
> hw/vfio/pci-quirks: Resolve redundant property getters
> hw/riscv/sifive_u: Resolve redundant property accessors
Thanks!
Applied to riscv-to-apply.next
Alistair
>
> hw/riscv/sifive_u.c | 24 ++++--------------------
> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
> 2 files changed, 13 insertions(+), 45 deletions(-)
>
> --
> 2.35.1
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH RESEND 0/2] Resolve some redundant property accessors
2022-05-17 3:41 ` Alistair Francis
@ 2022-05-17 11:11 ` Bernhard Beschow
0 siblings, 0 replies; 14+ messages in thread
From: Bernhard Beschow @ 2022-05-17 11:11 UTC (permalink / raw)
To: Alistair Francis; +Cc: qemu-devel@nongnu.org Developers, QEMU Trivial
Am 17. Mai 2022 03:41:51 UTC schrieb Alistair Francis <alistair23@gmail.com>:
>On Wed, Mar 2, 2022 at 8:54 AM Bernhard Beschow <shentey@gmail.com> wrote:
>>
>> No changes. Just also CC'ed to qemu-trivial.
>>
>> The QOM API already provides appropriate accessors, so reuse them.
>>
>> Testing done:
>>
>> :$ make check
>> Ok: 570
>> Expected Fail: 0
>> Fail: 0
>> Unexpected Pass: 0
>> Skipped: 178
>> Timeout: 0
>>
>>
>> Bernhard Beschow (2):
>> hw/vfio/pci-quirks: Resolve redundant property getters
>> hw/riscv/sifive_u: Resolve redundant property accessors
>
>Thanks!
>
>Applied to riscv-to-apply.next
Finally :)
Thanks,
Bernhard
>
>Alistair
>
>>
>> hw/riscv/sifive_u.c | 24 ++++--------------------
>> hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
>> 2 files changed, 13 insertions(+), 45 deletions(-)
>>
>> --
>> 2.35.1
>>
>>
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-05-17 11:14 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-01 22:52 [PATCH RESEND 0/2] Resolve some redundant property accessors Bernhard Beschow
2022-03-01 22:52 ` [PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters Bernhard Beschow
2022-03-02 10:49 ` Bernhard Beschow
2022-03-21 10:57 ` Bernhard Beschow
2022-03-21 13:06 ` Philippe Mathieu-Daudé
2022-03-23 23:37 ` Bernhard Beschow
2022-03-01 22:52 ` [PATCH RESEND 2/2] hw/riscv/sifive_u: Resolve redundant property accessors Bernhard Beschow
2022-03-01 22:52 ` Bernhard Beschow
2022-03-02 4:42 ` Alistair Francis
2022-03-02 4:42 ` Alistair Francis
2022-05-05 16:52 ` [PATCH RESEND 0/2] Resolve some " Bernhard Beschow
2022-05-13 10:39 ` Bernhard Beschow
2022-05-17 3:41 ` Alistair Francis
2022-05-17 11:11 ` Bernhard Beschow
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