* [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
@ 2021-04-06 22:48 ` Alistair Francis
0 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2021-04-06 22:48 UTC (permalink / raw)
To: qemu-devel, qemu-riscv
Cc: sagark, kbastian, alistair.francis, alistair23, palmer, bmeng.cn
Update the RISC-V maintainers by removing Sagar and Bastian who haven't
been involved recently.
Also add Bin who has been helping with reviews.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
I have run this by all of the people involved and they are all ok with
the change.
MAINTAINERS | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 69003cdc3c..541bd264b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -295,9 +295,8 @@ F: tests/acceptance/machine_ppc.py
RISC-V TCG CPUs
M: Palmer Dabbelt <palmer@dabbelt.com>
-M: Alistair Francis <Alistair.Francis@wdc.com>
-M: Sagar Karandikar <sagark@eecs.berkeley.edu>
-M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
+M: Alistair Francis <alistair.francis@wdc.com>
+M: Bin Meng <bin.meng@windriver.com>
L: qemu-riscv@nongnu.org
S: Supported
F: target/riscv/
--
2.31.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
@ 2021-04-06 22:48 ` Alistair Francis
0 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2021-04-06 22:48 UTC (permalink / raw)
To: qemu-devel, qemu-riscv
Cc: bmeng.cn, palmer, sagark, kbastian, alistair.francis, alistair23
Update the RISC-V maintainers by removing Sagar and Bastian who haven't
been involved recently.
Also add Bin who has been helping with reviews.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
I have run this by all of the people involved and they are all ok with
the change.
MAINTAINERS | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 69003cdc3c..541bd264b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -295,9 +295,8 @@ F: tests/acceptance/machine_ppc.py
RISC-V TCG CPUs
M: Palmer Dabbelt <palmer@dabbelt.com>
-M: Alistair Francis <Alistair.Francis@wdc.com>
-M: Sagar Karandikar <sagark@eecs.berkeley.edu>
-M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
+M: Alistair Francis <alistair.francis@wdc.com>
+M: Bin Meng <bin.meng@windriver.com>
L: qemu-riscv@nongnu.org
S: Supported
F: target/riscv/
--
2.31.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
2021-04-06 22:48 ` Alistair Francis
@ 2021-04-07 1:40 ` Bin Meng
-1 siblings, 0 replies; 10+ messages in thread
From: Bin Meng @ 2021-04-07 1:40 UTC (permalink / raw)
To: Alistair Francis
Cc: open list:RISC-V, Sagar Karandikar, Bastian Koppelmann,
qemu-devel@nongnu.org Developers, Palmer Dabbelt,
Alistair Francis
On Wed, Apr 7, 2021 at 6:51 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> I have run this by all of the people involved and they are all ok with
> the change.
>
> MAINTAINERS | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
Acked-by: Bin Meng <bin.meng@windriver.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
@ 2021-04-07 1:40 ` Bin Meng
0 siblings, 0 replies; 10+ messages in thread
From: Bin Meng @ 2021-04-07 1:40 UTC (permalink / raw)
To: Alistair Francis
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V,
Palmer Dabbelt, Sagar Karandikar, Bastian Koppelmann,
Alistair Francis
On Wed, Apr 7, 2021 at 6:51 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> I have run this by all of the people involved and they are all ok with
> the change.
>
> MAINTAINERS | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
Acked-by: Bin Meng <bin.meng@windriver.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
2021-04-06 22:48 ` Alistair Francis
@ 2021-04-07 8:14 ` Bastian Koppelmann
-1 siblings, 0 replies; 10+ messages in thread
From: Bastian Koppelmann @ 2021-04-07 8:14 UTC (permalink / raw)
To: Alistair Francis
Cc: qemu-riscv, sagark, qemu-devel, palmer, alistair23, bmeng.cn
On Tue, Apr 06, 2021 at 06:48:25PM -0400, Alistair Francis wrote:
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cheers,
Bastian
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
@ 2021-04-07 8:14 ` Bastian Koppelmann
0 siblings, 0 replies; 10+ messages in thread
From: Bastian Koppelmann @ 2021-04-07 8:14 UTC (permalink / raw)
To: Alistair Francis
Cc: qemu-devel, qemu-riscv, sagark, alistair23, palmer, bmeng.cn
On Tue, Apr 06, 2021 at 06:48:25PM -0400, Alistair Francis wrote:
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cheers,
Bastian
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
2021-04-06 22:48 ` Alistair Francis
@ 2021-04-07 12:15 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-04-07 12:15 UTC (permalink / raw)
To: Alistair Francis, qemu-devel, qemu-riscv
Cc: kbastian, bmeng.cn, palmer, sagark, alistair23
On 4/7/21 12:48 AM, Alistair Francis wrote:
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> I have run this by all of the people involved and they are all ok with
> the change.
>
> MAINTAINERS | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
FWIW
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
@ 2021-04-07 12:15 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-04-07 12:15 UTC (permalink / raw)
To: Alistair Francis, qemu-devel, qemu-riscv
Cc: sagark, kbastian, alistair23, palmer, bmeng.cn
On 4/7/21 12:48 AM, Alistair Francis wrote:
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> I have run this by all of the people involved and they are all ok with
> the change.
>
> MAINTAINERS | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
FWIW
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
2021-04-06 22:48 ` Alistair Francis
@ 2021-04-07 14:23 ` Alistair Francis
-1 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2021-04-07 14:23 UTC (permalink / raw)
To: Alistair Francis
Cc: open list:RISC-V, Sagar Karandikar, Bastian Koppelmann,
qemu-devel@nongnu.org Developers, Palmer Dabbelt, Bin Meng
On Tue, Apr 6, 2021 at 6:51 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> I have run this by all of the people involved and they are all ok with
> the change.
>
> MAINTAINERS | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 69003cdc3c..541bd264b2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -295,9 +295,8 @@ F: tests/acceptance/machine_ppc.py
>
> RISC-V TCG CPUs
> M: Palmer Dabbelt <palmer@dabbelt.com>
> -M: Alistair Francis <Alistair.Francis@wdc.com>
> -M: Sagar Karandikar <sagark@eecs.berkeley.edu>
> -M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> +M: Alistair Francis <alistair.francis@wdc.com>
> +M: Bin Meng <bin.meng@windriver.com>
> L: qemu-riscv@nongnu.org
> S: Supported
> F: target/riscv/
> --
> 2.31.0
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
@ 2021-04-07 14:23 ` Alistair Francis
0 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2021-04-07 14:23 UTC (permalink / raw)
To: Alistair Francis
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V, Bin Meng,
Palmer Dabbelt, Sagar Karandikar, Bastian Koppelmann
On Tue, Apr 6, 2021 at 6:51 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> I have run this by all of the people involved and they are all ok with
> the change.
>
> MAINTAINERS | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 69003cdc3c..541bd264b2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -295,9 +295,8 @@ F: tests/acceptance/machine_ppc.py
>
> RISC-V TCG CPUs
> M: Palmer Dabbelt <palmer@dabbelt.com>
> -M: Alistair Francis <Alistair.Francis@wdc.com>
> -M: Sagar Karandikar <sagark@eecs.berkeley.edu>
> -M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> +M: Alistair Francis <alistair.francis@wdc.com>
> +M: Bin Meng <bin.meng@windriver.com>
> L: qemu-riscv@nongnu.org
> S: Supported
> F: target/riscv/
> --
> 2.31.0
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-04-07 14:28 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-06 22:48 [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers Alistair Francis
2021-04-06 22:48 ` Alistair Francis
2021-04-07 1:40 ` Bin Meng
2021-04-07 1:40 ` Bin Meng
2021-04-07 8:14 ` Bastian Koppelmann
2021-04-07 8:14 ` Bastian Koppelmann
2021-04-07 12:15 ` Philippe Mathieu-Daudé
2021-04-07 12:15 ` Philippe Mathieu-Daudé
2021-04-07 14:23 ` Alistair Francis
2021-04-07 14:23 ` Alistair Francis
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