* [PATCH v2 0/2] Add more 64-bit utilities
@ 2021-07-19 22:02 Joe Komlodi
2021-07-19 22:02 ` [PATCH v2 1/2] hw/core/register: " Joe Komlodi
2021-07-19 22:02 ` [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64 Joe Komlodi
0 siblings, 2 replies; 6+ messages in thread
From: Joe Komlodi @ 2021-07-19 22:02 UTC (permalink / raw)
To: qemu-devel; +Cc: alistair, richard.henderson
Changelog:
v1 -> v2
- 2/2: Use uint64_t for 64-bit value
Hi all,
This adds more utilities for 64-bit registers.
As part of it, it also fixes FIELD_DP64 to work with bit fields wider than
32-bits.
Thanks!
Joe
Joe Komlodi (2):
hw/core/register: Add more 64-bit utilities
hw/registerfields: Use 64-bit bitfield for FIELD_DP64
hw/core/register.c | 12 ++++++++++++
include/hw/register.h | 8 ++++++++
include/hw/registerfields.h | 10 +++++++++-
3 files changed, 29 insertions(+), 1 deletion(-)
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] hw/core/register: Add more 64-bit utilities
2021-07-19 22:02 [PATCH v2 0/2] Add more 64-bit utilities Joe Komlodi
@ 2021-07-19 22:02 ` Joe Komlodi
2021-07-20 6:33 ` Alistair Francis
2021-07-19 22:02 ` [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64 Joe Komlodi
1 sibling, 1 reply; 6+ messages in thread
From: Joe Komlodi @ 2021-07-19 22:02 UTC (permalink / raw)
To: qemu-devel; +Cc: alistair, richard.henderson
We already have some utilities to handle 64-bit wide registers, so this just
adds some more for:
- Initializing 64-bit registers
- Extracting and depositing to an array of 64-bit registers
Signed-off-by: Joe Komlodi <joe.komlodi@xilinx.com>
---
hw/core/register.c | 12 ++++++++++++
include/hw/register.h | 8 ++++++++
include/hw/registerfields.h | 8 ++++++++
3 files changed, 28 insertions(+)
diff --git a/hw/core/register.c b/hw/core/register.c
index d6f8c20..ab20258 100644
--- a/hw/core/register.c
+++ b/hw/core/register.c
@@ -300,6 +300,18 @@ RegisterInfoArray *register_init_block32(DeviceState *owner,
data, ops, debug_enabled, memory_size, 32);
}
+RegisterInfoArray *register_init_block64(DeviceState *owner,
+ const RegisterAccessInfo *rae,
+ int num, RegisterInfo *ri,
+ uint32_t *data,
+ const MemoryRegionOps *ops,
+ bool debug_enabled,
+ uint64_t memory_size)
+{
+ return register_init_block(owner, rae, num, ri, (void *)
+ data, ops, debug_enabled, memory_size, 64);
+}
+
void register_finalize_block(RegisterInfoArray *r_array)
{
object_unparent(OBJECT(&r_array->mem));
diff --git a/include/hw/register.h b/include/hw/register.h
index b480e38..0197e45 100644
--- a/include/hw/register.h
+++ b/include/hw/register.h
@@ -204,6 +204,14 @@ RegisterInfoArray *register_init_block32(DeviceState *owner,
bool debug_enabled,
uint64_t memory_size);
+RegisterInfoArray *register_init_block64(DeviceState *owner,
+ const RegisterAccessInfo *rae,
+ int num, RegisterInfo *ri,
+ uint32_t *data,
+ const MemoryRegionOps *ops,
+ bool debug_enabled,
+ uint64_t memory_size);
+
/**
* This function should be called to cleanup the registers that were initialized
* when calling register_init_block32(). This function should only be called
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
index 93fa4a8..9a03ac5 100644
--- a/include/hw/registerfields.h
+++ b/include/hw/registerfields.h
@@ -30,6 +30,10 @@
enum { A_ ## reg = (addr) }; \
enum { R_ ## reg = (addr) / 2 };
+#define REG64(reg, addr) \
+ enum { A_ ## reg = (addr) }; \
+ enum { R_ ## reg = (addr) / 8 };
+
/* Define SHIFT, LENGTH and MASK constants for a field within a register */
/* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH
@@ -58,6 +62,8 @@
/* Extract a field from an array of registers */
#define ARRAY_FIELD_EX32(regs, reg, field) \
FIELD_EX32((regs)[R_ ## reg], reg, field)
+#define ARRAY_FIELD_EX64(regs, reg, field) \
+ FIELD_EX64((regs)[R_ ## reg], reg, field)
/* Deposit a register field.
* Assigning values larger then the target field will result in
@@ -99,5 +105,7 @@
/* Deposit a field to array of registers. */
#define ARRAY_FIELD_DP32(regs, reg, field, val) \
(regs)[R_ ## reg] = FIELD_DP32((regs)[R_ ## reg], reg, field, val);
+#define ARRAY_FIELD_DP64(regs, reg, field, val) \
+ (regs)[R_ ## reg] = FIELD_DP64((regs)[R_ ## reg], reg, field, val);
#endif
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64
2021-07-19 22:02 [PATCH v2 0/2] Add more 64-bit utilities Joe Komlodi
2021-07-19 22:02 ` [PATCH v2 1/2] hw/core/register: " Joe Komlodi
@ 2021-07-19 22:02 ` Joe Komlodi
2021-07-20 6:34 ` Alistair Francis
2021-07-20 11:46 ` Philippe Mathieu-Daudé
1 sibling, 2 replies; 6+ messages in thread
From: Joe Komlodi @ 2021-07-19 22:02 UTC (permalink / raw)
To: qemu-devel; +Cc: alistair, richard.henderson
If we have a field that's wider than 32-bits, we need a data type wide enough to
be able to create the bitfield used to deposit the value.
Signed-off-by: Joe Komlodi <joe.komlodi@xilinx.com>
---
include/hw/registerfields.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
index 9a03ac5..f2a3c9c 100644
--- a/include/hw/registerfields.h
+++ b/include/hw/registerfields.h
@@ -95,7 +95,7 @@
_d; })
#define FIELD_DP64(storage, reg, field, val) ({ \
struct { \
- unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
+ uint64_t v:R_ ## reg ## _ ## field ## _LENGTH; \
} _v = { .v = val }; \
uint64_t _d; \
_d = deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] hw/core/register: Add more 64-bit utilities
2021-07-19 22:02 ` [PATCH v2 1/2] hw/core/register: " Joe Komlodi
@ 2021-07-20 6:33 ` Alistair Francis
0 siblings, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2021-07-20 6:33 UTC (permalink / raw)
To: Joe Komlodi
Cc: Alistair Francis, Richard Henderson, qemu-devel@nongnu.org Developers
On Tue, Jul 20, 2021 at 8:05 AM Joe Komlodi <joe.komlodi@xilinx.com> wrote:
>
> We already have some utilities to handle 64-bit wide registers, so this just
> adds some more for:
> - Initializing 64-bit registers
> - Extracting and depositing to an array of 64-bit registers
>
> Signed-off-by: Joe Komlodi <joe.komlodi@xilinx.com>
> ---
> hw/core/register.c | 12 ++++++++++++
> include/hw/register.h | 8 ++++++++
> include/hw/registerfields.h | 8 ++++++++
> 3 files changed, 28 insertions(+)
>
> diff --git a/hw/core/register.c b/hw/core/register.c
> index d6f8c20..ab20258 100644
> --- a/hw/core/register.c
> +++ b/hw/core/register.c
> @@ -300,6 +300,18 @@ RegisterInfoArray *register_init_block32(DeviceState *owner,
> data, ops, debug_enabled, memory_size, 32);
> }
>
> +RegisterInfoArray *register_init_block64(DeviceState *owner,
> + const RegisterAccessInfo *rae,
> + int num, RegisterInfo *ri,
> + uint32_t *data,
This should be uint64_t
Alistair
> + const MemoryRegionOps *ops,
> + bool debug_enabled,
> + uint64_t memory_size)
> +{
> + return register_init_block(owner, rae, num, ri, (void *)
> + data, ops, debug_enabled, memory_size, 64);
> +}
> +
> void register_finalize_block(RegisterInfoArray *r_array)
> {
> object_unparent(OBJECT(&r_array->mem));
> diff --git a/include/hw/register.h b/include/hw/register.h
> index b480e38..0197e45 100644
> --- a/include/hw/register.h
> +++ b/include/hw/register.h
> @@ -204,6 +204,14 @@ RegisterInfoArray *register_init_block32(DeviceState *owner,
> bool debug_enabled,
> uint64_t memory_size);
>
> +RegisterInfoArray *register_init_block64(DeviceState *owner,
> + const RegisterAccessInfo *rae,
> + int num, RegisterInfo *ri,
> + uint32_t *data,
> + const MemoryRegionOps *ops,
> + bool debug_enabled,
> + uint64_t memory_size);
> +
> /**
> * This function should be called to cleanup the registers that were initialized
> * when calling register_init_block32(). This function should only be called
> diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
> index 93fa4a8..9a03ac5 100644
> --- a/include/hw/registerfields.h
> +++ b/include/hw/registerfields.h
> @@ -30,6 +30,10 @@
> enum { A_ ## reg = (addr) }; \
> enum { R_ ## reg = (addr) / 2 };
>
> +#define REG64(reg, addr) \
> + enum { A_ ## reg = (addr) }; \
> + enum { R_ ## reg = (addr) / 8 };
> +
> /* Define SHIFT, LENGTH and MASK constants for a field within a register */
>
> /* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH
> @@ -58,6 +62,8 @@
> /* Extract a field from an array of registers */
> #define ARRAY_FIELD_EX32(regs, reg, field) \
> FIELD_EX32((regs)[R_ ## reg], reg, field)
> +#define ARRAY_FIELD_EX64(regs, reg, field) \
> + FIELD_EX64((regs)[R_ ## reg], reg, field)
>
> /* Deposit a register field.
> * Assigning values larger then the target field will result in
> @@ -99,5 +105,7 @@
> /* Deposit a field to array of registers. */
> #define ARRAY_FIELD_DP32(regs, reg, field, val) \
> (regs)[R_ ## reg] = FIELD_DP32((regs)[R_ ## reg], reg, field, val);
> +#define ARRAY_FIELD_DP64(regs, reg, field, val) \
> + (regs)[R_ ## reg] = FIELD_DP64((regs)[R_ ## reg], reg, field, val);
>
> #endif
> --
> 2.7.4
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64
2021-07-19 22:02 ` [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64 Joe Komlodi
@ 2021-07-20 6:34 ` Alistair Francis
2021-07-20 11:46 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2021-07-20 6:34 UTC (permalink / raw)
To: Joe Komlodi
Cc: Alistair Francis, Richard Henderson, qemu-devel@nongnu.org Developers
On Tue, Jul 20, 2021 at 8:03 AM Joe Komlodi <joe.komlodi@xilinx.com> wrote:
>
> If we have a field that's wider than 32-bits, we need a data type wide enough to
> be able to create the bitfield used to deposit the value.
>
> Signed-off-by: Joe Komlodi <joe.komlodi@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/registerfields.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
> index 9a03ac5..f2a3c9c 100644
> --- a/include/hw/registerfields.h
> +++ b/include/hw/registerfields.h
> @@ -95,7 +95,7 @@
> _d; })
> #define FIELD_DP64(storage, reg, field, val) ({ \
> struct { \
> - unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
> + uint64_t v:R_ ## reg ## _ ## field ## _LENGTH; \
> } _v = { .v = val }; \
> uint64_t _d; \
> _d = deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
> --
> 2.7.4
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64
2021-07-19 22:02 ` [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64 Joe Komlodi
2021-07-20 6:34 ` Alistair Francis
@ 2021-07-20 11:46 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-07-20 11:46 UTC (permalink / raw)
To: Joe Komlodi, qemu-devel; +Cc: alistair, richard.henderson
On 7/20/21 12:02 AM, Joe Komlodi wrote:
> If we have a field that's wider than 32-bits, we need a data type wide enough to
> be able to create the bitfield used to deposit the value.
>
> Signed-off-by: Joe Komlodi <joe.komlodi@xilinx.com>
> ---
> include/hw/registerfields.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-07-20 11:57 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2021-07-19 22:02 [PATCH v2 0/2] Add more 64-bit utilities Joe Komlodi
2021-07-19 22:02 ` [PATCH v2 1/2] hw/core/register: " Joe Komlodi
2021-07-20 6:33 ` Alistair Francis
2021-07-19 22:02 ` [PATCH v2 2/2] hw/registerfields: Use 64-bit bitfield for FIELD_DP64 Joe Komlodi
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