From: Ard Biesheuvel <ard.biesheuvel@linaro.org> To: Marc Zyngier <marc.zyngier@arm.com> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, kvmarm <kvmarm@lists.cs.columbia.edu>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Peter Maydell <peter.maydell@linaro.org>, Christoffer Dall <christoffer.dall@linaro.org>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Mark Rutland <mark.rutland@arm.com>, Robin Murphy <robin.murphy@arm.com>, Jon Masters <jcm@redhat.com> Subject: Re: [PATCH v2 16/16] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Date: Mon, 29 Jan 2018 19:41:22 +0000 [thread overview] Message-ID: <CAKv+Gu-8vjgq1ihfoTC5b1H4gsqAKzciyCXFDsW0e1dBcpZLdQ@mail.gmail.com> (raw) In-Reply-To: <20180129174559.1866-17-marc.zyngier@arm.com> On 29 January 2018 at 17:45, Marc Zyngier <marc.zyngier@arm.com> wrote: > Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. > It is lovely. Really. > > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> > --- > arch/arm64/include/asm/kvm_psci.h | 63 ++++++++++++++++++++++++++++++++++++ > arch/arm64/kernel/bpi.S | 20 ++++++++++++ > arch/arm64/kernel/cpu_errata.c | 68 ++++++++++++++++++++++++++++++++++++++- > 3 files changed, 150 insertions(+), 1 deletion(-) > create mode 100644 arch/arm64/include/asm/kvm_psci.h > > diff --git a/arch/arm64/include/asm/kvm_psci.h b/arch/arm64/include/asm/kvm_psci.h Did you mean to add this file? It is mostly identical to include/kvm/arm_psci.h > new file mode 100644 > index 000000000000..f553e3795a4e > --- /dev/null > +++ b/arch/arm64/include/asm/kvm_psci.h > @@ -0,0 +1,63 @@ > +/* > + * Copyright (C) 2012,2013 - ARM Ltd > + * Author: Marc Zyngier <marc.zyngier@arm.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +#ifndef __ARM64_KVM_PSCI_H__ > +#define __ARM64_KVM_PSCI_H__ > + > +#include <linux/kvm_host.h> > + > +#define PSCI_VERSION(x,y) ((((x) & 0x7fff) << 16) | ((y) & 0xffff)) > +#define KVM_ARM_PSCI_0_1 PSCI_VERSION(0, 1) > +#define KVM_ARM_PSCI_0_2 PSCI_VERSION(0, 2) > +#define KVM_ARM_PSCI_1_0 PSCI_VERSION(1, 0) > + > +#define KVM_ARM_PSCI_LATEST KVM_ARM_PSCI_1_0 > + > +/* > + * We need the KVM pointer independently from the vcpu as we can call > + * this from HYP, and need to apply kern_hyp_va on it... > + */ > +static inline int kvm_psci_version(struct kvm_vcpu *vcpu, struct kvm *kvm) > +{ > + /* > + * Our PSCI implementation stays the same across versions from > + * v0.2 onward, only adding the few mandatory functions (such > + * as FEATURES with 1.0) that are required by newer > + * revisions. It is thus safe to return the latest, unless > + * userspace has instructed us otherwise. > + */ > + if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features)) { > + if (kvm->arch.psci_version) > + return kvm->arch.psci_version; > + > + return KVM_ARM_PSCI_LATEST; > + } > + > + return KVM_ARM_PSCI_0_1; > +} > + > + > +int kvm_hvc_call_handler(struct kvm_vcpu *vcpu); > + > +struct kvm_one_reg; > + > +int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu); > +int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); > +int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); > +int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); > + > +#endif /* __ARM64_KVM_PSCI_H__ */ > diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S > index 76225c2611ea..fdeed629f2c6 100644 > --- a/arch/arm64/kernel/bpi.S > +++ b/arch/arm64/kernel/bpi.S > @@ -17,6 +17,7 @@ > */ > > #include <linux/linkage.h> > +#include <linux/arm-smccc.h> > > .macro ventry target > .rept 31 > @@ -85,3 +86,22 @@ ENTRY(__qcom_hyp_sanitize_link_stack_start) > .endr > ldp x29, x30, [sp], #16 > ENTRY(__qcom_hyp_sanitize_link_stack_end) > + > +.macro smccc_workaround_1 inst > + sub sp, sp, #(8 * 4) > + stp x2, x3, [sp, #(8 * 0)] > + stp x0, x1, [sp, #(8 * 2)] > + mov w0, #ARM_SMCCC_ARCH_WORKAROUND_1 > + \inst #0 > + ldp x2, x3, [sp, #(8 * 0)] > + ldp x0, x1, [sp, #(8 * 2)] > + add sp, sp, #(8 * 4) > +.endm > + > +ENTRY(__smccc_workaround_1_smc_start) > + smccc_workaround_1 smc > +ENTRY(__smccc_workaround_1_smc_end) > + > +ENTRY(__smccc_workaround_1_hvc_start) > + smccc_workaround_1 hvc > +ENTRY(__smccc_workaround_1_hvc_end) > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > index ed6881882231..36cff870d5d7 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -70,6 +70,10 @@ DEFINE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data); > extern char __psci_hyp_bp_inval_start[], __psci_hyp_bp_inval_end[]; > extern char __qcom_hyp_sanitize_link_stack_start[]; > extern char __qcom_hyp_sanitize_link_stack_end[]; > +extern char __smccc_workaround_1_smc_start[]; > +extern char __smccc_workaround_1_smc_end[]; > +extern char __smccc_workaround_1_hvc_start[]; > +extern char __smccc_workaround_1_hvc_end[]; > > static void __copy_hyp_vect_bpi(int slot, const char *hyp_vecs_start, > const char *hyp_vecs_end) > @@ -116,6 +120,10 @@ static void __install_bp_hardening_cb(bp_hardening_cb_t fn, > #define __psci_hyp_bp_inval_end NULL > #define __qcom_hyp_sanitize_link_stack_start NULL > #define __qcom_hyp_sanitize_link_stack_end NULL > +#define __smccc_workaround_1_smc_start NULL > +#define __smccc_workaround_1_smc_end NULL > +#define __smccc_workaround_1_hvc_start NULL > +#define __smccc_workaround_1_hvc_end NULL > > static void __install_bp_hardening_cb(bp_hardening_cb_t fn, > const char *hyp_vecs_start, > @@ -142,17 +150,75 @@ static void install_bp_hardening_cb(const struct arm64_cpu_capabilities *entry, > __install_bp_hardening_cb(fn, hyp_vecs_start, hyp_vecs_end); > } > > +#include <uapi/linux/psci.h> > +#include <linux/arm-smccc.h> > #include <linux/psci.h> > > +static void call_smc_arch_workaround_1(void) > +{ > + arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); > +} > + > +static void call_hvc_arch_workaround_1(void) > +{ > + arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); > +} > + > +static bool check_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) > +{ > + bp_hardening_cb_t cb; > + void *smccc_start, *smccc_end; > + struct arm_smccc_res res; > + > + if (!entry->matches(entry, SCOPE_LOCAL_CPU)) > + return false; > + > + if (psci_ops.variant == SMCCC_VARIANT_1_0) > + return false; > + > + switch (psci_ops.conduit) { > + case PSCI_CONDUIT_HVC: > + arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, > + ARM_SMCCC_ARCH_WORKAROUND_1, &res); > + if (res.a0) > + return false; > + cb = call_hvc_arch_workaround_1; > + smccc_start = __smccc_workaround_1_hvc_start; > + smccc_end = __smccc_workaround_1_hvc_end; > + break; > + > + case PSCI_CONDUIT_SMC: > + arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, > + ARM_SMCCC_ARCH_WORKAROUND_1, &res); > + if (res.a0) > + return false; > + cb = call_smc_arch_workaround_1; > + smccc_start = __smccc_workaround_1_smc_start; > + smccc_end = __smccc_workaround_1_smc_end; > + break; > + > + default: > + return false; > + } > + > + install_bp_hardening_cb(entry, cb, smccc_start, smccc_end); > + > + return true; > +} > + > static int enable_psci_bp_hardening(void *data) > { > const struct arm64_cpu_capabilities *entry = data; > > - if (psci_ops.get_version) > + if (psci_ops.get_version) { > + if (check_smccc_arch_workaround_1(entry)) > + return 0; > + > install_bp_hardening_cb(entry, > (bp_hardening_cb_t)psci_ops.get_version, > __psci_hyp_bp_inval_start, > __psci_hyp_bp_inval_end); > + } > > return 0; > } > -- > 2.14.2 >
WARNING: multiple messages have this Message-ID (diff)
From: ard.biesheuvel@linaro.org (Ard Biesheuvel) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 16/16] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Date: Mon, 29 Jan 2018 19:41:22 +0000 [thread overview] Message-ID: <CAKv+Gu-8vjgq1ihfoTC5b1H4gsqAKzciyCXFDsW0e1dBcpZLdQ@mail.gmail.com> (raw) In-Reply-To: <20180129174559.1866-17-marc.zyngier@arm.com> On 29 January 2018 at 17:45, Marc Zyngier <marc.zyngier@arm.com> wrote: > Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. > It is lovely. Really. > > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> > --- > arch/arm64/include/asm/kvm_psci.h | 63 ++++++++++++++++++++++++++++++++++++ > arch/arm64/kernel/bpi.S | 20 ++++++++++++ > arch/arm64/kernel/cpu_errata.c | 68 ++++++++++++++++++++++++++++++++++++++- > 3 files changed, 150 insertions(+), 1 deletion(-) > create mode 100644 arch/arm64/include/asm/kvm_psci.h > > diff --git a/arch/arm64/include/asm/kvm_psci.h b/arch/arm64/include/asm/kvm_psci.h Did you mean to add this file? It is mostly identical to include/kvm/arm_psci.h > new file mode 100644 > index 000000000000..f553e3795a4e > --- /dev/null > +++ b/arch/arm64/include/asm/kvm_psci.h > @@ -0,0 +1,63 @@ > +/* > + * Copyright (C) 2012,2013 - ARM Ltd > + * Author: Marc Zyngier <marc.zyngier@arm.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +#ifndef __ARM64_KVM_PSCI_H__ > +#define __ARM64_KVM_PSCI_H__ > + > +#include <linux/kvm_host.h> > + > +#define PSCI_VERSION(x,y) ((((x) & 0x7fff) << 16) | ((y) & 0xffff)) > +#define KVM_ARM_PSCI_0_1 PSCI_VERSION(0, 1) > +#define KVM_ARM_PSCI_0_2 PSCI_VERSION(0, 2) > +#define KVM_ARM_PSCI_1_0 PSCI_VERSION(1, 0) > + > +#define KVM_ARM_PSCI_LATEST KVM_ARM_PSCI_1_0 > + > +/* > + * We need the KVM pointer independently from the vcpu as we can call > + * this from HYP, and need to apply kern_hyp_va on it... > + */ > +static inline int kvm_psci_version(struct kvm_vcpu *vcpu, struct kvm *kvm) > +{ > + /* > + * Our PSCI implementation stays the same across versions from > + * v0.2 onward, only adding the few mandatory functions (such > + * as FEATURES with 1.0) that are required by newer > + * revisions. It is thus safe to return the latest, unless > + * userspace has instructed us otherwise. > + */ > + if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features)) { > + if (kvm->arch.psci_version) > + return kvm->arch.psci_version; > + > + return KVM_ARM_PSCI_LATEST; > + } > + > + return KVM_ARM_PSCI_0_1; > +} > + > + > +int kvm_hvc_call_handler(struct kvm_vcpu *vcpu); > + > +struct kvm_one_reg; > + > +int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu); > +int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); > +int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); > +int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); > + > +#endif /* __ARM64_KVM_PSCI_H__ */ > diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S > index 76225c2611ea..fdeed629f2c6 100644 > --- a/arch/arm64/kernel/bpi.S > +++ b/arch/arm64/kernel/bpi.S > @@ -17,6 +17,7 @@ > */ > > #include <linux/linkage.h> > +#include <linux/arm-smccc.h> > > .macro ventry target > .rept 31 > @@ -85,3 +86,22 @@ ENTRY(__qcom_hyp_sanitize_link_stack_start) > .endr > ldp x29, x30, [sp], #16 > ENTRY(__qcom_hyp_sanitize_link_stack_end) > + > +.macro smccc_workaround_1 inst > + sub sp, sp, #(8 * 4) > + stp x2, x3, [sp, #(8 * 0)] > + stp x0, x1, [sp, #(8 * 2)] > + mov w0, #ARM_SMCCC_ARCH_WORKAROUND_1 > + \inst #0 > + ldp x2, x3, [sp, #(8 * 0)] > + ldp x0, x1, [sp, #(8 * 2)] > + add sp, sp, #(8 * 4) > +.endm > + > +ENTRY(__smccc_workaround_1_smc_start) > + smccc_workaround_1 smc > +ENTRY(__smccc_workaround_1_smc_end) > + > +ENTRY(__smccc_workaround_1_hvc_start) > + smccc_workaround_1 hvc > +ENTRY(__smccc_workaround_1_hvc_end) > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > index ed6881882231..36cff870d5d7 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -70,6 +70,10 @@ DEFINE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data); > extern char __psci_hyp_bp_inval_start[], __psci_hyp_bp_inval_end[]; > extern char __qcom_hyp_sanitize_link_stack_start[]; > extern char __qcom_hyp_sanitize_link_stack_end[]; > +extern char __smccc_workaround_1_smc_start[]; > +extern char __smccc_workaround_1_smc_end[]; > +extern char __smccc_workaround_1_hvc_start[]; > +extern char __smccc_workaround_1_hvc_end[]; > > static void __copy_hyp_vect_bpi(int slot, const char *hyp_vecs_start, > const char *hyp_vecs_end) > @@ -116,6 +120,10 @@ static void __install_bp_hardening_cb(bp_hardening_cb_t fn, > #define __psci_hyp_bp_inval_end NULL > #define __qcom_hyp_sanitize_link_stack_start NULL > #define __qcom_hyp_sanitize_link_stack_end NULL > +#define __smccc_workaround_1_smc_start NULL > +#define __smccc_workaround_1_smc_end NULL > +#define __smccc_workaround_1_hvc_start NULL > +#define __smccc_workaround_1_hvc_end NULL > > static void __install_bp_hardening_cb(bp_hardening_cb_t fn, > const char *hyp_vecs_start, > @@ -142,17 +150,75 @@ static void install_bp_hardening_cb(const struct arm64_cpu_capabilities *entry, > __install_bp_hardening_cb(fn, hyp_vecs_start, hyp_vecs_end); > } > > +#include <uapi/linux/psci.h> > +#include <linux/arm-smccc.h> > #include <linux/psci.h> > > +static void call_smc_arch_workaround_1(void) > +{ > + arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); > +} > + > +static void call_hvc_arch_workaround_1(void) > +{ > + arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); > +} > + > +static bool check_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) > +{ > + bp_hardening_cb_t cb; > + void *smccc_start, *smccc_end; > + struct arm_smccc_res res; > + > + if (!entry->matches(entry, SCOPE_LOCAL_CPU)) > + return false; > + > + if (psci_ops.variant == SMCCC_VARIANT_1_0) > + return false; > + > + switch (psci_ops.conduit) { > + case PSCI_CONDUIT_HVC: > + arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, > + ARM_SMCCC_ARCH_WORKAROUND_1, &res); > + if (res.a0) > + return false; > + cb = call_hvc_arch_workaround_1; > + smccc_start = __smccc_workaround_1_hvc_start; > + smccc_end = __smccc_workaround_1_hvc_end; > + break; > + > + case PSCI_CONDUIT_SMC: > + arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, > + ARM_SMCCC_ARCH_WORKAROUND_1, &res); > + if (res.a0) > + return false; > + cb = call_smc_arch_workaround_1; > + smccc_start = __smccc_workaround_1_smc_start; > + smccc_end = __smccc_workaround_1_smc_end; > + break; > + > + default: > + return false; > + } > + > + install_bp_hardening_cb(entry, cb, smccc_start, smccc_end); > + > + return true; > +} > + > static int enable_psci_bp_hardening(void *data) > { > const struct arm64_cpu_capabilities *entry = data; > > - if (psci_ops.get_version) > + if (psci_ops.get_version) { > + if (check_smccc_arch_workaround_1(entry)) > + return 0; > + > install_bp_hardening_cb(entry, > (bp_hardening_cb_t)psci_ops.get_version, > __psci_hyp_bp_inval_start, > __psci_hyp_bp_inval_end); > + } > > return 0; > } > -- > 2.14.2 >
next prev parent reply other threads:[~2018-01-29 19:41 UTC|newest] Thread overview: 116+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-01-29 17:45 [PATCH v2 00/16] arm64: Add SMCCC v1.1 support and CVE-2017-5715 (Spectre variant 2) mitigation Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 01/16] arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 02/16] arm: " Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 03/16] arm/arm64: KVM: Consolidate the PSCI include files Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 04/16] arm/arm64: KVM: Add PSCI_VERSION helper Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-30 13:15 ` Robin Murphy 2018-01-30 13:15 ` Robin Murphy 2018-01-30 14:52 ` Marc Zyngier 2018-01-30 14:52 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 05/16] arm/arm64: KVM: Add smccc accessors to PSCI code Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 06/16] arm/arm64: KVM: Implement PSCI 1.0 support Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 07/16] arm/arm64: KVM: Add PSCI version selection API Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-31 17:38 ` Andrew Jones 2018-01-31 17:38 ` Andrew Jones 2018-01-31 17:45 ` Marc Zyngier 2018-01-31 17:45 ` Marc Zyngier 2018-01-31 18:03 ` Andrew Jones 2018-01-31 18:03 ` Andrew Jones 2018-01-31 18:03 ` Andrew Jones 2018-01-31 18:36 ` Marc Zyngier 2018-01-31 18:36 ` Marc Zyngier 2018-01-31 19:15 ` Andrew Jones 2018-01-31 19:15 ` Andrew Jones 2018-01-31 18:11 ` kbuild test robot 2018-01-31 18:11 ` kbuild test robot 2018-01-29 17:45 ` [PATCH v2 08/16] arm/arm64: KVM: Advertise SMCCC v1.1 Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-30 0:23 ` Russell King - ARM Linux 2018-01-30 0:23 ` Russell King - ARM Linux 2018-01-30 12:28 ` Marc Zyngier 2018-01-30 12:28 ` Marc Zyngier 2018-01-30 12:28 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 09/16] arm/arm64: KVM: Turn kvm_psci_version into a static inline Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 10/16] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-30 12:38 ` Robin Murphy 2018-01-30 12:38 ` Robin Murphy 2018-01-29 17:45 ` [PATCH v2 11/16] arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 12/16] firmware/psci: Expose PSCI conduit Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:55 ` Lorenzo Pieralisi 2018-01-29 17:55 ` Lorenzo Pieralisi 2018-01-29 17:45 ` [PATCH v2 13/16] firmware/psci: Expose SMCCC version through psci_ops Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 18:39 ` Lorenzo Pieralisi 2018-01-29 18:39 ` Lorenzo Pieralisi 2018-01-30 12:09 ` Marc Zyngier 2018-01-30 12:09 ` Marc Zyngier 2018-01-30 12:55 ` Robin Murphy 2018-01-30 12:55 ` Robin Murphy 2018-01-30 13:51 ` Marc Zyngier 2018-01-30 13:51 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 14/16] arm/arm64: smccc: Make function identifiers an unsigned quantity Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` [PATCH v2 15/16] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 19:07 ` Robin Murphy 2018-01-29 19:07 ` Robin Murphy 2018-01-30 8:54 ` Marc Zyngier 2018-01-30 8:54 ` Marc Zyngier 2018-01-29 21:45 ` Ard Biesheuvel 2018-01-29 21:45 ` Ard Biesheuvel 2018-01-30 12:27 ` Marc Zyngier 2018-01-30 12:27 ` Marc Zyngier 2018-01-30 12:29 ` Ard Biesheuvel 2018-01-30 12:29 ` Ard Biesheuvel 2018-01-30 12:29 ` Ard Biesheuvel 2018-01-29 17:45 ` [PATCH v2 16/16] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 17:45 ` Marc Zyngier 2018-01-29 19:41 ` Ard Biesheuvel [this message] 2018-01-29 19:41 ` Ard Biesheuvel 2018-01-30 12:10 ` Marc Zyngier 2018-01-30 12:10 ` Marc Zyngier 2018-01-31 13:56 ` Hanjun Guo 2018-01-31 13:56 ` Hanjun Guo 2018-01-31 13:56 ` Hanjun Guo 2018-01-31 14:11 ` Marc Zyngier 2018-01-31 14:11 ` Marc Zyngier 2018-01-31 14:35 ` Ard Biesheuvel 2018-01-31 14:35 ` Ard Biesheuvel 2018-01-31 14:38 ` Ard Biesheuvel 2018-01-31 14:38 ` Ard Biesheuvel 2018-01-31 15:05 ` Marc Zyngier 2018-01-31 15:05 ` Marc Zyngier 2018-02-01 2:40 ` Hanjun Guo 2018-02-01 2:40 ` Hanjun Guo 2018-02-01 6:52 ` Hanjun Guo 2018-02-01 6:52 ` Hanjun Guo 2018-02-01 6:52 ` Hanjun Guo 2018-02-01 8:53 ` Marc Zyngier 2018-02-01 8:53 ` Marc Zyngier 2018-02-02 3:43 ` Hanjun Guo 2018-02-02 3:43 ` Hanjun Guo 2018-06-09 13:22 ` [PATCH v2 00/16] arm64: Add SMCCC v1.1 support and CVE-2017-5715 (Spectre variant 2) mitigation Jon Masters 2018-06-09 13:22 ` Jon Masters 2018-06-09 14:06 ` Marc Zyngier 2018-06-09 14:06 ` Marc Zyngier 2018-06-09 14:06 ` Marc Zyngier
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