From: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
To: liuzhiwei <zhiwei_liu@c-sky.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-riscv@nongnu.org, sagark@eecs.berkeley.edu,
bastian@mail.uni-paderborn.de, Palmer Dabbelt <palmer@sifive.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [Qemu-devel] RISC-V: Vector && DSP Extension
Date: Thu, 8 Aug 2019 13:29:13 +0200 [thread overview]
Message-ID: <CAL1e-=jceerbvam57mmXoKWHzepB-qUFL08gBEnSws_ohewLzw@mail.gmail.com> (raw)
In-Reply-To: <97a6ae9f-2845-4a3c-2a31-367787622268@c-sky.com>
On Thu, Aug 8, 2019 at 11:52 AM liuzhiwei <zhiwei_liu@c-sky.com> wrote:
> Hi all,
>
> My workmate and I have been working on Vector & Dsp extension, and
> I'd like to share develop status with folks.
>
> The spec references for Vector extension is riscv-v-spec-0.7.1, and
> riscv-p-spec-0.5 for DSP extension.
Hello, Liu.
I will not answer your questions directly, however I want to bring to you
and others another perspective on this situation.
First, please provide the link to the specifications. Via Google, I found
that "riscv-v-spec-0.7.1" is titled "Working draft of the proposed RISC-V V
vector extension". I could not find "riscv-p-spec-0.5".
I am not sure what the QEMU policy towards "working draft proposal" type of
specification is. Peter, can you perhaps clarify that or any other related
issue?
I would advice some caution in these cases. The major issue is backward
compatibility, but there are other issues too. Let's say, fairness. If we
let emulation of a component based on a "working draft proposal" be
integrated into QEMU, this will set a precedent, and many other developer
would rightfully ask for their contributions based on drafts to be
integrated into QEMU. Our policy should be as equal as possible to all
contribution, large or small, riscv or alpha, cpu or device, tcg or kvm -
in my honest opinion. QEMU upstream should not be a collecting place for
all imaginable experimentations, certain criteria on what is appropriate
for upstreaming exist and must continue to exist.
Yours,
Aleksandar
> The code of vector extension is
> ready and under testing, the first patch will be sent about two weeks
> later. After that we will forward working on DSP extension, and send the
> first patch in middle October.
>
> Could the maintainers tell me whether the specs referenced are
> appropriate? Is anyone working on these extensions? I'd like to get
> your status, and maybe discuss questions and work togather.
>
> Best Regards
>
> LIU Zhiwei
>
>
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
To: liuzhiwei <zhiwei_liu@c-sky.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
qemu-riscv@nongnu.org, Palmer Dabbelt <palmer@sifive.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
sagark@eecs.berkeley.edu, bastian@mail.uni-paderborn.de,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [Qemu-riscv] [Qemu-devel] RISC-V: Vector && DSP Extension
Date: Thu, 8 Aug 2019 13:29:13 +0200 [thread overview]
Message-ID: <CAL1e-=jceerbvam57mmXoKWHzepB-qUFL08gBEnSws_ohewLzw@mail.gmail.com> (raw)
In-Reply-To: <97a6ae9f-2845-4a3c-2a31-367787622268@c-sky.com>
[-- Attachment #1: Type: text/plain, Size: 2009 bytes --]
On Thu, Aug 8, 2019 at 11:52 AM liuzhiwei <zhiwei_liu@c-sky.com> wrote:
> Hi all,
>
> My workmate and I have been working on Vector & Dsp extension, and
> I'd like to share develop status with folks.
>
> The spec references for Vector extension is riscv-v-spec-0.7.1, and
> riscv-p-spec-0.5 for DSP extension.
Hello, Liu.
I will not answer your questions directly, however I want to bring to you
and others another perspective on this situation.
First, please provide the link to the specifications. Via Google, I found
that "riscv-v-spec-0.7.1" is titled "Working draft of the proposed RISC-V V
vector extension". I could not find "riscv-p-spec-0.5".
I am not sure what the QEMU policy towards "working draft proposal" type of
specification is. Peter, can you perhaps clarify that or any other related
issue?
I would advice some caution in these cases. The major issue is backward
compatibility, but there are other issues too. Let's say, fairness. If we
let emulation of a component based on a "working draft proposal" be
integrated into QEMU, this will set a precedent, and many other developer
would rightfully ask for their contributions based on drafts to be
integrated into QEMU. Our policy should be as equal as possible to all
contribution, large or small, riscv or alpha, cpu or device, tcg or kvm -
in my honest opinion. QEMU upstream should not be a collecting place for
all imaginable experimentations, certain criteria on what is appropriate
for upstreaming exist and must continue to exist.
Yours,
Aleksandar
> The code of vector extension is
> ready and under testing, the first patch will be sent about two weeks
> later. After that we will forward working on DSP extension, and send the
> first patch in middle October.
>
> Could the maintainers tell me whether the specs referenced are
> appropriate? Is anyone working on these extensions? I'd like to get
> your status, and maybe discuss questions and work togather.
>
> Best Regards
>
> LIU Zhiwei
>
>
>
>
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next prev parent reply other threads:[~2019-08-08 11:29 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-08 9:39 [Qemu-devel] RISC-V: Vector && DSP Extension liuzhiwei
2019-08-08 9:39 ` [Qemu-riscv] " liuzhiwei
2019-08-08 11:29 ` Aleksandar Markovic [this message]
2019-08-08 11:29 ` [Qemu-riscv] [Qemu-devel] " Aleksandar Markovic
2019-08-08 13:48 ` Chih-Min Chao
2019-08-08 13:48 ` [Qemu-riscv] " Chih-Min Chao
2019-08-08 14:19 ` Aleksandar Markovic
2019-08-08 14:19 ` [Qemu-riscv] " Aleksandar Markovic
2019-08-10 13:35 ` LIU ZhiWei
2019-08-10 13:35 ` [Qemu-riscv] " LIU ZhiWei
2019-08-10 1:54 ` Alistair Francis
2019-08-10 1:54 ` [Qemu-riscv] " Alistair Francis
2019-08-10 13:55 ` LIU ZhiWei
2019-08-10 13:55 ` [Qemu-riscv] " LIU ZhiWei
2019-08-11 16:50 ` Alistair Francis
2019-08-11 16:50 ` [Qemu-riscv] " Alistair Francis
2019-08-15 8:53 ` Aleksandar Markovic
2019-08-15 8:53 ` [Qemu-riscv] " Aleksandar Markovic
2019-08-15 9:07 ` Peter Maydell
2019-08-15 9:07 ` [Qemu-riscv] " Peter Maydell
2019-08-15 10:32 ` Aleksandar Markovic
2019-08-15 10:32 ` [Qemu-riscv] " Aleksandar Markovic
2019-08-15 21:37 ` Alistair Francis
2019-08-15 21:37 ` [Qemu-riscv] " Alistair Francis
2019-08-21 19:31 ` Palmer Dabbelt
2019-08-21 19:31 ` [Qemu-riscv] " Palmer Dabbelt
2019-08-21 23:10 ` [Qemu-devel] [Qemu-riscv] " Jonathan Behrens
2019-08-21 23:10 ` [Qemu-riscv] [Qemu-devel] " Jonathan Behrens
2019-08-22 1:50 ` liuzhiwei
2019-08-22 1:50 ` [Qemu-riscv] " liuzhiwei
2019-08-22 22:37 ` Alistair Francis
2019-08-22 22:37 ` [Qemu-riscv] " Alistair Francis
2019-08-28 0:25 ` Palmer Dabbelt
2019-08-28 0:25 ` [Qemu-riscv] " Palmer Dabbelt
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