* [U-Boot] Armada 38x clearfog pci trouble
@ 2017-09-22 6:35 Влад Мао
0 siblings, 0 replies; 6+ messages in thread
From: Влад Мао @ 2017-09-22 6:35 UTC (permalink / raw)
To: u-boot
Hello. I have a clearfog base board with PCI-E video card based on
SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with
u-boot and accessing to this card.
I use last u-boot from git, and when i try to read memory from Base
address 0 of PCI-E, board resetted. log from board:
High speed PHY - Version: 2.0
Detected Device ID 6828
board SerDes lanes topology details:
| Lane # | Speed | Type |
--------------------------------
| 0 | 3 | SATA0 |
| 1 | 0 | SGMII1 |
| 2 | 5 | PCIe1 |
| 3 | 5 | USB3 HOST1 |
| 4 | 5 | PCIe2 |
| 5 | 0 | SGMII2 |
--------------------------------
:** Link is Gen1, check the EP capability
PCIe, Idx 1: remains Gen1
PCIe, Idx 2: detected no link
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver TIP-1.29.0
DDR3 Training Sequence - Switching XBAR Window to FastPath Window
DDR3 Training Sequence - Ended Successfully
Trying to boot from MMC1
U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300)
SoC: MV88F6828-A0 at 1600 MHz
I2C: ready
DRAM: 1 GiB (800 MHz, ECC not enabled)
MMC: mv_sdh: 0
PCI:
00:01.0 - 126f:0750 - Display controller
Model: SolidRun Clearfog A1
Board: SolidRun ClearFog
Net: eth2: ethernet at 30000, eth3: ethernet at 34000, eth1: ethernet at 70000
Hit any key to stop autoboot: 0
=> pci
Scanning PCI devices on bus 0
BusDevFun VendorId DeviceId Device Class Sub-Class
_____________________________________________________________
00.01.00 0x126f 0x0750 Display controller 0x00
=> pci header 00.01.00
vendor ID = 0x126f
device ID = 0x0750
command register ID = 0x0007
status register = 0x0010
revision ID = 0xa1
class code = 0x03 (Display controller)
sub class code = 0x00
programming interface = 0x00
cache line = 0x08
latency time = 0x00
header type = 0x00
BIST = 0x00
base address 0 = 0xfc000008
base address 1 = 0xe8000000
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00000000
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x126f
sub system ID = 0x0750
expansion ROM base address = 0xe8200000
interrupt line = 0xff
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
=> md.l 0xe8000000 10
e8000000: 20a00000 01000060 01f00000 01765324 ... `.......$Sv.
e8000010: 01765324 00000000 00000000 00000000 $Sv.............
e8000020: 00000008 00000000 00000000 00000000 ................
e8000030: 00000000 00000000 00000000 00000000 ................
=> md.l 0xfc000008 10
fc000008:data abort
pc : [<3ffb8104>] lr : [<3ffb80e0>]
reloc pc : [<0083a104>] lr : [<0083a0e0>]
sp : 3fb68950 ip : 00000002 fp : fc000008
r10: fc000008 r9 : 3fb6ded8 r8 : 00000004
r7 : 00000000 r6 : 00000004 r5 : 00000004 r4 : 00000010
r3 : fc000008 r2 : 0000003a r1 : 3fb68964 r0 : 00000009
Flags: nZCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
:05:09)
High speed PHY - Version: 2.0
Detected Device ID 6828
board SerDes lanes topology details:
| Lane # | Speed | Type |
--------------------------------
| 0 | 3 | SATA0 |
| 1 | 0 | SGMII1 |
| 2 | 5 | PCIe1 |
| 3 | 5 | USB3 HOST1 |
| 4 | 5 | PCIe2 |
| 5 | 0 | SGMII2 |
--------------------------------
:** Link is Gen1, check the EP capability
PCIe, Idx 1: remains Gen1
PCIe, Idx 2: detected no link
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver TIP-1.29.0
DDR3 Training Sequence - Switching XBAR Window to FastPath Window
DDR3 Training Sequence - Ended Successfully
Trying to boot from MMC1
U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300)
SoC: MV88F6828-A0 at 1600 MHz
I2C: ready
DRAM: 1 GiB (800 MHz, ECC not enabled)
MMC: mv_sdh: 0
PCI:
00:01.0 - 126f:0750 - Display controller
Model: SolidRun Clearfog A1
Board: SolidRun ClearFog
Net: eth2: ethernet at 30000, eth3: ethernet at 34000, eth1: ethernet at 70000
Hit any key to stop autoboot: 0
=>
As you can see, memory from base address 1 readed sucessfully. What is
the problem and how i can fix this? Feel free to ask logs or something
other, i grant it for you
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Armada 38x clearfog pci trouble
2017-09-22 13:33 ` Bin Meng
@ 2017-09-22 15:25 ` Stefan Roese
0 siblings, 0 replies; 6+ messages in thread
From: Stefan Roese @ 2017-09-22 15:25 UTC (permalink / raw)
To: u-boot
Hi Bin,
On 22.09.2017 15:33, Bin Meng wrote:
> On Fri, Sep 22, 2017 at 8:32 PM, Stefan Roese <sr@denx.de> wrote:
>> On 22.09.2017 14:13, Владислав wrote:
>>>
>>> I try to port sm750fb driver to uboot. I need to access bar0 because its
>>> framebuffer memory of video card.
>>>
>>> After little research i find out pciauto_region_allocate failed for
>>> allocation region for bar0:
>>>
>>> PCI Autoconfig: BAR 0, Mem, size=0x4000000, No room in resource (addr:
>>> 0xE8000000, size: 0x4000000, res->bus_start: 0xE8000000, res->size:
>>> 0x2000000)
>>>
>>>
>>> PCI Autoconfig: BAR 1, Mem, size=0x200000, address=0xe8000000
>>> bus_lower=0xe8200000
>>>
>>>
>>> I find out definition in pci_mvebu.c:
>>>
>>> #define PCIE_MEM_SIZE (32 << 20)
>>>
>>> After changing it to (128 << 20) autoconfig working vell and bar0 is fully
>>> accessible and work
>
> Can we convert this pci_mvebu.c to DM PCI? So that this won't be
> hardcoded in the driver, instead using device tree settings from the
> boards.
I agree, that this would be much better. But I currently don't
have the time to port this driver over to DM. Patches from
others are very welcome... ;)
Thanks,
Stefan
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Armada 38x clearfog pci trouble
2017-09-22 12:32 ` Stefan Roese
@ 2017-09-22 13:33 ` Bin Meng
2017-09-22 15:25 ` Stefan Roese
0 siblings, 1 reply; 6+ messages in thread
From: Bin Meng @ 2017-09-22 13:33 UTC (permalink / raw)
To: u-boot
Hi,
On Fri, Sep 22, 2017 at 8:32 PM, Stefan Roese <sr@denx.de> wrote:
> On 22.09.2017 14:13, Владислав wrote:
>>
>> I try to port sm750fb driver to uboot. I need to access bar0 because its
>> framebuffer memory of video card.
>>
>> After little research i find out pciauto_region_allocate failed for
>> allocation region for bar0:
>>
>> PCI Autoconfig: BAR 0, Mem, size=0x4000000, No room in resource (addr:
>> 0xE8000000, size: 0x4000000, res->bus_start: 0xE8000000, res->size:
>> 0x2000000)
>>
>>
>> PCI Autoconfig: BAR 1, Mem, size=0x200000, address=0xe8000000
>> bus_lower=0xe8200000
>>
>>
>> I find out definition in pci_mvebu.c:
>>
>> #define PCIE_MEM_SIZE (32 << 20)
>>
>> After changing it to (128 << 20) autoconfig working vell and bar0 is fully
>> accessible and work
Can we convert this pci_mvebu.c to DM PCI? So that this won't be
hardcoded in the driver, instead using device tree settings from the
boards.
>
>
> I see. Please send a proper patch to change this setting
> in mainline to the list.
>
Regards,
Bin
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Armada 38x clearfog pci trouble
[not found] ` <15ea981e968.277d.4714f83aa2f54bf52e6c7ebab4906a3c@gmail.com>
@ 2017-09-22 12:32 ` Stefan Roese
2017-09-22 13:33 ` Bin Meng
0 siblings, 1 reply; 6+ messages in thread
From: Stefan Roese @ 2017-09-22 12:32 UTC (permalink / raw)
To: u-boot
On 22.09.2017 14:13, Владислав wrote:
> I try to port sm750fb driver to uboot. I need to access bar0 because its
> framebuffer memory of video card.
>
> After little research i find out pciauto_region_allocate failed for
> allocation region for bar0:
>
> PCI Autoconfig: BAR 0, Mem, size=0x4000000, No room in resource (addr:
> 0xE8000000, size: 0x4000000, res->bus_start: 0xE8000000, res->size:
> 0x2000000)
>
>
> PCI Autoconfig: BAR 1, Mem, size=0x200000, address=0xe8000000
> bus_lower=0xe8200000
>
>
> I find out definition in pci_mvebu.c:
>
> #define PCIE_MEM_SIZE (32 << 20)
>
> After changing it to (128 << 20) autoconfig working vell and bar0 is
> fully accessible and work
I see. Please send a proper patch to change this setting
in mainline to the list.
Thanks,
Stefan
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Armada 38x clearfog pci trouble
2017-09-22 6:32 Влад Мао
@ 2017-09-22 11:46 ` Stefan Roese
[not found] ` <15ea981e968.277d.4714f83aa2f54bf52e6c7ebab4906a3c@gmail.com>
0 siblings, 1 reply; 6+ messages in thread
From: Stefan Roese @ 2017-09-22 11:46 UTC (permalink / raw)
To: u-boot
On 22.09.2017 08:32, Влад Мао wrote:
> Hello. I have a clearfog base board with PCI-E video card based on
> SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with
> u-boot and accessing to this card.
>
> I use last u-boot from git, and when i try to read memory from Base
> address 0 of PCI-E, board resetted. log from board:
>
> High speed PHY - Version: 2.0
> Detected Device ID 6828
> board SerDes lanes topology details:
> | Lane # | Speed | Type |
> --------------------------------
> | 0 | 3 | SATA0 |
> | 1 | 0 | SGMII1 |
> | 2 | 5 | PCIe1 |
> | 3 | 5 | USB3 HOST1 |
> | 4 | 5 | PCIe2 |
> | 5 | 0 | SGMII2 |
> --------------------------------
> :** Link is Gen1, check the EP capability
> PCIe, Idx 1: remains Gen1
> PCIe, Idx 2: detected no link
> High speed PHY - Ended Successfully
> DDR3 Training Sequence - Ver TIP-1.29.0
> DDR3 Training Sequence - Switching XBAR Window to FastPath Window
> DDR3 Training Sequence - Ended Successfully
> Trying to boot from MMC1
>
>
> U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300)
>
> SoC: MV88F6828-A0 at 1600 MHz
> I2C: ready
> DRAM: 1 GiB (800 MHz, ECC not enabled)
> MMC: mv_sdh: 0
> PCI:
> 00:01.0 - 126f:0750 - Display controller
> Model: SolidRun Clearfog A1
> Board: SolidRun ClearFog
> Net: eth2: ethernet at 30000, eth3: ethernet at 34000, eth1: ethernet at 70000
> Hit any key to stop autoboot: 0
> => pci
> Scanning PCI devices on bus 0
> BusDevFun VendorId DeviceId Device Class Sub-Class
> _____________________________________________________________
> 00.01.00 0x126f 0x0750 Display controller 0x00
> => pci header 00.01.00
> vendor ID = 0x126f
> device ID = 0x0750
> command register ID = 0x0007
> status register = 0x0010
> revision ID = 0xa1
> class code = 0x03 (Display controller)
> sub class code = 0x00
> programming interface = 0x00
> cache line = 0x08
> latency time = 0x00
> header type = 0x00
> BIST = 0x00
> base address 0 = 0xfc000008
> base address 1 = 0xe8000000
> base address 2 = 0x00000000
> base address 3 = 0x00000000
> base address 4 = 0x00000000
> base address 5 = 0x00000000
> cardBus CIS pointer = 0x00000000
> sub system vendor ID = 0x126f
> sub system ID = 0x0750
> expansion ROM base address = 0xe8200000
> interrupt line = 0xff
> interrupt pin = 0x01
> min Grant = 0x00
> max Latency = 0x00
> => md.l 0xe8000000 10
> e8000000: 20a00000 01000060 01f00000 01765324 ... `.......$Sv.
> e8000010: 01765324 00000000 00000000 00000000 $Sv.............
> e8000020: 00000008 00000000 00000000 00000000 ................
> e8000030: 00000000 00000000 00000000 00000000 ................
So accessing BAR1 (memory BAR) seems to work just fine.
> => md.l 0xfc000008 10
> fc000008:data abort
> pc : [<3ffb8104>] lr : [<3ffb80e0>]
> reloc pc : [<0083a104>] lr : [<0083a0e0>]
> sp : 3fb68950 ip : 00000002 fp : fc000008
> r10: fc000008 r9 : 3fb6ded8 r8 : 00000004
> r7 : 00000000 r6 : 00000004 r5 : 00000004 r4 : 00000010
> r3 : fc000008 r2 : 0000003a r1 : 3fb68964 r0 : 00000009
> Flags: nZCv IRQs off FIQs off Mode SVC_32
> Resetting CPU ...
You are trying to access BAR0, which is most likely not a
memory but a IO BAR. Why do you want to do this? Do you really
need to access this BAR from within U-Boot?
Thanks,
Stefan
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] Armada 38x clearfog pci trouble
@ 2017-09-22 6:32 Влад Мао
2017-09-22 11:46 ` Stefan Roese
0 siblings, 1 reply; 6+ messages in thread
From: Влад Мао @ 2017-09-22 6:32 UTC (permalink / raw)
To: u-boot
Hello. I have a clearfog base board with PCI-E video card based on
SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with
u-boot and accessing to this card.
I use last u-boot from git, and when i try to read memory from Base
address 0 of PCI-E, board resetted. log from board:
High speed PHY - Version: 2.0
Detected Device ID 6828
board SerDes lanes topology details:
| Lane # | Speed | Type |
--------------------------------
| 0 | 3 | SATA0 |
| 1 | 0 | SGMII1 |
| 2 | 5 | PCIe1 |
| 3 | 5 | USB3 HOST1 |
| 4 | 5 | PCIe2 |
| 5 | 0 | SGMII2 |
--------------------------------
:** Link is Gen1, check the EP capability
PCIe, Idx 1: remains Gen1
PCIe, Idx 2: detected no link
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver TIP-1.29.0
DDR3 Training Sequence - Switching XBAR Window to FastPath Window
DDR3 Training Sequence - Ended Successfully
Trying to boot from MMC1
U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300)
SoC: MV88F6828-A0 at 1600 MHz
I2C: ready
DRAM: 1 GiB (800 MHz, ECC not enabled)
MMC: mv_sdh: 0
PCI:
00:01.0 - 126f:0750 - Display controller
Model: SolidRun Clearfog A1
Board: SolidRun ClearFog
Net: eth2: ethernet at 30000, eth3: ethernet at 34000, eth1: ethernet at 70000
Hit any key to stop autoboot: 0
=> pci
Scanning PCI devices on bus 0
BusDevFun VendorId DeviceId Device Class Sub-Class
_____________________________________________________________
00.01.00 0x126f 0x0750 Display controller 0x00
=> pci header 00.01.00
vendor ID = 0x126f
device ID = 0x0750
command register ID = 0x0007
status register = 0x0010
revision ID = 0xa1
class code = 0x03 (Display controller)
sub class code = 0x00
programming interface = 0x00
cache line = 0x08
latency time = 0x00
header type = 0x00
BIST = 0x00
base address 0 = 0xfc000008
base address 1 = 0xe8000000
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00000000
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x126f
sub system ID = 0x0750
expansion ROM base address = 0xe8200000
interrupt line = 0xff
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
=> md.l 0xe8000000 10
e8000000: 20a00000 01000060 01f00000 01765324 ... `.......$Sv.
e8000010: 01765324 00000000 00000000 00000000 $Sv.............
e8000020: 00000008 00000000 00000000 00000000 ................
e8000030: 00000000 00000000 00000000 00000000 ................
=> md.l 0xfc000008 10
fc000008:data abort
pc : [<3ffb8104>] lr : [<3ffb80e0>]
reloc pc : [<0083a104>] lr : [<0083a0e0>]
sp : 3fb68950 ip : 00000002 fp : fc000008
r10: fc000008 r9 : 3fb6ded8 r8 : 00000004
r7 : 00000000 r6 : 00000004 r5 : 00000004 r4 : 00000010
r3 : fc000008 r2 : 0000003a r1 : 3fb68964 r0 : 00000009
Flags: nZCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
:05:09)
High speed PHY - Version: 2.0
Detected Device ID 6828
board SerDes lanes topology details:
| Lane # | Speed | Type |
--------------------------------
| 0 | 3 | SATA0 |
| 1 | 0 | SGMII1 |
| 2 | 5 | PCIe1 |
| 3 | 5 | USB3 HOST1 |
| 4 | 5 | PCIe2 |
| 5 | 0 | SGMII2 |
--------------------------------
:** Link is Gen1, check the EP capability
PCIe, Idx 1: remains Gen1
PCIe, Idx 2: detected no link
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver TIP-1.29.0
DDR3 Training Sequence - Switching XBAR Window to FastPath Window
DDR3 Training Sequence - Ended Successfully
Trying to boot from MMC1
U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300)
SoC: MV88F6828-A0 at 1600 MHz
I2C: ready
DRAM: 1 GiB (800 MHz, ECC not enabled)
MMC: mv_sdh: 0
PCI:
00:01.0 - 126f:0750 - Display controller
Model: SolidRun Clearfog A1
Board: SolidRun ClearFog
Net: eth2: ethernet at 30000, eth3: ethernet at 34000, eth1: ethernet at 70000
Hit any key to stop autoboot: 0
=>
As you can see, memory from base address 1 readed sucessfully. What is
the problem and how i can fix this? Feel free to ask logs or something
other, i grant it for you
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-09-22 15:25 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2017-09-22 6:35 [U-Boot] Armada 38x clearfog pci trouble Влад Мао
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2017-09-22 6:32 Влад Мао
2017-09-22 11:46 ` Stefan Roese
[not found] ` <15ea981e968.277d.4714f83aa2f54bf52e6c7ebab4906a3c@gmail.com>
2017-09-22 12:32 ` Stefan Roese
2017-09-22 13:33 ` Bin Meng
2017-09-22 15:25 ` Stefan Roese
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