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From: Rob Herring <robh+dt@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	MTD Maling List <linux-mtd@lists.infradead.org>,
	devicetree@vger.kernel.org, Michal Simek <monstr@monstr.eu>,
	Naga Sureshkumar Relli <nagasure@xilinx.com>,
	Amit Kumar Mahapatra <akumarma@xilinx.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Helmut Grohne <helmut.grohne@intenta.de>,
	Srinivas Goud <sgoud@xilinx.com>,
	Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Subject: Re: [PATCH v22 09/18] dt-binding: memory: pl353-smc: Convert to yaml
Date: Wed, 9 Jun 2021 14:35:10 -0500	[thread overview]
Message-ID: <CAL_JsqJP2Thvehn-OfsYYdBOTqQTp_-HFoKAK6aT27JENDWWdA@mail.gmail.com> (raw)
In-Reply-To: <20210609153410.53eadf8e@xps13>

On Wed, Jun 9, 2021 at 8:34 AM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> Hi Krzysztof,
>
> Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote on Wed, 9
> Jun 2021 14:12:40 +0200:
>
> > On 09/06/2021 10:01, Miquel Raynal wrote:
> > > Convert this binding file to yaml schema.
> > >
> > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > ---
> > >  .../memory-controllers/arm,pl353-smc.yaml     | 133 ++++++++++++++++++
> > >  .../bindings/memory-controllers/pl353-smc.txt |  45 ------
> > >  2 files changed, 133 insertions(+), 45 deletions(-)
> > >  create mode 100644 Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > >  delete mode 100644 Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml b/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > > new file mode 100644
> > > index 000000000000..1de6f87d4986
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > > @@ -0,0 +1,133 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: ARM PL353 Static Memory Controller (SMC) device-tree bindings
> > > +
> > > +maintainers:
> > > +  - Miquel Raynal <miquel.raynal@bootlin.com>
> > > +  - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
> > > +
> > > +description:
> > > +  The PL353 Static Memory Controller is a bus where you can connect two kinds
> > > +  of memory interfaces, which are NAND and memory mapped interfaces (such as
> > > +  SRAM or NOR).
> > > +
> > > +# We need a select here so we don't match all nodes with 'arm,primecell'
> > > +select:
> > > +  properties:
> > > +    compatible:
> > > +      contains:
> > > +        enum:
> > > +          - arm,pl353-smc-r2p1
> >
> > That's a const... but also I don't get the need for select.
>
> I think this is needed to ensure this binding is not enforced against
> arm,primecell compatible nodes which are not featuring the
> arm,pl353-smc-r2p1 compatible.
>
> >
> > > +  required:
> > > +    - compatible

Ah, required is there already. So only change is using 'const' for single entry.

> > > +
> > > +properties:
> > > +  $nodename:
> > > +    pattern: "^memory-controller@[0-9a-f]+$"
> > > +
> > > +  compatible:
> > > +    oneOf:
> > > +      - items:
> > > +          - enum:
> > > +              - arm,pl353-smc-r2p1
> > > +          - enum:
> > > +              - arm,primecell
> >
> > This looks unusual. Basically you change the bindings, because before
> > they required "arm,pl353-smc-r2p1", "arm,primecell".
>
> That is precisely what I try to match and I think it works. Perhaps
> this version is easier to extend when a new compatible comes in.
> However, I am fine using an alternative formula, like below if you
> think it's better:
>
> compatible:
>   items:
>     - const: arm,pl353-smc-r2p1
>     - const: arm,primecell

Yes, please.

> > Don't you want here items:
> >  - const: ...
> >  - const: ...
> > ?
> >
> > > +
> > > +  "#address-cells":
> > > +    const: 2
> > > +
> > > +  "#size-cells":
> > > +    const: 1
> > > +
> > > +  reg:
> > > +    items:
> > > +      - description: configuration registers for the host and sub-controllers
> >
> > Just maxItems. Description is obvious.
>
> I don't think it is that obvious because there are actually 4 areas
> and, because of the yaml language, we only describe one in the reg
> property while the others and defined in the ranges property, but
> that's fine by me, I'll drop the description and stick to a
> maxItems entry.

I think it is worthwhile to state what region this is AND the chip
select regions are in 'ranges'. Without the latter part, I agree it
seems like a genericish description.

> >
> > > +
> > > +  clocks:
> > > +    items:
> > > +      - description: the clock for the memory device bus
> > > +      - description: the main clock of the controller
> >
> > Isn't apb_pclk the bus clock (so second item below)?
>
> The SMC has two clock domains referred as aclk and mclk. In the TRM,
> aclk is described as "Clock for the AXI domain". The AXI interface is
> used to trigger CMD/ADDR/DATA cycles on the memory bus. There is also
> an APB interface used to reach the SMC registers. I *think* that
> both APB and AXI domains are fed by the same apb_pclk source but I
> might be wrong. Hence memclk would just feed the memory bus that bonds
> the memory device (eg. the NAND flash) to the host controller.
>
> This is my current understanding but if you think it works differently
> I'm all ears because this part is not 100% clear to me.
>
> > > +
> > > +  clock-names:
> > > +    items:
> > > +      - const: memclk
> > > +      - const: apb_pclk
> >
> >
> > > +
> > > +  ranges:
> > > +    minItems: 1
> > > +    maxItems: 3
> > > +    description: |
> > > +      Memory bus areas for interacting with the devices. Reflects
> > > +      the memory layout with four integer values following:
> > > +      <cs-number> 0 <offset> <size>
> > > +    items:
> > > +      - description: NAND bank 0
> > > +      - description: NOR/SRAM bank 0
> > > +      - description: NOR/SRAM bank 1
> > > +
> > > +  interrupts: true
> > > +
> > > +patternProperties:
> > > +  ".*@[0-9]+,[0-9]+$":
> >
> > Match with start ^. I think you cannot have 9 nodes and hex can appear
> > in address so maybe:
> > "^.*@[0-3],[a-f0-9]+$":
>
> I think Rob even now prefers to drop the ^.* prefix, but you're right on
> the two other points so I'll stick to:
>
>   "@[0-3],[a-f0-9]+$"

+1

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh+dt@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Richard Weinberger <richard@nod.at>,
	 Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	 MTD Maling List <linux-mtd@lists.infradead.org>,
	devicetree@vger.kernel.org,  Michal Simek <monstr@monstr.eu>,
	Naga Sureshkumar Relli <nagasure@xilinx.com>,
	 Amit Kumar Mahapatra <akumarma@xilinx.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	 linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	 "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Helmut Grohne <helmut.grohne@intenta.de>,
	 Srinivas Goud <sgoud@xilinx.com>,
	Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Subject: Re: [PATCH v22 09/18] dt-binding: memory: pl353-smc: Convert to yaml
Date: Wed, 9 Jun 2021 14:35:10 -0500	[thread overview]
Message-ID: <CAL_JsqJP2Thvehn-OfsYYdBOTqQTp_-HFoKAK6aT27JENDWWdA@mail.gmail.com> (raw)
In-Reply-To: <20210609153410.53eadf8e@xps13>

On Wed, Jun 9, 2021 at 8:34 AM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> Hi Krzysztof,
>
> Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote on Wed, 9
> Jun 2021 14:12:40 +0200:
>
> > On 09/06/2021 10:01, Miquel Raynal wrote:
> > > Convert this binding file to yaml schema.
> > >
> > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > ---
> > >  .../memory-controllers/arm,pl353-smc.yaml     | 133 ++++++++++++++++++
> > >  .../bindings/memory-controllers/pl353-smc.txt |  45 ------
> > >  2 files changed, 133 insertions(+), 45 deletions(-)
> > >  create mode 100644 Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > >  delete mode 100644 Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml b/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > > new file mode 100644
> > > index 000000000000..1de6f87d4986
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > > @@ -0,0 +1,133 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: ARM PL353 Static Memory Controller (SMC) device-tree bindings
> > > +
> > > +maintainers:
> > > +  - Miquel Raynal <miquel.raynal@bootlin.com>
> > > +  - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
> > > +
> > > +description:
> > > +  The PL353 Static Memory Controller is a bus where you can connect two kinds
> > > +  of memory interfaces, which are NAND and memory mapped interfaces (such as
> > > +  SRAM or NOR).
> > > +
> > > +# We need a select here so we don't match all nodes with 'arm,primecell'
> > > +select:
> > > +  properties:
> > > +    compatible:
> > > +      contains:
> > > +        enum:
> > > +          - arm,pl353-smc-r2p1
> >
> > That's a const... but also I don't get the need for select.
>
> I think this is needed to ensure this binding is not enforced against
> arm,primecell compatible nodes which are not featuring the
> arm,pl353-smc-r2p1 compatible.
>
> >
> > > +  required:
> > > +    - compatible

Ah, required is there already. So only change is using 'const' for single entry.

> > > +
> > > +properties:
> > > +  $nodename:
> > > +    pattern: "^memory-controller@[0-9a-f]+$"
> > > +
> > > +  compatible:
> > > +    oneOf:
> > > +      - items:
> > > +          - enum:
> > > +              - arm,pl353-smc-r2p1
> > > +          - enum:
> > > +              - arm,primecell
> >
> > This looks unusual. Basically you change the bindings, because before
> > they required "arm,pl353-smc-r2p1", "arm,primecell".
>
> That is precisely what I try to match and I think it works. Perhaps
> this version is easier to extend when a new compatible comes in.
> However, I am fine using an alternative formula, like below if you
> think it's better:
>
> compatible:
>   items:
>     - const: arm,pl353-smc-r2p1
>     - const: arm,primecell

Yes, please.

> > Don't you want here items:
> >  - const: ...
> >  - const: ...
> > ?
> >
> > > +
> > > +  "#address-cells":
> > > +    const: 2
> > > +
> > > +  "#size-cells":
> > > +    const: 1
> > > +
> > > +  reg:
> > > +    items:
> > > +      - description: configuration registers for the host and sub-controllers
> >
> > Just maxItems. Description is obvious.
>
> I don't think it is that obvious because there are actually 4 areas
> and, because of the yaml language, we only describe one in the reg
> property while the others and defined in the ranges property, but
> that's fine by me, I'll drop the description and stick to a
> maxItems entry.

I think it is worthwhile to state what region this is AND the chip
select regions are in 'ranges'. Without the latter part, I agree it
seems like a genericish description.

> >
> > > +
> > > +  clocks:
> > > +    items:
> > > +      - description: the clock for the memory device bus
> > > +      - description: the main clock of the controller
> >
> > Isn't apb_pclk the bus clock (so second item below)?
>
> The SMC has two clock domains referred as aclk and mclk. In the TRM,
> aclk is described as "Clock for the AXI domain". The AXI interface is
> used to trigger CMD/ADDR/DATA cycles on the memory bus. There is also
> an APB interface used to reach the SMC registers. I *think* that
> both APB and AXI domains are fed by the same apb_pclk source but I
> might be wrong. Hence memclk would just feed the memory bus that bonds
> the memory device (eg. the NAND flash) to the host controller.
>
> This is my current understanding but if you think it works differently
> I'm all ears because this part is not 100% clear to me.
>
> > > +
> > > +  clock-names:
> > > +    items:
> > > +      - const: memclk
> > > +      - const: apb_pclk
> >
> >
> > > +
> > > +  ranges:
> > > +    minItems: 1
> > > +    maxItems: 3
> > > +    description: |
> > > +      Memory bus areas for interacting with the devices. Reflects
> > > +      the memory layout with four integer values following:
> > > +      <cs-number> 0 <offset> <size>
> > > +    items:
> > > +      - description: NAND bank 0
> > > +      - description: NOR/SRAM bank 0
> > > +      - description: NOR/SRAM bank 1
> > > +
> > > +  interrupts: true
> > > +
> > > +patternProperties:
> > > +  ".*@[0-9]+,[0-9]+$":
> >
> > Match with start ^. I think you cannot have 9 nodes and hex can appear
> > in address so maybe:
> > "^.*@[0-3],[a-f0-9]+$":
>
> I think Rob even now prefers to drop the ^.* prefix, but you're right on
> the two other points so I'll stick to:
>
>   "@[0-3],[a-f0-9]+$"

+1

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh+dt@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Richard Weinberger <richard@nod.at>,
	 Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	 MTD Maling List <linux-mtd@lists.infradead.org>,
	devicetree@vger.kernel.org,  Michal Simek <monstr@monstr.eu>,
	Naga Sureshkumar Relli <nagasure@xilinx.com>,
	 Amit Kumar Mahapatra <akumarma@xilinx.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	 linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	 "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Helmut Grohne <helmut.grohne@intenta.de>,
	 Srinivas Goud <sgoud@xilinx.com>,
	Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Subject: Re: [PATCH v22 09/18] dt-binding: memory: pl353-smc: Convert to yaml
Date: Wed, 9 Jun 2021 14:35:10 -0500	[thread overview]
Message-ID: <CAL_JsqJP2Thvehn-OfsYYdBOTqQTp_-HFoKAK6aT27JENDWWdA@mail.gmail.com> (raw)
In-Reply-To: <20210609153410.53eadf8e@xps13>

On Wed, Jun 9, 2021 at 8:34 AM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> Hi Krzysztof,
>
> Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote on Wed, 9
> Jun 2021 14:12:40 +0200:
>
> > On 09/06/2021 10:01, Miquel Raynal wrote:
> > > Convert this binding file to yaml schema.
> > >
> > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > ---
> > >  .../memory-controllers/arm,pl353-smc.yaml     | 133 ++++++++++++++++++
> > >  .../bindings/memory-controllers/pl353-smc.txt |  45 ------
> > >  2 files changed, 133 insertions(+), 45 deletions(-)
> > >  create mode 100644 Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > >  delete mode 100644 Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml b/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > > new file mode 100644
> > > index 000000000000..1de6f87d4986
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml
> > > @@ -0,0 +1,133 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: ARM PL353 Static Memory Controller (SMC) device-tree bindings
> > > +
> > > +maintainers:
> > > +  - Miquel Raynal <miquel.raynal@bootlin.com>
> > > +  - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
> > > +
> > > +description:
> > > +  The PL353 Static Memory Controller is a bus where you can connect two kinds
> > > +  of memory interfaces, which are NAND and memory mapped interfaces (such as
> > > +  SRAM or NOR).
> > > +
> > > +# We need a select here so we don't match all nodes with 'arm,primecell'
> > > +select:
> > > +  properties:
> > > +    compatible:
> > > +      contains:
> > > +        enum:
> > > +          - arm,pl353-smc-r2p1
> >
> > That's a const... but also I don't get the need for select.
>
> I think this is needed to ensure this binding is not enforced against
> arm,primecell compatible nodes which are not featuring the
> arm,pl353-smc-r2p1 compatible.
>
> >
> > > +  required:
> > > +    - compatible

Ah, required is there already. So only change is using 'const' for single entry.

> > > +
> > > +properties:
> > > +  $nodename:
> > > +    pattern: "^memory-controller@[0-9a-f]+$"
> > > +
> > > +  compatible:
> > > +    oneOf:
> > > +      - items:
> > > +          - enum:
> > > +              - arm,pl353-smc-r2p1
> > > +          - enum:
> > > +              - arm,primecell
> >
> > This looks unusual. Basically you change the bindings, because before
> > they required "arm,pl353-smc-r2p1", "arm,primecell".
>
> That is precisely what I try to match and I think it works. Perhaps
> this version is easier to extend when a new compatible comes in.
> However, I am fine using an alternative formula, like below if you
> think it's better:
>
> compatible:
>   items:
>     - const: arm,pl353-smc-r2p1
>     - const: arm,primecell

Yes, please.

> > Don't you want here items:
> >  - const: ...
> >  - const: ...
> > ?
> >
> > > +
> > > +  "#address-cells":
> > > +    const: 2
> > > +
> > > +  "#size-cells":
> > > +    const: 1
> > > +
> > > +  reg:
> > > +    items:
> > > +      - description: configuration registers for the host and sub-controllers
> >
> > Just maxItems. Description is obvious.
>
> I don't think it is that obvious because there are actually 4 areas
> and, because of the yaml language, we only describe one in the reg
> property while the others and defined in the ranges property, but
> that's fine by me, I'll drop the description and stick to a
> maxItems entry.

I think it is worthwhile to state what region this is AND the chip
select regions are in 'ranges'. Without the latter part, I agree it
seems like a genericish description.

> >
> > > +
> > > +  clocks:
> > > +    items:
> > > +      - description: the clock for the memory device bus
> > > +      - description: the main clock of the controller
> >
> > Isn't apb_pclk the bus clock (so second item below)?
>
> The SMC has two clock domains referred as aclk and mclk. In the TRM,
> aclk is described as "Clock for the AXI domain". The AXI interface is
> used to trigger CMD/ADDR/DATA cycles on the memory bus. There is also
> an APB interface used to reach the SMC registers. I *think* that
> both APB and AXI domains are fed by the same apb_pclk source but I
> might be wrong. Hence memclk would just feed the memory bus that bonds
> the memory device (eg. the NAND flash) to the host controller.
>
> This is my current understanding but if you think it works differently
> I'm all ears because this part is not 100% clear to me.
>
> > > +
> > > +  clock-names:
> > > +    items:
> > > +      - const: memclk
> > > +      - const: apb_pclk
> >
> >
> > > +
> > > +  ranges:
> > > +    minItems: 1
> > > +    maxItems: 3
> > > +    description: |
> > > +      Memory bus areas for interacting with the devices. Reflects
> > > +      the memory layout with four integer values following:
> > > +      <cs-number> 0 <offset> <size>
> > > +    items:
> > > +      - description: NAND bank 0
> > > +      - description: NOR/SRAM bank 0
> > > +      - description: NOR/SRAM bank 1
> > > +
> > > +  interrupts: true
> > > +
> > > +patternProperties:
> > > +  ".*@[0-9]+,[0-9]+$":
> >
> > Match with start ^. I think you cannot have 9 nodes and hex can appear
> > in address so maybe:
> > "^.*@[0-3],[a-f0-9]+$":
>
> I think Rob even now prefers to drop the ^.* prefix, but you're right on
> the two other points so I'll stick to:
>
>   "@[0-3],[a-f0-9]+$"

+1

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  parent reply	other threads:[~2021-06-09 19:35 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-09  8:00 [PATCH v22 00/18] ARM Primecell PL35x support Miquel Raynal
2021-06-09  8:00 ` Miquel Raynal
2021-06-09  8:00 ` Miquel Raynal
2021-06-09  8:00 ` [PATCH v22 01/18] dt-binding: memory: pl353-smc: Rephrase the binding Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00 ` [PATCH v22 02/18] dt-binding: memory: pl353-smc: Document the range property Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00 ` [PATCH v22 03/18] dt-binding: memory: pl353-smc: Drop the partitioning section Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00 ` [PATCH v22 04/18] dt-binding: memory: pl353-smc: Describe the child reg property Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00 ` [PATCH v22 05/18] dt-binding: memory: pl353-smc: Fix the example syntax and style Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:00   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 06/18] dt-binding: memory: pl353-smc: Drop unsupported nodes from the example Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 07/18] dt-binding: memory: pl353-smc: Fix the NAND controller node in " Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 08/18] dt-binding: memory: pl353-smc: Enhance the description of the reg property Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 09/18] dt-binding: memory: pl353-smc: Convert to yaml Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09 12:12   ` Krzysztof Kozlowski
2021-06-09 12:12     ` Krzysztof Kozlowski
2021-06-09 12:12     ` Krzysztof Kozlowski
2021-06-09 13:34     ` Miquel Raynal
2021-06-09 13:34       ` Miquel Raynal
2021-06-09 13:34       ` Miquel Raynal
2021-06-09 13:54       ` Krzysztof Kozlowski
2021-06-09 13:54         ` Krzysztof Kozlowski
2021-06-09 13:54         ` Krzysztof Kozlowski
2021-06-09 14:11         ` Miquel Raynal
2021-06-09 14:11           ` Miquel Raynal
2021-06-09 14:11           ` Miquel Raynal
2021-06-09 15:26           ` Krzysztof Kozlowski
2021-06-09 15:26             ` Krzysztof Kozlowski
2021-06-09 15:26             ` Krzysztof Kozlowski
2021-06-09 19:26             ` Rob Herring
2021-06-09 19:26               ` Rob Herring
2021-06-09 19:26               ` Rob Herring
2021-06-09 19:35       ` Rob Herring [this message]
2021-06-09 19:35         ` Rob Herring
2021-06-09 19:35         ` Rob Herring
2021-06-09 16:16   ` Rob Herring
2021-06-09 16:16     ` Rob Herring
2021-06-09 16:16     ` Rob Herring
2021-06-09  8:01 ` [PATCH v22 10/18] memory: pl353-smc: Fix style Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 11/18] memory: pl353-smc: Rename goto labels Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 12/18] memory: pl353-smc: Let lower level controller drivers handle inits Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09 11:54   ` Krzysztof Kozlowski
2021-06-09 11:54     ` Krzysztof Kozlowski
2021-06-09 11:54     ` Krzysztof Kozlowski
2021-06-09 11:57     ` Miquel Raynal
2021-06-09 11:57       ` Miquel Raynal
2021-06-09 11:57       ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 13/18] memory: pl353-smc: Avoid useless acronyms in descriptions Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 14/18] memory: pl353-smc: Declare variables following a reverse christmas tree order Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01 ` [PATCH v22 15/18] MAINTAINERS: Add PL353 SMC entry Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09 13:23   ` Krzysztof Kozlowski
2021-06-09 13:23     ` Krzysztof Kozlowski
2021-06-09 13:23     ` Krzysztof Kozlowski
2021-06-09 13:41     ` Miquel Raynal
2021-06-09 13:41       ` Miquel Raynal
2021-06-09 13:41       ` Miquel Raynal
2021-06-10  7:04   ` Naga Sureshkumar Relli
2021-06-10  7:04     ` Naga Sureshkumar Relli
2021-06-10  7:04     ` Naga Sureshkumar Relli
2021-06-09  8:01 ` [PATCH v22 16/18] MAINTAINERS: Add PL353 NAND controller entry Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-10  7:05   ` Naga Sureshkumar Relli
2021-06-10  7:05     ` Naga Sureshkumar Relli
2021-06-10  7:05     ` Naga Sureshkumar Relli
2021-06-09  8:01 ` [PATCH v22 17/18] dt-bindings: mtd: pl353-nand: Describe this hardware controller Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09 12:01   ` Krzysztof Kozlowski
2021-06-09 12:01     ` Krzysztof Kozlowski
2021-06-09 12:01     ` Krzysztof Kozlowski
2021-06-09 13:36     ` Miquel Raynal
2021-06-09 13:36       ` Miquel Raynal
2021-06-09 13:36       ` Miquel Raynal
2021-06-09 13:57       ` Krzysztof Kozlowski
2021-06-09 13:57         ` Krzysztof Kozlowski
2021-06-09 13:57         ` Krzysztof Kozlowski
2021-06-10  2:32         ` Rob Herring
2021-06-10  2:32           ` Rob Herring
2021-06-10  2:32           ` Rob Herring
2021-06-09 16:16   ` Rob Herring
2021-06-09 16:16     ` Rob Herring
2021-06-09 16:16     ` Rob Herring
2021-06-09 19:36     ` Rob Herring
2021-06-09 19:36       ` Rob Herring
2021-06-09 19:36       ` Rob Herring
2021-06-09  8:01 ` [PATCH v22 18/18] mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal
2021-06-09  8:01   ` Miquel Raynal

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