* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. @ 2015-02-25 15:22 Guillaume GARDET 2015-02-28 7:59 ` Minkyu Kang 0 siblings, 1 reply; 11+ messages in thread From: Guillaume GARDET @ 2015-02-25 15:22 UTC (permalink / raw) To: u-boot Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow). Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> --- arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..7f47d4d 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL; - div = readl(&clk->div_top0); - sub_div = readl(&clk->div_top1); + sub_div = readl(&clk->div_top0); + div = readl(&clk->div_top1); break; default: debug("%s: invalid peripheral %d", __func__, peripheral); -- 1.8.4.5 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-02-25 15:22 [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C Guillaume GARDET @ 2015-02-28 7:59 ` Minkyu Kang 2015-03-10 8:52 ` Guillaume Gardet 0 siblings, 1 reply; 11+ messages in thread From: Minkyu Kang @ 2015-02-28 7:59 UTC (permalink / raw) To: u-boot Joonyoung, On 26/02/15 00:22, Guillaume GARDET wrote: > Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup > soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec > keyboard working again on Samsung Chromebook (snow). > > Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> > Cc: Akshay Saraswat <akshay.s@samsung.com> > Cc: Minkyu Kang <mk7.kang@samsung.com> > Cc: Joonyoung Shim <jy0922.shim@samsung.com> > > --- > arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c > index c6455c2..7f47d4d 100644 > --- a/arch/arm/cpu/armv7/exynos/clock.c > +++ b/arch/arm/cpu/armv7/exynos/clock.c > @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) > case PERIPH_ID_I2C6: > case PERIPH_ID_I2C7: > src = EXYNOS_SRC_MPLL; > - div = readl(&clk->div_top0); > - sub_div = readl(&clk->div_top1); > + sub_div = readl(&clk->div_top0); > + div = readl(&clk->div_top1); > break; > default: > debug("%s: invalid peripheral %d", __func__, peripheral); > Could you please check this patch? Thanks, Minkyu Kang. ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-02-28 7:59 ` Minkyu Kang @ 2015-03-10 8:52 ` Guillaume Gardet 2015-03-11 5:44 ` Joonyoung Shim 0 siblings, 1 reply; 11+ messages in thread From: Guillaume Gardet @ 2015-03-10 8:52 UTC (permalink / raw) To: u-boot Le 28/02/2015 08:59, Minkyu Kang a ?crit : > Joonyoung, > > On 26/02/15 00:22, Guillaume GARDET wrote: >> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup >> soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec >> keyboard working again on Samsung Chromebook (snow). >> >> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> >> Cc: Akshay Saraswat <akshay.s@samsung.com> >> Cc: Minkyu Kang <mk7.kang@samsung.com> >> Cc: Joonyoung Shim <jy0922.shim@samsung.com> >> >> --- >> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c >> index c6455c2..7f47d4d 100644 >> --- a/arch/arm/cpu/armv7/exynos/clock.c >> +++ b/arch/arm/cpu/armv7/exynos/clock.c >> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) >> case PERIPH_ID_I2C6: >> case PERIPH_ID_I2C7: >> src = EXYNOS_SRC_MPLL; >> - div = readl(&clk->div_top0); >> - sub_div = readl(&clk->div_top1); >> + sub_div = readl(&clk->div_top0); >> + div = readl(&clk->div_top1); >> break; >> default: >> debug("%s: invalid peripheral %d", __func__, peripheral); >> > Could you please check this patch? Ping. This patch must be applied before the release, otherwise, keyboard on Samsung Chromebook will no work at all. Guillaume > > Thanks, > Minkyu Kang. > ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-10 8:52 ` Guillaume Gardet @ 2015-03-11 5:44 ` Joonyoung Shim 2015-03-11 9:34 ` [U-Boot] [PATCH V2] " Guillaume GARDET 0 siblings, 1 reply; 11+ messages in thread From: Joonyoung Shim @ 2015-03-11 5:44 UTC (permalink / raw) To: u-boot Hi, On 03/10/2015 05:52 PM, Guillaume Gardet wrote: > > > Le 28/02/2015 08:59, Minkyu Kang a ?crit : >> Joonyoung, >> >> On 26/02/15 00:22, Guillaume GARDET wrote: >>> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup >>> soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec >>> keyboard working again on Samsung Chromebook (snow). >>> >>> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> >>> Cc: Akshay Saraswat <akshay.s@samsung.com> >>> Cc: Minkyu Kang <mk7.kang@samsung.com> >>> Cc: Joonyoung Shim <jy0922.shim@samsung.com> >>> >>> --- >>> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- >>> 1 file changed, 2 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c >>> index c6455c2..7f47d4d 100644 >>> --- a/arch/arm/cpu/armv7/exynos/clock.c >>> +++ b/arch/arm/cpu/armv7/exynos/clock.c >>> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) >>> case PERIPH_ID_I2C6: >>> case PERIPH_ID_I2C7: >>> src = EXYNOS_SRC_MPLL; >>> - div = readl(&clk->div_top0); >>> - sub_div = readl(&clk->div_top1); >>> + sub_div = readl(&clk->div_top0); >>> + div = readl(&clk->div_top1); Could you keep order of assign statements of div and sub_div variables? div = readl(&clk->div_top1); sub_div = readl(&clk->div_top0); Thanks. ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH V2] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-11 5:44 ` Joonyoung Shim @ 2015-03-11 9:34 ` Guillaume GARDET 2015-03-19 17:06 ` Guillaume Gardet 0 siblings, 1 reply; 11+ messages in thread From: Guillaume GARDET @ 2015-03-11 9:34 UTC (permalink / raw) To: u-boot Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow). Changes in V2: reorder lines as requested by Joonyoung Shim. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> --- arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL; - div = readl(&clk->div_top0); - sub_div = readl(&clk->div_top1); + div = readl(&clk->div_top1); + sub_div = readl(&clk->div_top0); break; default: debug("%s: invalid peripheral %d", __func__, peripheral); -- 1.8.4.5 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH V2] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-11 9:34 ` [U-Boot] [PATCH V2] " Guillaume GARDET @ 2015-03-19 17:06 ` Guillaume Gardet 2015-03-24 7:45 ` [U-Boot] [PATCH] " Minkyu Kang 2015-03-26 2:12 ` [U-Boot] [PATCH V2] " Simon Glass 0 siblings, 2 replies; 11+ messages in thread From: Guillaume Gardet @ 2015-03-19 17:06 UTC (permalink / raw) To: u-boot Ping. Guillaume Le 11/03/2015 10:34, Guillaume GARDET a ?crit : > Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup > soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec > keyboard working again on Samsung Chromebook (snow). > > Changes in V2: reorder lines as requested by Joonyoung Shim. > > Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> > Cc: Akshay Saraswat <akshay.s@samsung.com> > Cc: Minkyu Kang <mk7.kang@samsung.com> > Cc: Joonyoung Shim <jy0922.shim@samsung.com> > > --- > arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c > index c6455c2..2984867 100644 > --- a/arch/arm/cpu/armv7/exynos/clock.c > +++ b/arch/arm/cpu/armv7/exynos/clock.c > @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) > case PERIPH_ID_I2C6: > case PERIPH_ID_I2C7: > src = EXYNOS_SRC_MPLL; > - div = readl(&clk->div_top0); > - sub_div = readl(&clk->div_top1); > + div = readl(&clk->div_top1); > + sub_div = readl(&clk->div_top0); > break; > default: > debug("%s: invalid peripheral %d", __func__, peripheral); ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-19 17:06 ` Guillaume Gardet @ 2015-03-24 7:45 ` Minkyu Kang 2015-03-25 23:43 ` Simon Glass 2015-03-26 2:12 ` [U-Boot] [PATCH V2] " Simon Glass 1 sibling, 1 reply; 11+ messages in thread From: Minkyu Kang @ 2015-03-24 7:45 UTC (permalink / raw) To: u-boot hi, On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet at free.fr <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');>> wrote: > Ping. > > Guillaume > > > Le 11/03/2015 10:34, Guillaume GARDET a ?crit : > > Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup >> soc_get_periph_rate' introduced a bug in I2C config. This patch makes >> cros_ec >> keyboard working again on Samsung Chromebook (snow). >> >> Changes in V2: reorder lines as requested by Joonyoung Shim. >> >> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr >> <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');>> >> Cc: Akshay Saraswat <akshay.s@samsung.com >> <javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com');>> >> Cc: Minkyu Kang <mk7.kang@samsung.com >> <javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com');>> >> Cc: Joonyoung Shim <jy0922.shim@samsung.com >> <javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com');>> >> >> --- >> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c >> b/arch/arm/cpu/armv7/exynos/clock.c >> index c6455c2..2984867 100644 >> --- a/arch/arm/cpu/armv7/exynos/clock.c >> +++ b/arch/arm/cpu/armv7/exynos/clock.c >> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int >> peripheral) >> case PERIPH_ID_I2C6: >> case PERIPH_ID_I2C7: >> src = EXYNOS_SRC_MPLL; >> - div = readl(&clk->div_top0); >> - sub_div = readl(&clk->div_top1); >> + div = readl(&clk->div_top1); >> + sub_div = readl(&clk->div_top0); >> break; >> default: >> debug("%s: invalid peripheral %d", __func__, peripheral); >> > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > <javascript:_e(%7B%7D,'cvml','U-Boot@lists.denx.de');> > http://lists.denx.de/mailman/listinfo/u-boot > This patch will be merged at next week! Thanks, Minkyu Kang. -- from. prom. www.promsoft.net -- Thanks. Minkyu Kang. ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-24 7:45 ` [U-Boot] [PATCH] " Minkyu Kang @ 2015-03-25 23:43 ` Simon Glass 2015-03-31 9:07 ` Minkyu Kang 0 siblings, 1 reply; 11+ messages in thread From: Simon Glass @ 2015-03-25 23:43 UTC (permalink / raw) To: u-boot Hi Minkyu, On 24 March 2015 at 01:45, Minkyu Kang <promsoft@gmail.com> wrote: > hi, > > On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr > <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');>> wrote: > >> Ping. >> >> Guillaume >> >> >> Le 11/03/2015 10:34, Guillaume GARDET a ?crit : >> >> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup >>> soc_get_periph_rate' introduced a bug in I2C config. This patch makes >>> cros_ec >>> keyboard working again on Samsung Chromebook (snow). >>> >>> Changes in V2: reorder lines as requested by Joonyoung Shim. >>> >>> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr >>> <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');>> >>> Cc: Akshay Saraswat <akshay.s@samsung.com >>> <javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com');>> >>> Cc: Minkyu Kang <mk7.kang@samsung.com >>> <javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com');>> >>> Cc: Joonyoung Shim <jy0922.shim@samsung.com >>> <javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com');>> >>> >>> --- >>> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- >>> 1 file changed, 2 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm/cpu/armv7/exynos/clock.c >>> b/arch/arm/cpu/armv7/exynos/clock.c >>> index c6455c2..2984867 100644 >>> --- a/arch/arm/cpu/armv7/exynos/clock.c >>> +++ b/arch/arm/cpu/armv7/exynos/clock.c >>> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int >>> peripheral) >>> case PERIPH_ID_I2C6: >>> case PERIPH_ID_I2C7: >>> src = EXYNOS_SRC_MPLL; >>> - div = readl(&clk->div_top0); >>> - sub_div = readl(&clk->div_top1); >>> + div = readl(&clk->div_top1); >>> + sub_div = readl(&clk->div_top0); >>> break; >>> default: >>> debug("%s: invalid peripheral %d", __func__, peripheral); >>> >> >> _______________________________________________ >> U-Boot mailing list >> U-Boot at lists.denx.de >> <javascript:_e(%7B%7D,'cvml','U-Boot@lists.denx.de');> >> http://lists.denx.de/mailman/listinfo/u-boot >> > > This patch will be merged at next week! Great! Also where are we with the peach Pi display series? Can that go in also? Regards, Simon ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-25 23:43 ` Simon Glass @ 2015-03-31 9:07 ` Minkyu Kang 2015-04-06 6:30 ` Minkyu Kang 0 siblings, 1 reply; 11+ messages in thread From: Minkyu Kang @ 2015-03-31 9:07 UTC (permalink / raw) To: u-boot Hi, On Thursday, March 26, 2015, Simon Glass <sjg@chromium.org> wrote: > Hi Minkyu, > > On 24 March 2015 at 01:45, Minkyu Kang <promsoft@gmail.com <javascript:;>> > wrote: > > hi, > > > > On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr > <javascript:;> > > <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr <javascript:;>');>> > wrote: > > > >> Ping. > >> > >> Guillaume > >> > >> > >> Le 11/03/2015 10:34, Guillaume GARDET a ?crit : > >> > >> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup > >>> soc_get_periph_rate' introduced a bug in I2C config. This patch makes > >>> cros_ec > >>> keyboard working again on Samsung Chromebook (snow). > >>> > >>> Changes in V2: reorder lines as requested by Joonyoung Shim. > >>> > >>> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr > <javascript:;> > >>> <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr <javascript:;> > ');>> > >>> Cc: Akshay Saraswat <akshay.s@samsung.com <javascript:;> > >>> <javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com <javascript:;>');>> > >>> Cc: Minkyu Kang <mk7.kang@samsung.com <javascript:;> > >>> <javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com <javascript:;>');>> > >>> Cc: Joonyoung Shim <jy0922.shim@samsung.com <javascript:;> > >>> <javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com <javascript:;> > ');>> > >>> > >>> --- > >>> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- > >>> 1 file changed, 2 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/arch/arm/cpu/armv7/exynos/clock.c > >>> b/arch/arm/cpu/armv7/exynos/clock.c > >>> index c6455c2..2984867 100644 > >>> --- a/arch/arm/cpu/armv7/exynos/clock.c > >>> +++ b/arch/arm/cpu/armv7/exynos/clock.c > >>> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int > >>> peripheral) > >>> case PERIPH_ID_I2C6: > >>> case PERIPH_ID_I2C7: > >>> src = EXYNOS_SRC_MPLL; > >>> - div = readl(&clk->div_top0); > >>> - sub_div = readl(&clk->div_top1); > >>> + div = readl(&clk->div_top1); > >>> + sub_div = readl(&clk->div_top0); > >>> break; > >>> default: > >>> debug("%s: invalid peripheral %d", __func__, > peripheral); > >>> > >> > >> _______________________________________________ > >> U-Boot mailing list > >> U-Boot at lists.denx.de <javascript:;> > >> <javascript:_e(%7B%7D,'cvml','U-Boot@lists.denx.de <javascript:;>');> > >> http://lists.denx.de/mailman/listinfo/u-boot > >> > > > > This patch will be merged at next week! > > Great! Also where are we with the peach Pi display series? Can that go in > also? sure. I'll check it. > > Regards, > Simon > -- Thanks. Minkyu Kang. ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-31 9:07 ` Minkyu Kang @ 2015-04-06 6:30 ` Minkyu Kang 0 siblings, 0 replies; 11+ messages in thread From: Minkyu Kang @ 2015-04-06 6:30 UTC (permalink / raw) To: u-boot On 31/03/15 18:07, Minkyu Kang wrote: > Hi, > > On Thursday, March 26, 2015, Simon Glass <sjg@chromium.org> wrote: > >> Hi Minkyu, >> >> On 24 March 2015 at 01:45, Minkyu Kang <promsoft@gmail.com <javascript:;>> >> wrote: >>> hi, >>> >>> On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr >> <javascript:;> >>> <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr <javascript:;>');>> >> wrote: >>> >>>> Ping. >>>> >>>> Guillaume >>>> >>>> >>>> Le 11/03/2015 10:34, Guillaume GARDET a ?crit : >>>> >>>> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup >>>>> soc_get_periph_rate' introduced a bug in I2C config. This patch makes >>>>> cros_ec >>>>> keyboard working again on Samsung Chromebook (snow). >>>>> >>>>> Changes in V2: reorder lines as requested by Joonyoung Shim. >>>>> >>>>> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr >> <javascript:;> >>>>> <javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr <javascript:;> >> ');>> >>>>> Cc: Akshay Saraswat <akshay.s@samsung.com <javascript:;> >>>>> <javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com <javascript:;>');>> >>>>> Cc: Minkyu Kang <mk7.kang@samsung.com <javascript:;> >>>>> <javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com <javascript:;>');>> >>>>> Cc: Joonyoung Shim <jy0922.shim@samsung.com <javascript:;> >>>>> <javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com <javascript:;> >> ');>> >>>>> >>>>> --- >>>>> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- >>>>> 1 file changed, 2 insertions(+), 2 deletions(-) >>>>> applied to u-boot-samsung. Thanks, Minkyu Kang. ^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH V2] Exynos: Clock: Fix exynos5_get_periph_rate for I2C. 2015-03-19 17:06 ` Guillaume Gardet 2015-03-24 7:45 ` [U-Boot] [PATCH] " Minkyu Kang @ 2015-03-26 2:12 ` Simon Glass 1 sibling, 0 replies; 11+ messages in thread From: Simon Glass @ 2015-03-26 2:12 UTC (permalink / raw) To: u-boot On 19 March 2015 at 11:06, Guillaume Gardet <guillaume.gardet@free.fr> wrote: > Ping. > > Guillaume > > > Le 11/03/2015 10:34, Guillaume GARDET a ?crit : > >> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup >> soc_get_periph_rate' introduced a bug in I2C config. This patch makes >> cros_ec >> keyboard working again on Samsung Chromebook (snow). >> >> Changes in V2: reorder lines as requested by Joonyoung Shim. >> >> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> >> Cc: Akshay Saraswat <akshay.s@samsung.com> >> Cc: Minkyu Kang <mk7.kang@samsung.com> >> Cc: Joonyoung Shim <jy0922.shim@samsung.com> >> >> --- >> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c >> b/arch/arm/cpu/armv7/exynos/clock.c >> index c6455c2..2984867 100644 >> --- a/arch/arm/cpu/armv7/exynos/clock.c >> +++ b/arch/arm/cpu/armv7/exynos/clock.c >> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int >> peripheral) >> case PERIPH_ID_I2C6: >> case PERIPH_ID_I2C7: >> src = EXYNOS_SRC_MPLL; >> - div = readl(&clk->div_top0); >> - sub_div = readl(&clk->div_top1); >> + div = readl(&clk->div_top1); >> + sub_div = readl(&clk->div_top0); >> break; >> default: >> debug("%s: invalid peripheral %d", __func__, peripheral); Tested on snow. Reviewed-by: Simon Glass <sjg@chroimum.org> Tested-by: Simon Glass <sjg@chroimum.org> ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2015-04-06 6:30 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2015-02-25 15:22 [U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C Guillaume GARDET 2015-02-28 7:59 ` Minkyu Kang 2015-03-10 8:52 ` Guillaume Gardet 2015-03-11 5:44 ` Joonyoung Shim 2015-03-11 9:34 ` [U-Boot] [PATCH V2] " Guillaume GARDET 2015-03-19 17:06 ` Guillaume Gardet 2015-03-24 7:45 ` [U-Boot] [PATCH] " Minkyu Kang 2015-03-25 23:43 ` Simon Glass 2015-03-31 9:07 ` Minkyu Kang 2015-04-06 6:30 ` Minkyu Kang 2015-03-26 2:12 ` [U-Boot] [PATCH V2] " Simon Glass
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