Re: [PATCH 2/5] i2c: Add STM32F4 I2C driver

From: Maxime Coquelin <mcoquelin.stm32@gmail.com>
To: "M'boumba Cedric Madianga" <cedric.madianga@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>,
	Wolfram Sang <wsa@the-dreams.de>,
	Rob Herring <robh+dt@kernel.org>,
	Russell King <linux@arm.linux.org.uk>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	linux-i2c@vger.kernel.org
Subject: Re: [PATCH 2/5] i2c: Add STM32F4 I2C driver
Date: Wed, 1 Jun 2016 16:14:37 +0200	[thread overview]
Message-ID: <CALszF6ADLuZ0wK=L68FDzy5M5_eSPRTbNOjSoQw=dWDOjsPqCA@mail.gmail.com> (raw)
In-Reply-To: <CAOAejn1NQDJpGrTwGtpvSfVOGg3UuCkj8wLJ7B5LnW1-Z2VrQA@mail.gmail.com>

2016-06-01 16:01 GMT+02:00 M'boumba Cedric Madianga <cedric.madianga@gmail.com>:
> Hi Maxime,
>
>>>> +static void stm32f4_i2c_set_speed_mode(struct stm32f4_i2c_dev *i2c_dev)
>>>> +{
>>>> +       struct stm32f4_i2c_timings *t = &i2c_timings[i2c_dev->speed];
>>>> +       u32 ccr, val, clk_rate;
>>>> +
>>>> +       ccr = readl_relaxed(i2c_dev->base + STM32F4_I2C_CCR);
>>>> +       ccr &= ~(STM32F4_I2C_CCR_FS | STM32F4_I2C_CCR_DUTY |
>>>> +                STM32F4_I2C_CCR_CCR_MASK);
>>>> +
>>>> +       clk_rate = clk_get_rate(i2c_dev->clk);
>>>> +
>>>> +       switch (i2c_dev->speed) {
>>>> +       case STM32F4_I2C_SPEED_STANDARD:
>>>> +               val = clk_rate / t->rate * 2;
>>>> +               if (val < STM32F4_I2C_MIN_CCR)
>>>> +                       ccr |= STM32F4_I2C_CCR_CCR(STM32F4_I2C_MIN_CCR);
>>>> +               else
>>>> +                       ccr |= STM32F4_I2C_CCR_CCR(val);
>>>> +               break;
>>>> +       case STM32F4_I2C_SPEED_FAST:
>>>> +               ccr |= STM32F4_I2C_CCR_FS;
>>>> +               if (t->duty) {
>>>> +                       ccr |= STM32F4_I2C_CCR_DUTY;
>>>> +                       ccr |= STM32F4_I2C_CCR_CCR(clk_rate / t->rate * 25);
>>>> +               } else {
>>>> +                       ccr |= STM32F4_I2C_CCR_CCR(clk_rate / t->rate * 3);
>>>> +               }
>>> Is it really useful since duty seems to always be 0?
>> Agree, I will rework it by directly set duty at 0 in the register.
>
> Contrary to what I wrote previously, the duty has to be set for FAST
> Mode to reach 400khz.
> So, I am going to keep the timing struct and set duty to 1 for FAST mode

Ok, That's fine by me.