Re: [PATCH 1/2] KVM: LAPIC: write 0 to TMICT should also cancel vmx-preemption timer

[David Matlack <dmatlack@google.com>]

On Thu, Jun 3, 2021 at 5:33 PM Wanpeng Li <kernellwp@gmail.com> wrote:
>
> On Fri, 4 Jun 2021 at 07:02, David Matlack <dmatlack@google.com> wrote:
> >
> > On Thu, Jun 3, 2021 at 2:04 AM Wanpeng Li <kernellwp@gmail.com> wrote:
> > >
> > > From: Wanpeng Li <wanpengli@tencent.com>
> > >
> > > According to the SDM 10.5.4.1:
> > >
> > >   A write of 0 to the initial-count register effectively stops the local
> > >   APIC timer, in both one-shot and periodic mode.
> >
> > If KVM is not correctly emulating this behavior then could you also
> > add a kvm-unit-test to test for the correct behavior?
>
> A simple test here, the test will hang after the patch since it will
> not receive the spurious interrupt any more.

Thanks. Can you send this as a [PATCH]? I think it would be worthwhile
so have a regression test for this bug.
>
> diff --git a/x86/apic.c b/x86/apic.c
> index a7681fe..947d018 100644
> --- a/x86/apic.c
> +++ b/x86/apic.c
> @@ -488,6 +488,14 @@ static void test_apic_timer_one_shot(void)
>       */
>      report((lvtt_counter == 1) && (tsc2 - tsc1 >= interval),
>             "APIC LVT timer one shot");
> +
> +    lvtt_counter = 0;
> +    apic_write(APIC_TMICT, interval);
> +    apic_write(APIC_TMICT, 0);
> +    while (!lvtt_counter);
> +
> +    report((lvtt_counter == 1),
> +          "APIC LVT timer one shot spurious interrupt");
>  }