[PATCH i-g-t 1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'

[PATCH i-g-t 1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'

[Chris Wilson]

The intent of the test is to exercise that each channel in the engine[]
is an independent context/ring/timeline. It setups 64 channels pointing
to rcs0 and then submits one request to each in turn waiting on a
timeline that will force them to run out of submission order. They can
only run in fence order and not submission order if the timelines of
each channel are truly independent.

However, we released the fences en masse, and once the requests are
ready they are independent any may be executed in any order by the HW,
especially true with timeslicing that may reorder the requests on a
whim. So instead of releasing all requests at once, increment the
timeline step by step and check we get our results advancing. If the
requests can not be run in fence order and fall back to submission
order, we will time out waiting for our incremental results and trigger
a few GPU hangs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_engines.c | 39 +++++++++++++++++++++++++++---------
 1 file changed, 29 insertions(+), 10 deletions(-)

diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 8c66fb261..2e80d0f3e 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -405,6 +405,14 @@ static void execute_allforone(int i915)
 	gem_context_destroy(i915, param.ctx_id);
 }
 
+static uint32_t read_result(int timeline, uint32_t *map, int idx)
+{
+	sw_sync_timeline_inc(timeline, 1);
+	while (!READ_ONCE(map[idx]))
+		;
+	return map[idx];
+}
+
 static void independent(int i915)
 {
 #define RCS_TIMESTAMP (0x2000 + 0x358)
@@ -438,6 +446,12 @@ static void independent(int i915)
 	memset(&engines, 0, sizeof(engines)); /* All rcs0 */
 	gem_context_set_param(i915, &param);
 
+	gem_set_caching(i915, results.handle, I915_CACHING_CACHED);
+	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
+	gem_set_domain(i915, results.handle,
+		       I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+	memset(map, 0, 4096);
+
 	for (int i = 0; i < I915_EXEC_RING_MASK + 1; i++) {
 		struct drm_i915_gem_exec_object2 obj[2] = {
 			results, /* write hazard lies! */
@@ -472,21 +486,21 @@ static void independent(int i915)
 		gem_close(i915, obj[1].handle);
 		close(execbuf.rsvd2);
 	}
-	close(timeline);
-	gem_sync(i915, results.handle);
-
-	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
-	gem_set_domain(i915, results.handle, I915_GEM_DOMAIN_CPU, 0);
-	gem_close(i915, results.handle);
 
-	last = map[0];
+	last = read_result(timeline, map, 0);
 	for (int i = 1; i < I915_EXEC_RING_MASK + 1; i++) {
-		igt_assert_f((map[i] - last) > 0,
-			     "Engine instance [%d] executed too late\n", i);
-		last = map[i];
+		uint32_t t = read_result(timeline, map, i);
+		igt_assert_f(t - last > 0,
+			     "Engine instance [%d] executed too late, previous timestamp %08x, now %08x\n",
+			     i, last, t);
+		last = t;
 	}
 	munmap(map, 4096);
 
+	close(timeline);
+	gem_sync(i915, results.handle);
+	gem_close(i915, results.handle);
+
 	gem_context_destroy(i915, param.ctx_id);
 }
 
@@ -500,6 +514,8 @@ igt_main
 
 		gem_require_contexts(i915);
 		igt_require(has_context_engines(i915));
+
+		igt_fork_hang_detector(i915);
 	}
 
 	igt_subtest("invalid-engines")
@@ -519,4 +535,7 @@ igt_main
 
 	igt_subtest("independent")
 		independent(i915);
+
+	igt_fixture
+		igt_stop_hang_detector();
 }
-- 
2.22.0

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[igt-dev] [PATCH i-g-t 1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'

[Chris Wilson]

The intent of the test is to exercise that each channel in the engine[]
is an independent context/ring/timeline. It setups 64 channels pointing
to rcs0 and then submits one request to each in turn waiting on a
timeline that will force them to run out of submission order. They can
only run in fence order and not submission order if the timelines of
each channel are truly independent.

However, we released the fences en masse, and once the requests are
ready they are independent any may be executed in any order by the HW,
especially true with timeslicing that may reorder the requests on a
whim. So instead of releasing all requests at once, increment the
timeline step by step and check we get our results advancing. If the
requests can not be run in fence order and fall back to submission
order, we will time out waiting for our incremental results and trigger
a few GPU hangs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_engines.c | 39 +++++++++++++++++++++++++++---------
 1 file changed, 29 insertions(+), 10 deletions(-)

diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 8c66fb261..2e80d0f3e 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -405,6 +405,14 @@ static void execute_allforone(int i915)
 	gem_context_destroy(i915, param.ctx_id);
 }
 
+static uint32_t read_result(int timeline, uint32_t *map, int idx)
+{
+	sw_sync_timeline_inc(timeline, 1);
+	while (!READ_ONCE(map[idx]))
+		;
+	return map[idx];
+}
+
 static void independent(int i915)
 {
 #define RCS_TIMESTAMP (0x2000 + 0x358)
@@ -438,6 +446,12 @@ static void independent(int i915)
 	memset(&engines, 0, sizeof(engines)); /* All rcs0 */
 	gem_context_set_param(i915, &param);
 
+	gem_set_caching(i915, results.handle, I915_CACHING_CACHED);
+	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
+	gem_set_domain(i915, results.handle,
+		       I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+	memset(map, 0, 4096);
+
 	for (int i = 0; i < I915_EXEC_RING_MASK + 1; i++) {
 		struct drm_i915_gem_exec_object2 obj[2] = {
 			results, /* write hazard lies! */
@@ -472,21 +486,21 @@ static void independent(int i915)
 		gem_close(i915, obj[1].handle);
 		close(execbuf.rsvd2);
 	}
-	close(timeline);
-	gem_sync(i915, results.handle);
-
-	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
-	gem_set_domain(i915, results.handle, I915_GEM_DOMAIN_CPU, 0);
-	gem_close(i915, results.handle);
 
-	last = map[0];
+	last = read_result(timeline, map, 0);
 	for (int i = 1; i < I915_EXEC_RING_MASK + 1; i++) {
-		igt_assert_f((map[i] - last) > 0,
-			     "Engine instance [%d] executed too late\n", i);
-		last = map[i];
+		uint32_t t = read_result(timeline, map, i);
+		igt_assert_f(t - last > 0,
+			     "Engine instance [%d] executed too late, previous timestamp %08x, now %08x\n",
+			     i, last, t);
+		last = t;
 	}
 	munmap(map, 4096);
 
+	close(timeline);
+	gem_sync(i915, results.handle);
+	gem_close(i915, results.handle);
+
 	gem_context_destroy(i915, param.ctx_id);
 }
 
@@ -500,6 +514,8 @@ igt_main
 
 		gem_require_contexts(i915);
 		igt_require(has_context_engines(i915));
+
+		igt_fork_hang_detector(i915);
 	}
 
 	igt_subtest("invalid-engines")
@@ -519,4 +535,7 @@ igt_main
 
 	igt_subtest("independent")
 		independent(i915);
+
+	igt_fixture
+		igt_stop_hang_detector();
 }
-- 
2.22.0

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[PATCH i-g-t 2/2] i915/gem_ctx_shared: Avoid clflush by using WC for readback

[Chris Wilson]

As we never officially write to the scratch buffer, the kernel will
leave it in the CPU read domain upon execution. Our attempt to
invalidate the CPU cache on !llc is therefore skipped as the kernel
doesn't believe the backing store has been invalidated. Use a WC mmap to
avoid the CPU cache for readback, and add an extra sanity check that the
scratch buffer is found at the same location after execution. (This
sanity check does not affect the failure rate on bsw, that is only fixed
after realising that we do not clflush for the invalidate prior to the
read).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111187
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_shared.c | 49 ++++++++++++++++++++++---------------
 1 file changed, 29 insertions(+), 20 deletions(-)

diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 4b1020b96..b073bdfc9 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -192,7 +192,8 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 		.flags = ring,
 	};
 	uint32_t scratch, *s;
-	uint32_t batch[16];
+	uint32_t batch, cs[16];
+	uint64_t offset;
 	int i;
 
 	gem_require_ring(i915, ring);
@@ -207,54 +208,62 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	obj.flags |= EXEC_OBJECT_PINNED; /* reuse this address */
 
 	scratch = gem_create(i915, 4096);
-	s = gem_mmap__cpu(i915, scratch, 0, 4096, PROT_WRITE);
+	s = gem_mmap__wc(i915, scratch, 0, 4096, PROT_WRITE);
 
-	gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
-	*s = bbe;
+	gem_set_domain(i915, scratch, I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC);
+	s[0] = bbe;
+	s[64] = bbe;
 
 	/* Load object into place in the GTT */
 	obj.handle = scratch;
 	gem_execbuf(i915, &execbuf);
+	offset = obj.offset;
 
 	/* Presume nothing causes an eviction in the meantime! */
 
-	obj.handle = gem_create(i915, 4096);
+	batch = gem_create(i915, 4096);
 
 	i = 0;
-	batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+	cs[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
 	if (gen >= 8) {
-		batch[++i] = obj.offset;
-		batch[++i] = 0;
+		cs[++i] = obj.offset;
+		cs[++i] = obj.offset >> 32;
 	} else if (gen >= 4) {
-		batch[++i] = 0;
-		batch[++i] = obj.offset;
+		cs[++i] = 0;
+		cs[++i] = obj.offset;
 	} else {
-		batch[i]--;
-		batch[++i] = obj.offset;
+		cs[i]--;
+		cs[++i] = obj.offset;
 	}
-	batch[++i] = 0xc0ffee;
-	batch[++i] = bbe;
-	gem_write(i915, obj.handle, 0, batch, sizeof(batch));
+	cs[++i] = 0xc0ffee;
+	cs[++i] = bbe;
+	gem_write(i915, batch, 0, cs, sizeof(cs));
 
+	obj.handle = batch;
 	obj.offset += 8192; /* make sure we don't cause an eviction! */
 	execbuf.rsvd1 = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
 	if (gen > 3 && gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
+	gem_execbuf(i915, &execbuf);
 
+	/* Check the scratch didn't move */
+	obj.handle = scratch;
+	obj.offset = -1;
+	obj.flags &= ~EXEC_OBJECT_PINNED;
+	execbuf.batch_start_offset = 64 * sizeof(s[0]);
 	gem_execbuf(i915, &execbuf);
+	igt_assert_eq_u64(obj.offset, offset);
 	gem_context_destroy(i915, execbuf.rsvd1);
-	gem_sync(i915, obj.handle); /* write hazard lies */
-	gem_close(i915, obj.handle);
+
+	gem_sync(i915, batch); /* write hazard lies */
+	gem_close(i915, batch);
 
 	/*
 	 * If we created the new context with the old GTT, the write
 	 * into the stale location of scratch will have landed in the right
 	 * object. Otherwise, it should read the previous value of
 	 * MI_BATCH_BUFFER_END.
-	 *
-	 * Setting .write = CPU to paper over our write hazard lies above.
 	 */
-	gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
 	igt_assert_eq_u32(*s, 0xc0ffee);
 
 	munmap(s, 4096);
-- 
2.22.0

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[igt-dev] [PATCH i-g-t 2/2] i915/gem_ctx_shared: Avoid clflush by using WC for readback

[Chris Wilson]

As we never officially write to the scratch buffer, the kernel will
leave it in the CPU read domain upon execution. Our attempt to
invalidate the CPU cache on !llc is therefore skipped as the kernel
doesn't believe the backing store has been invalidated. Use a WC mmap to
avoid the CPU cache for readback, and add an extra sanity check that the
scratch buffer is found at the same location after execution. (This
sanity check does not affect the failure rate on bsw, that is only fixed
after realising that we do not clflush for the invalidate prior to the
read).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111187
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_shared.c | 49 ++++++++++++++++++++++---------------
 1 file changed, 29 insertions(+), 20 deletions(-)

diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 4b1020b96..b073bdfc9 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -192,7 +192,8 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 		.flags = ring,
 	};
 	uint32_t scratch, *s;
-	uint32_t batch[16];
+	uint32_t batch, cs[16];
+	uint64_t offset;
 	int i;
 
 	gem_require_ring(i915, ring);
@@ -207,54 +208,62 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	obj.flags |= EXEC_OBJECT_PINNED; /* reuse this address */
 
 	scratch = gem_create(i915, 4096);
-	s = gem_mmap__cpu(i915, scratch, 0, 4096, PROT_WRITE);
+	s = gem_mmap__wc(i915, scratch, 0, 4096, PROT_WRITE);
 
-	gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
-	*s = bbe;
+	gem_set_domain(i915, scratch, I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC);
+	s[0] = bbe;
+	s[64] = bbe;
 
 	/* Load object into place in the GTT */
 	obj.handle = scratch;
 	gem_execbuf(i915, &execbuf);
+	offset = obj.offset;
 
 	/* Presume nothing causes an eviction in the meantime! */
 
-	obj.handle = gem_create(i915, 4096);
+	batch = gem_create(i915, 4096);
 
 	i = 0;
-	batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+	cs[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
 	if (gen >= 8) {
-		batch[++i] = obj.offset;
-		batch[++i] = 0;
+		cs[++i] = obj.offset;
+		cs[++i] = obj.offset >> 32;
 	} else if (gen >= 4) {
-		batch[++i] = 0;
-		batch[++i] = obj.offset;
+		cs[++i] = 0;
+		cs[++i] = obj.offset;
 	} else {
-		batch[i]--;
-		batch[++i] = obj.offset;
+		cs[i]--;
+		cs[++i] = obj.offset;
 	}
-	batch[++i] = 0xc0ffee;
-	batch[++i] = bbe;
-	gem_write(i915, obj.handle, 0, batch, sizeof(batch));
+	cs[++i] = 0xc0ffee;
+	cs[++i] = bbe;
+	gem_write(i915, batch, 0, cs, sizeof(cs));
 
+	obj.handle = batch;
 	obj.offset += 8192; /* make sure we don't cause an eviction! */
 	execbuf.rsvd1 = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
 	if (gen > 3 && gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
+	gem_execbuf(i915, &execbuf);
 
+	/* Check the scratch didn't move */
+	obj.handle = scratch;
+	obj.offset = -1;
+	obj.flags &= ~EXEC_OBJECT_PINNED;
+	execbuf.batch_start_offset = 64 * sizeof(s[0]);
 	gem_execbuf(i915, &execbuf);
+	igt_assert_eq_u64(obj.offset, offset);
 	gem_context_destroy(i915, execbuf.rsvd1);
-	gem_sync(i915, obj.handle); /* write hazard lies */
-	gem_close(i915, obj.handle);
+
+	gem_sync(i915, batch); /* write hazard lies */
+	gem_close(i915, batch);
 
 	/*
 	 * If we created the new context with the old GTT, the write
 	 * into the stale location of scratch will have landed in the right
 	 * object. Otherwise, it should read the previous value of
 	 * MI_BATCH_BUFFER_END.
-	 *
-	 * Setting .write = CPU to paper over our write hazard lies above.
 	 */
-	gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
 	igt_assert_eq_u32(*s, 0xc0ffee);
 
 	munmap(s, 4096);
-- 
2.22.0

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[igt-dev] ✗ GitLab.Pipeline: warning for series starting with [i-g-t,1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'
URL   : https://patchwork.freedesktop.org/series/64106/
State : warning

== Summary ==

Pipeline status: FAILED.

See https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/50698 for more details.

== Logs ==

For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/50698
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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'
URL   : https://patchwork.freedesktop.org/series/64106/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6542 -> IGTPW_3288
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/64106/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3288 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-write:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-icl-u3/igt@gem_mmap_gtt@basic-write.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-icl-u3/igt@gem_mmap_gtt@basic-write.html

  * igt@i915_selftest@live_execlists:
    - fi-bwr-2160:        [PASS][3] -> [DMESG-WARN][4] ([fdo#111115])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-bwr-2160/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-bwr-2160/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_hangcheck:
    - fi-bwr-2160:        [PASS][5] -> [DMESG-FAIL][6] ([fdo#111115])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-bwr-2160/igt@i915_selftest@live_hangcheck.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-bwr-2160/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-7567u:       [PASS][7] -> [WARN][8] ([fdo#109380])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [PASS][9] -> [WARN][10] ([fdo#111156])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-c:
    - fi-kbl-7567u:       [PASS][11] -> [SKIP][12] ([fdo#109271]) +23 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [INCOMPLETE][13] ([fdo#107718]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-icl-u3:          [DMESG-WARN][15] ([fdo#107724]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_mmap_gtt@basic-wc:
    - fi-bsw-kefka:       [FAIL][17] ([fdo#107307]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-bsw-kefka/igt@gem_mmap_gtt@basic-wc.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-bsw-kefka/igt@gem_mmap_gtt@basic-wc.html

  * igt@kms_busy@basic-flip-a:
    - fi-kbl-7567u:       [SKIP][19] ([fdo#109271] / [fdo#109278]) -> [PASS][20] +2 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][21] ([fdo#109485]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          [FAIL][23] ([fdo#103167]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
    - {fi-icl-u4}:        [FAIL][25] ([fdo#103167]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-icl-u4/igt@kms_frontbuffer_tracking@basic.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-icl-u4/igt@kms_frontbuffer_tracking@basic.html
    - fi-icl-u2:          [FAIL][27] ([fdo#103167]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107307]: https://bugs.freedesktop.org/show_bug.cgi?id=107307
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
  [fdo#111115]: https://bugs.freedesktop.org/show_bug.cgi?id=111115
  [fdo#111156]: https://bugs.freedesktop.org/show_bug.cgi?id=111156


Participating hosts (56 -> 46)
------------------------------

  Missing    (10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-y fi-icl-guc fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5109 -> IGTPW_3288

  CI-20190529: 20190529
  CI_DRM_6542: fc842129bc523f9a6725dbe4844e0a3f698b76ee @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3288: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/
  IGT_5109: e5fd509e16ec649436be31f38eaa5b85cb7f72f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] i915/gem_ctx_engine: Drip feed requests into 'independent'
URL   : https://patchwork.freedesktop.org/series/64106/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6542_full -> IGTPW_3288_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/64106/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3288_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_eio@in-flight-suspend:
    - shard-kbl:          [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +6 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-kbl6/igt@gem_eio@in-flight-suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-kbl3/igt@gem_eio@in-flight-suspend.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_flip@dpms-vs-vblank-race-interruptible:
    - shard-glk:          [PASS][5] -> [FAIL][6] ([fdo#103060])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-glk9/igt@kms_flip@dpms-vs-vblank-race-interruptible.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-glk6/igt@kms_flip@dpms-vs-vblank-race-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
    - shard-iclb:         [PASS][7] -> [FAIL][8] ([fdo#103167]) +7 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#109441]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][11] -> [FAIL][12] ([fdo#99912])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-apl4/igt@kms_setmode@basic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-apl3/igt@kms_setmode@basic.html
    - shard-kbl:          [PASS][13] -> [FAIL][14] ([fdo#99912])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-kbl1/igt@kms_setmode@basic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-kbl6/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [DMESG-WARN][15] ([fdo#108566]) -> [PASS][16] +3 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd2:
    - shard-kbl:          [FAIL][17] ([fdo#110946]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-kbl2/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd2.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-kbl3/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd2.html

  * igt@gem_workarounds@suspend-resume:
    - shard-apl:          [DMESG-WARN][19] ([fdo#108566]) -> [PASS][20] +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-apl3/igt@gem_workarounds@suspend-resume.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-apl3/igt@gem_workarounds@suspend-resume.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          [SKIP][21] ([fdo#109271]) -> [PASS][22] +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-kbl6/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-kbl6/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rpm@gem-evict-pwrite:
    - shard-iclb:         [INCOMPLETE][23] ([fdo#107713] / [fdo#108840]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-iclb7/igt@i915_pm_rpm@gem-evict-pwrite.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-iclb7/igt@i915_pm_rpm@gem-evict-pwrite.html

  * igt@i915_pm_rpm@i2c:
    - shard-hsw:          [FAIL][25] ([fdo#104097]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-hsw4/igt@i915_pm_rpm@i2c.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-hsw5/igt@i915_pm_rpm@i2c.html

  * igt@i915_suspend@debugfs-reader:
    - shard-iclb:         [INCOMPLETE][27] ([fdo#107713]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-iclb3/igt@i915_suspend@debugfs-reader.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-iclb3/igt@i915_suspend@debugfs-reader.html

  * igt@kms_color@pipe-c-ctm-blue-to-red:
    - shard-kbl:          [FAIL][29] ([fdo#107201]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-kbl1/igt@kms_color@pipe-c-ctm-blue-to-red.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-kbl4/igt@kms_color@pipe-c-ctm-blue-to-red.html
    - shard-apl:          [FAIL][31] ([fdo#107201]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-apl5/igt@kms_color@pipe-c-ctm-blue-to-red.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-apl8/igt@kms_color@pipe-c-ctm-blue-to-red.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding:
    - shard-apl:          [FAIL][33] ([fdo#103232]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-apl7/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html
    - shard-kbl:          [FAIL][35] ([fdo#103232]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-kbl2/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [FAIL][37] ([fdo#105767]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-iclb:         [FAIL][39] ([fdo#103167]) -> [PASS][40] +7 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_plane@plane-position-hole-dpms-pipe-b-planes:
    - shard-glk:          [DMESG-WARN][41] -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-glk2/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-glk2/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][43] ([fdo#109441]) -> [PASS][44] +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-iclb6/igt@kms_psr@psr2_cursor_render.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  
#### Warnings ####

  * igt@kms_busy@extended-pageflip-hang-oldfb-render-d:
    - shard-iclb:         [INCOMPLETE][45] ([fdo#107713]) -> [SKIP][46] ([fdo#109278])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6542/shard-iclb1/igt@kms_busy@extended-pageflip-hang-oldfb-render-d.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/shard-iclb1/igt@kms_busy@extended-pageflip-hang-oldfb-render-d.html

  
  [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#104097]: https://bugs.freedesktop.org/show_bug.cgi?id=104097
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110946]: https://bugs.freedesktop.org/show_bug.cgi?id=110946
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (9 -> 6)
------------------------------

  Missing    (3): pig-skl-6260u shard-skl pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5109 -> IGTPW_3288
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_6542: fc842129bc523f9a6725dbe4844e0a3f698b76ee @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3288: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/
  IGT_5109: e5fd509e16ec649436be31f38eaa5b85cb7f72f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3288/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH i-g-t 2/2] i915/gem_ctx_shared: Avoid clflush by using WC for readback

[Matthew Auld]

On Tue, 23 Jul 2019 at 17:17, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> As we never officially write to the scratch buffer, the kernel will
> leave it in the CPU read domain upon execution. Our attempt to
> invalidate the CPU cache on !llc is therefore skipped as the kernel
> doesn't believe the backing store has been invalidated. Use a WC mmap to
> avoid the CPU cache for readback, and add an extra sanity check that the
> scratch buffer is found at the same location after execution. (This
> sanity check does not affect the failure rate on bsw, that is only fixed
> after realising that we do not clflush for the invalidate prior to the
> read).
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111187
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [igt-dev] [PATCH i-g-t 2/2] i915/gem_ctx_shared: Avoid clflush by using WC for readback

[Matthew Auld]

On Tue, 23 Jul 2019 at 17:17, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> As we never officially write to the scratch buffer, the kernel will
> leave it in the CPU read domain upon execution. Our attempt to
> invalidate the CPU cache on !llc is therefore skipped as the kernel
> doesn't believe the backing store has been invalidated. Use a WC mmap to
> avoid the CPU cache for readback, and add an extra sanity check that the
> scratch buffer is found at the same location after execution. (This
> sanity check does not affect the failure rate on bsw, that is only fixed
> after realising that we do not clflush for the invalidate prior to the
> read).
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111187
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev