All of lore.kernel.org
 help / color / mirror / Atom feed
From: Matthew Auld <matthew.william.auld@gmail.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
	Matthew Auld <matthew.auld@intel.com>
Subject: Re: [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE
Date: Fri, 26 Oct 2018 20:27:46 +0100	[thread overview]
Message-ID: <CAM0jSHNi-jKqQgz9-+XMv0PkFedOMAmM3SEQ2sKOpkyTdSNF7w@mail.gmail.com> (raw)
In-Reply-To: <20181026145811.24638-1-chris@chris-wilson.co.uk>

On Fri, 26 Oct 2018 at 16:16, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> For example, we may want to split a 2MiB large page into multiple 64KiB
> PTEs. To do so, we want to allow a vma that only has the 2MiB flag set
> to utilise the 64KiB as required, i.e. we want to include all larger
> pages as well.

I thought if we have vma that only has the 2M flag, that can only mean
that 64K is not supported by the platform?

>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c         |  4 ++--
>  drivers/gpu/drm/i915/selftests/huge_pages.c | 17 +++++++++++------
>  2 files changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 19b2d991b5d8..9e1756216ada 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1074,7 +1074,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
>                 gen8_pte_t *vaddr;
>                 u16 index, max;
>
> -               if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
> +               if (vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_2M &&
>                     IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
>                     rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
>                         index = idx.pde;
> @@ -1092,7 +1092,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
>                         page_size = I915_GTT_PAGE_SIZE;
>
>                         if (!index &&
> -                           vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K &&
> +                           vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_64K &&

Yeah, so here what if the platform doesn't support 64K pages, but does
support say 2M, and the object is 2M + 64K or perhaps it's 2M but
somehow only aligned to 64K? I think we exercise something like that
for the mock device, or at least I hope we do.

>                             IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) &&
>                             (IS_ALIGNED(rem, I915_GTT_PAGE_SIZE_64K) ||
>                              rem >= (max - index) * I915_GTT_PAGE_SIZE))
> diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
> index 256001b00e32..2d66f380ad9a 100644
> --- a/drivers/gpu/drm/i915/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
> @@ -508,6 +508,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>                         goto out_unpin;
>                 }
>
> +               GEM_BUG_ON(vma->page_sizes.gtt);
>                 err = i915_vma_pin(vma, 0, 0, flags);
>                 if (err) {
>                         i915_vma_close(vma);
> @@ -517,8 +518,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>
>                 err = igt_check_page_sizes(vma);
>
> -               if (vma->page_sizes.gtt != page_size) {
> -                       pr_err("page_sizes.gtt=%u, expected %u\n",
> +               if (!(vma->page_sizes.gtt & -page_size)) {
> +                       pr_err("%s:%d page_sizes.gtt=%u, expected %u\n",
> +                              __func__, __LINE__,
>                                vma->page_sizes.gtt, page_size);
>                         err = -EINVAL;
>                 }
> @@ -542,6 +544,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>                                 goto out_unpin;
>                         }
>
> +                       GEM_BUG_ON(vma->page_sizes.gtt);
>                         err = i915_vma_pin(vma, 0, 0, flags | offset);
>                         if (err) {
>                                 i915_vma_close(vma);
> @@ -550,8 +553,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>
>                         err = igt_check_page_sizes(vma);
>
> -                       if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) {
> -                               pr_err("page_sizes.gtt=%u, expected %llu\n",
> +                       if (!(vma->page_sizes.gtt & -I915_GTT_PAGE_SIZE_4K)) {
> +                               pr_err("%s:%d page_sizes.gtt=%u, expected %llu\n",
> +                                               __func__, __LINE__,
>                                        vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K);
>                                 err = -EINVAL;
>                         }
> @@ -1471,7 +1475,7 @@ static int igt_ppgtt_pin_update(void *arg)
>                 if (err)
>                         goto out_unpin;
>
> -               if (vma->page_sizes.gtt != page_size) {
> +               if (!(vma->page_sizes.gtt & -page_size)) {
>                         dma_addr_t addr = i915_gem_object_get_dma_address(obj, 0);
>
>                         /*
> @@ -1481,7 +1485,8 @@ static int igt_ppgtt_pin_update(void *arg)
>                          * address.
>                          */
>                         if (IS_ALIGNED(addr, page_size)) {
> -                               pr_err("page_sizes.gtt=%u, expected=%u\n",
> +                               pr_err("%s:%d page_sizes.gtt=%u, expected=%u\n",
> +                                               __func__, __LINE__,
>                                        vma->page_sizes.gtt, page_size);
>                                 err = -EINVAL;
>                         } else {
> --
> 2.19.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-10-26 19:28 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-26 12:04 [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE Chris Wilson
2018-10-26 13:04 ` ✗ Fi.CI.BAT: failure for " Patchwork
2018-10-26 14:58 ` [PATCH] " Chris Wilson
2018-10-26 19:27   ` Matthew Auld [this message]
2018-10-26 19:48     ` Chris Wilson
2018-10-26 15:44 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2) Patchwork
2018-10-26 16:13 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-26 22:52 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAM0jSHNi-jKqQgz9-+XMv0PkFedOMAmM3SEQ2sKOpkyTdSNF7w@mail.gmail.com \
    --to=matthew.william.auld@gmail.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.auld@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.