* [Intel-gfx] [PATCH v5 0/2] DGFX mmap with rpm
@ 2022-09-13 15:27 Anshuman Gupta
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Anshuman Gupta @ 2022-09-13 15:27 UTC (permalink / raw)
To: intel-gfx; +Cc: chris, rodrigo.vivi
As per PCIe Spec Section 5.3.1.4.1
When pcie function is in d3hot state,
Configuration and Message requests are the only TLPs accepted by a
Function in the D3hot state. All other received Requests must be
handled as Unsupported Requests, and all received Completions
may optionally be handled as Unexpected Completions.
Therefore when gfx endpoint function is in d3 state, all pcie iomem
transaction requires to transition the pcie function in D0 state.
Implementation of handling i915_gem_object_pin_map will be handled in
different series.
Anshuman Gupta (2):
drm/i915: Refactor userfault_wakeref to re-use
drm/i915/dgfx: Release mmap on rpm suspend
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 23 +++++++++++-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 36 +++++++++++++++++--
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 -
drivers/gpu/drm/i915/gt/intel_gt.c | 3 ++
drivers/gpu/drm/i915/gt/intel_gt_types.h | 17 +++++++++
drivers/gpu/drm/i915/gt/intel_gtt.h | 3 --
drivers/gpu/drm/i915/i915_gem.c | 6 +++-
11 files changed, 86 insertions(+), 11 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v5 1/2] drm/i915: Refactor userfault_wakeref to re-use
2022-09-13 15:27 [Intel-gfx] [PATCH v5 0/2] DGFX mmap with rpm Anshuman Gupta
@ 2022-09-13 15:27 ` Anshuman Gupta
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
` (3 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Anshuman Gupta @ 2022-09-13 15:27 UTC (permalink / raw)
To: intel-gfx; +Cc: chris, rodrigo.vivi
Refactor userfault_wakeref to re-use for discrete lmem mmap mapping
as well, as on discrete GTT mmap are not supported. Moving
userfault_wakeref from ggtt to gt structure.
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 -
drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
drivers/gpu/drm/i915/gt/intel_gtt.h | 3 ---
drivers/gpu/drm/i915/i915_gem.c | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 3218981488cc..b55befda3387 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -413,7 +413,7 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
vma->mmo = mmo;
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
- intel_wakeref_auto(&to_gt(i915)->ggtt->userfault_wakeref,
+ intel_wakeref_auto(&to_gt(i915)->userfault_wakeref,
msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
if (write) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 00359ec9d58b..3428f735e786 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -24,7 +24,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
{
GEM_TRACE("%s\n", dev_name(i915->drm.dev));
- intel_wakeref_auto(&to_gt(i915)->ggtt->userfault_wakeref, 0);
+ intel_wakeref_auto(&to_gt(i915)->userfault_wakeref, 0);
flush_workqueue(i915->wq);
/*
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index cf4a326f5f48..ea775e601686 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -842,7 +842,6 @@ void intel_ggtt_init_fences(struct i915_ggtt *ggtt)
INIT_LIST_HEAD(&ggtt->fence_list);
INIT_LIST_HEAD(&ggtt->userfault_list);
- intel_wakeref_auto_init(&ggtt->userfault_wakeref, uncore->rpm);
detect_bit_6_swizzle(ggtt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index b59fb03ed274..07300b0a0873 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -805,6 +805,7 @@ static int intel_gt_tile_setup(struct intel_gt *gt, phys_addr_t phys_addr)
}
intel_uncore_init_early(gt->uncore, gt);
+ intel_wakeref_auto_init(>->userfault_wakeref, gt->uncore->rpm);
ret = intel_uncore_setup_mmio(gt->uncore, phys_addr);
if (ret)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 184ee9b11a4d..0757d9577551 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -156,6 +156,9 @@ struct intel_gt {
*/
intel_wakeref_t awake;
+ /* Manual runtime pm autosuspend delay for user GGTT/lmem mmaps */
+ struct intel_wakeref_auto userfault_wakeref;
+
u32 clock_frequency;
u32 clock_period_ns;
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index e639434e97fd..c0ca53cba9f0 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -386,9 +386,6 @@ struct i915_ggtt {
*/
struct list_head userfault_list;
- /* Manual runtime pm autosuspend delay for user GGTT mmaps */
- struct intel_wakeref_auto userfault_wakeref;
-
struct mutex error_mutex;
struct drm_mm_node error_capture;
struct drm_mm_node uc_fw;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index bae857d5221d..3463dd795950 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1209,7 +1209,7 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
{
- intel_wakeref_auto_fini(&to_gt(dev_priv)->ggtt->userfault_wakeref);
+ intel_wakeref_auto_fini(&to_gt(dev_priv)->userfault_wakeref);
i915_gem_suspend_late(dev_priv);
intel_gt_driver_remove(to_gt(dev_priv));
--
2.26.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-13 15:27 [Intel-gfx] [PATCH v5 0/2] DGFX mmap with rpm Anshuman Gupta
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
@ 2022-09-13 15:27 ` Anshuman Gupta
2022-09-20 14:00 ` Matthew Auld
2022-09-13 21:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DGFX mmap with rpm (rev5) Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Anshuman Gupta @ 2022-09-13 15:27 UTC (permalink / raw)
To: intel-gfx; +Cc: chris, Matthew Auld, rodrigo.vivi
Release all mmap mapping for all lmem objects which are associated
with userfault such that, while pcie function in D3hot, any access
to memory mappings will raise a userfault.
Runtime resume the dgpu(when gem object lies in lmem).
This will transition the dgpu graphics function to D0
state if it was in D3 in order to access the mmap memory
mappings.
v2:
- Squashes the patches. [Matt Auld]
- Add adequate locking for lmem_userfault_list addition. [Matt Auld]
- Reused obj->userfault_count to avoid double addition. [Matt Auld]
- Added i915_gem_object_lock to check
i915_gem_object_is_lmem. [Matt Auld]
v3:
- Use i915_ttm_cpu_maps_iomem. [Matt Auld]
- Fix 'ret == 0 to ret == VM_FAULT_NOPAGE'. [Matt Auld]
- Reuse obj->userfault_count as a bool 0 or 1. [Matt Auld]
- Delete the mmaped obj from lmem_userfault_list in obj
destruction path. [Matt Auld]
- Get a wakeref for object destruction patch. [Matt Auld]
- Use intel_wakeref_auto to delay runtime PM. [Matt Auld]
v4:
- Avoid using mmo offset to get the vma_node. [Matt Auld]
- Added comment to use the lmem_userfault_lock. [Matt Auld]
- Get lmem_userfault_lock in i915_gem_object_release_mmap_offset.
[Matt Auld]
- Fixed kernel test robot generated warning.
v5:
- Addressed the cosmetics comments. [Andi]
- Changed i915_gem_runtime_pm_object_release_mmap_offset() name to
i915_gem_object_runtime_pm_release_mmap_offset() to be rhythmic.
PCIe Specs 5.3.1.4.1
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 +++++++++++
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 36 +++++++++++++++++--
drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
drivers/gpu/drm/i915/gt/intel_gt_types.h | 14 ++++++++
drivers/gpu/drm/i915/i915_gem.c | 4 +++
8 files changed, 79 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index b55befda3387..73d9eda1d6b7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -550,6 +550,20 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
}
+void i915_gem_object_runtime_pm_release_mmap_offset(struct drm_i915_gem_object *obj)
+{
+ struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
+ struct ttm_device *bdev = bo->bdev;
+
+ drm_vma_node_unmap(&bo->base.vma_node, bdev->dev_mapping);
+
+ if (obj->userfault_count) {
+ /* rpm wakeref provide exclusive access */
+ list_del(&obj->userfault_link);
+ obj->userfault_count = 0;
+ }
+}
+
void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
{
struct i915_mmap_offset *mmo, *mn;
@@ -573,6 +587,13 @@ void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
spin_lock(&obj->mmo.lock);
}
spin_unlock(&obj->mmo.lock);
+
+ if (obj->userfault_count) {
+ mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
+ list_del(&obj->userfault_link);
+ mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
+ obj->userfault_count = 0;
+ }
}
static struct i915_mmap_offset *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
index efee9e0d2508..1fa91b3033b3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
@@ -27,6 +27,7 @@ int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
+void i915_gem_object_runtime_pm_release_mmap_offset(struct drm_i915_gem_object *obj);
void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
#endif
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 85482a04d158..7ff9c7877bec 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -238,7 +238,7 @@ static void __i915_gem_object_free_mmaps(struct drm_i915_gem_object *obj)
{
/* Skip serialisation and waking the device if known to be not used. */
- if (obj->userfault_count)
+ if (obj->userfault_count && !IS_DGFX(to_i915(obj->base.dev)))
i915_gem_object_release_mmap_gtt(obj);
if (!RB_EMPTY_ROOT(&obj->mmo.offsets)) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 9f6b14ec189a..40305e2bcd49 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -298,7 +298,8 @@ struct drm_i915_gem_object {
};
/**
- * Whether the object is currently in the GGTT mmap.
+ * Whether the object is currently in the GGTT or any other supported
+ * fake offset mmap backed by lmem.
*/
unsigned int userfault_count;
struct list_head userfault_link;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index f64a3deb12fc..0544b0a4a43a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -509,9 +509,18 @@ static int i915_ttm_shrink(struct drm_i915_gem_object *obj, unsigned int flags)
static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo)
{
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
+ intel_wakeref_t wakeref = 0;
if (likely(obj)) {
+ /* ttm_bo_release() already has dma_resv_lock */
+ if (i915_ttm_cpu_maps_iomem(bo->resource))
+ wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
+
__i915_gem_object_pages_fini(obj);
+
+ if (wakeref)
+ intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
+
i915_ttm_free_cached_io_rsgt(obj);
}
}
@@ -981,6 +990,7 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
struct ttm_buffer_object *bo = area->vm_private_data;
struct drm_device *dev = bo->base.dev;
struct drm_i915_gem_object *obj;
+ intel_wakeref_t wakeref = 0;
vm_fault_t ret;
int idx;
@@ -1002,6 +1012,9 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
return VM_FAULT_SIGBUS;
}
+ if (i915_ttm_cpu_maps_iomem(bo->resource))
+ wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
+
if (!i915_ttm_resource_mappable(bo->resource)) {
int err = -ENODEV;
int i;
@@ -1023,7 +1036,8 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
if (err) {
drm_dbg(dev, "Unable to make resource CPU accessible\n");
dma_resv_unlock(bo->base.resv);
- return VM_FAULT_SIGBUS;
+ ret = VM_FAULT_SIGBUS;
+ goto out_rpm;
}
}
@@ -1034,12 +1048,30 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
} else {
ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
}
+
if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
- return ret;
+ goto out_rpm;
+
+ /* ttm_bo_vm_reserve() already has dma_resv_lock */
+ if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
+ obj->userfault_count = 1;
+ mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
+ list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))->lmem_userfault_list);
+ mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
+ }
+
+ if (wakeref & CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
+ intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))->userfault_wakeref,
+ msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
i915_ttm_adjust_lru(obj);
dma_resv_unlock(bo->base.resv);
+
+out_rpm:
+ if (wakeref)
+ intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
+
return ret;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 07300b0a0873..d0b03a928b9a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -40,6 +40,8 @@ void intel_gt_common_init_early(struct intel_gt *gt)
{
spin_lock_init(gt->irq_lock);
+ INIT_LIST_HEAD(>->lmem_userfault_list);
+ mutex_init(>->lmem_userfault_lock);
INIT_LIST_HEAD(>->closed_vma);
spin_lock_init(>->closed_lock);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 0757d9577551..f19c2de77ff6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -141,6 +141,20 @@ struct intel_gt {
struct intel_wakeref wakeref;
atomic_t user_wakeref;
+ /**
+ * Protects access to lmem usefault list.
+ * It is required, if we are outside of the runtime suspend path,
+ * access to @lmem_userfault_list requires always first grabbing the
+ * runtime pm, to ensure we can't race against runtime suspend.
+ * Once we have that we also need to grab @lmem_userfault_lock,
+ * at which point we have exclusive access.
+ * The runtime suspend path is special since it doesn't really hold any locks,
+ * but instead has exclusive access by virtue of all other accesses requiring
+ * holding the runtime pm wakeref.
+ */
+ struct mutex lmem_userfault_lock;
+ struct list_head lmem_userfault_list;
+
struct list_head closed_vma;
spinlock_t closed_lock; /* guards the list of closed_vma */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 3463dd795950..f18cc6270b2b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -842,6 +842,10 @@ void i915_gem_runtime_suspend(struct drm_i915_private *i915)
&to_gt(i915)->ggtt->userfault_list, userfault_link)
__i915_gem_object_release_mmap_gtt(obj);
+ list_for_each_entry_safe(obj, on,
+ &to_gt(i915)->lmem_userfault_list, userfault_link)
+ i915_gem_object_runtime_pm_release_mmap_offset(obj);
+
/*
* The fence will be lost when the device powers down. If any were
* in use by hardware (i.e. they are pinned), we should not be powering
--
2.26.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DGFX mmap with rpm (rev5)
2022-09-13 15:27 [Intel-gfx] [PATCH v5 0/2] DGFX mmap with rpm Anshuman Gupta
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
@ 2022-09-13 21:07 ` Patchwork
2022-09-13 21:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-14 11:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2022-09-13 21:07 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
== Series Details ==
Series: DGFX mmap with rpm (rev5)
URL : https://patchwork.freedesktop.org/series/107400/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for DGFX mmap with rpm (rev5)
2022-09-13 15:27 [Intel-gfx] [PATCH v5 0/2] DGFX mmap with rpm Anshuman Gupta
` (2 preceding siblings ...)
2022-09-13 21:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DGFX mmap with rpm (rev5) Patchwork
@ 2022-09-13 21:27 ` Patchwork
2022-09-14 11:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2022-09-13 21:27 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4033 bytes --]
== Series Details ==
Series: DGFX mmap with rpm (rev5)
URL : https://patchwork.freedesktop.org/series/107400/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12131 -> Patchwork_107400v5
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/index.html
Participating hosts (44 -> 40)
------------------------------
Missing (4): fi-ctg-p8600 bat-dg2-8 bat-dg2-11 fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_107400v5 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][1] -> [DMESG-FAIL][2] ([i915#4528])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/fi-blb-e6850/igt@i915_selftest@live@requests.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-g3258: NOTRUN -> [SKIP][3] ([fdo#109271] / [fdo#111827])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/fi-hsw-g3258/igt@kms_chamelium@common-hpd-after-suspend.html
- fi-pnv-d510: NOTRUN -> [SKIP][4] ([fdo#109271])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/fi-pnv-d510/igt@kms_chamelium@common-hpd-after-suspend.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258: [INCOMPLETE][5] ([i915#3303] / [i915#4785]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@requests:
- fi-pnv-d510: [DMESG-FAIL][7] ([i915#4528]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/fi-pnv-d510/igt@i915_selftest@live@requests.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/fi-pnv-d510/igt@i915_selftest@live@requests.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka: [FAIL][9] ([i915#6298]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
Build changes
-------------
* Linux: CI_DRM_12131 -> Patchwork_107400v5
CI-20190529: 20190529
CI_DRM_12131: 3c82566040d2d01a9e98f740d8de4a9e18116818 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6653: 4f927248ebbf11f03f4c1ea2254f011e7575322f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_107400v5: 3c82566040d2d01a9e98f740d8de4a9e18116818 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
48871c389bc0 drm/i915/dgfx: Release mmap on rpm suspend
1f64a7aeb215 drm/i915: Refactor userfault_wakeref to re-use
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/index.html
[-- Attachment #2: Type: text/html, Size: 4785 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for DGFX mmap with rpm (rev5)
2022-09-13 15:27 [Intel-gfx] [PATCH v5 0/2] DGFX mmap with rpm Anshuman Gupta
` (3 preceding siblings ...)
2022-09-13 21:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-09-14 11:23 ` Patchwork
2022-09-14 13:31 ` Gupta, Anshuman
4 siblings, 1 reply; 10+ messages in thread
From: Patchwork @ 2022-09-14 11:23 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 23554 bytes --]
== Series Details ==
Series: DGFX mmap with rpm (rev5)
URL : https://patchwork.freedesktop.org/series/107400/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_107400v5_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-rkl
Known issues
------------
Here are the changes found in Patchwork_107400v5_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][1] -> [FAIL][2] ([i915#6268])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb1/igt@gem_ctx_exec@basic-nohangcheck.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb1/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@kms:
- shard-tglb: [PASS][3] -> [FAIL][4] ([i915#5784])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb7/igt@gem_eio@kms.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb5/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#4525])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb4/igt@gem_exec_balancer@parallel.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb7/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: NOTRUN -> [SKIP][7] ([i915#4525])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: NOTRUN -> [FAIL][8] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][9] ([i915#2842])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][10] -> [SKIP][11] ([i915#2190])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb5/igt@gem_huc_copy@huc-copy.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb7/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random:
- shard-apl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl8/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-glk: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-iclb: NOTRUN -> [SKIP][14] ([fdo#109312])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@gem_softpin@evict-snoop-interruptible.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-iclb: NOTRUN -> [SKIP][15] ([i915#5286]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3886]) +3 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs:
- shard-iclb: NOTRUN -> [SKIP][17] ([fdo#109278]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs.html
* igt@kms_chamelium@hdmi-audio:
- shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl8/igt@kms_chamelium@hdmi-audio.html
* igt@kms_color_chamelium@ctm-blue-to-red:
- shard-iclb: NOTRUN -> [SKIP][19] ([fdo#109284] / [fdo#111827])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_color_chamelium@ctm-blue-to-red.html
* igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
- shard-iclb: [PASS][20] -> [FAIL][21] ([i915#2346]) +2 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb4/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][22] -> [FAIL][23] ([i915#4767])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][24] ([i915#2587] / [i915#2672]) +2 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][25] ([i915#3555]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][26] ([i915#2672]) +4 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-glk: NOTRUN -> [SKIP][27] ([fdo#109271]) +24 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271]) +31 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-iclb: NOTRUN -> [SKIP][29] ([fdo#109280])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-glk: NOTRUN -> [FAIL][30] ([fdo#108145] / [i915#265]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#658])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@kms_psr@psr2_cursor_mmap_gtt:
- shard-iclb: [PASS][32] -> [SKIP][33] ([fdo#109441]) +2 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_gtt.html
* igt@kms_psr@psr2_primary_blt:
- shard-iclb: NOTRUN -> [SKIP][34] ([fdo#109441])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_psr@psr2_primary_blt.html
* igt@perf_pmu@rc6-suspend:
- shard-apl: [PASS][35] -> [DMESG-WARN][36] ([i915#180]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl4/igt@perf_pmu@rc6-suspend.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl1/igt@perf_pmu@rc6-suspend.html
* igt@prime_nv_api@i915_nv_import_vs_close:
- shard-iclb: NOTRUN -> [SKIP][37] ([fdo#109291])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@prime_nv_api@i915_nv_import_vs_close.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][38] ([i915#658]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb8/igt@feature_discovery@psr2.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-tglu}: [FAIL][40] ([i915#6268]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglu-4/igt@gem_ctx_exec@basic-nohangcheck.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglu-6/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [TIMEOUT][42] ([i915#3070]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb4/igt@gem_eio@unwedge-stress.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb6/igt@gem_eio@unwedge-stress.html
- {shard-tglu}: [TIMEOUT][44] ([i915#3063]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglu-4/igt@gem_eio@unwedge-stress.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglu-6/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [SKIP][46] ([i915#4525]) -> [PASS][47] +2 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb6/igt@gem_exec_balancer@parallel-keep-in-fence.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_fair@basic-deadline:
- shard-iclb: [DMESG-WARN][48] ([i915#4391]) -> [PASS][49] +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb7/igt@gem_exec_fair@basic-deadline.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-tglb: [FAIL][50] ([i915#2842]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-glk: [FAIL][52] ([i915#2842]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-glk9/igt@gem_exec_fair@basic-none@vecs0.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk2/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-iclb: [FAIL][54] ([i915#2842]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb3/igt@gem_exec_fair@basic-pace@rcs0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gen9_exec_parse@bb-large:
- shard-apl: [TIMEOUT][56] -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl7/igt@gen9_exec_parse@bb-large.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl2/igt@gen9_exec_parse@bb-large.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [FAIL][58] ([i915#454]) -> [PASS][59] +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_dc@dc9-dpms:
- shard-iclb: [SKIP][60] ([i915#4281]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb5/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
- {shard-tglu}: [FAIL][62] ([i915#3825]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglu-4/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglu-1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [DMESG-WARN][64] ([i915#180]) -> [PASS][65] +1 similar issue
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][66] ([i915#79]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1:
- shard-iclb: [SKIP][68] ([i915#5176]) -> [PASS][69] +2 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1:
- shard-iclb: [SKIP][70] ([i915#5235]) -> [PASS][71] +5 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][72] ([fdo#109441]) -> [PASS][73] +2 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb8/igt@kms_psr@psr2_sprite_render.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
* igt@perf@stress-open-close:
- shard-glk: [INCOMPLETE][74] ([i915#5213]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-glk9/igt@perf@stress-open-close.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@perf@stress-open-close.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-iclb: [WARN][76] ([i915#2684]) -> [FAIL][77] ([i915#2684])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
- shard-iclb: [SKIP][78] ([i915#2920]) -> [SKIP][79] ([i915#658])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-iclb: [SKIP][80] ([fdo#111068] / [i915#658]) -> [SKIP][81] ([i915#2920]) +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3070]: https://gitlab.freedesktop.org/drm/intel/issues/3070
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
[i915#3828]: https://gitlab.freedesktop.org/drm/intel/issues/3828
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5182]: https://gitlab.freedesktop.org/drm/intel/issues/5182
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_12131 -> Patchwork_107400v5
CI-20190529: 20190529
CI_DRM_12131: 3c82566040d2d01a9e98f740d8de4a9e18116818 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6653: 4f927248ebbf11f03f4c1ea2254f011e7575322f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_107400v5: 3c82566040d2d01a9e98f740d8de4a9e18116818 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/index.html
[-- Attachment #2: Type: text/html, Size: 23904 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] ✓ Fi.CI.IGT: success for DGFX mmap with rpm (rev5)
2022-09-14 11:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2022-09-14 13:31 ` Gupta, Anshuman
0 siblings, 0 replies; 10+ messages in thread
From: Gupta, Anshuman @ 2022-09-14 13:31 UTC (permalink / raw)
To: intel-gfx; +Cc: matthew.auld
On 9/14/2022 4:53 PM, Patchwork wrote:
> *Patch Details*
> *Series:* DGFX mmap with rpm (rev5)
> *URL:* https://patchwork.freedesktop.org/series/107400/
> <https://patchwork.freedesktop.org/series/107400/>
> *State:* success
> *Details:*
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/index.html
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/index.html>
Pushed to drm-intel-gt-next.
Thanks for review.
Br,
Anshuman.
>
>
> CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_107400v5_full
>
>
> Summary
>
> *SUCCESS*
>
> No regressions found.
>
>
> Participating hosts (11 -> 10)
>
> Missing (1): shard-rkl
>
>
> Known issues
>
> Here are the changes found in Patchwork_107400v5_full that come from
> known issues:
>
>
> IGT changes
>
>
> Issues hit
>
> *
>
> igt@gem_ctx_exec@basic-nohangcheck:
>
> o shard-tglb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb1/igt@gem_ctx_exec@basic-nohangcheck.html> -> FAIL <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb1/igt@gem_ctx_exec@basic-nohangcheck.html> (i915#6268 <https://gitlab.freedesktop.org/drm/intel/issues/6268>)
> *
>
> igt@gem_eio@kms:
>
> o shard-tglb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb7/igt@gem_eio@kms.html> -> FAIL <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb5/igt@gem_eio@kms.html> (i915#5784 <https://gitlab.freedesktop.org/drm/intel/issues/5784>)
> *
>
> igt@gem_exec_balancer@parallel:
>
> o shard-iclb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb4/igt@gem_exec_balancer@parallel.html> -> SKIP <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb7/igt@gem_exec_balancer@parallel.html> (i915#4525 <https://gitlab.freedesktop.org/drm/intel/issues/4525>)
> *
>
> igt@gem_exec_balancer@parallel-keep-submit-fence:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@gem_exec_balancer@parallel-keep-submit-fence.html> (i915#4525 <https://gitlab.freedesktop.org/drm/intel/issues/4525>)
> *
>
> igt@gem_exec_fair@basic-pace-solo@rcs0:
>
> o shard-glk: NOTRUN -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html> (i915#2842 <https://gitlab.freedesktop.org/drm/intel/issues/2842>)
> *
>
> igt@gem_exec_fair@basic-pace@vcs1:
>
> o shard-iclb: NOTRUN -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@gem_exec_fair@basic-pace@vcs1.html> (i915#2842 <https://gitlab.freedesktop.org/drm/intel/issues/2842>)
> *
>
> igt@gem_huc_copy@huc-copy:
>
> o shard-tglb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb5/igt@gem_huc_copy@huc-copy.html> -> SKIP <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb7/igt@gem_huc_copy@huc-copy.html> (i915#2190 <https://gitlab.freedesktop.org/drm/intel/issues/2190>)
> *
>
> igt@gem_lmem_swapping@parallel-random:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl8/igt@gem_lmem_swapping@parallel-random.html> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#4613 <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
> *
>
> igt@gem_lmem_swapping@verify-ccs:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@gem_lmem_swapping@verify-ccs.html> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#4613 <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
> *
>
> igt@gem_softpin@evict-snoop-interruptible:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@gem_softpin@evict-snoop-interruptible.html> (fdo#109312 <https://bugs.freedesktop.org/show_bug.cgi?id=109312>)
> *
>
> igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html> (i915#5286 <https://gitlab.freedesktop.org/drm/intel/issues/5286>) +1 similar issue
> *
>
> igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#3886 <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +3 similar issues
> *
>
> igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs.html> (fdo#109278 <https://bugs.freedesktop.org/show_bug.cgi?id=109278>) +3 similar issues
> *
>
> igt@kms_chamelium@hdmi-audio:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl8/igt@kms_chamelium@hdmi-audio.html> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111827 <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +1 similar issue
> *
>
> igt@kms_color_chamelium@ctm-blue-to-red:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_color_chamelium@ctm-blue-to-red.html> (fdo#109284 <https://bugs.freedesktop.org/show_bug.cgi?id=109284> / fdo#111827 <https://bugs.freedesktop.org/show_bug.cgi?id=111827>)
> *
>
> igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
>
> o shard-iclb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb4/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html> -> FAIL <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html> (i915#2346 <https://gitlab.freedesktop.org/drm/intel/issues/2346>) +2 similar issues
> *
>
> igt@kms_fbcon_fbt@fbc-suspend:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html> -> FAIL <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html> (i915#4767 <https://gitlab.freedesktop.org/drm/intel/issues/4767>)
> *
>
> igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html> (i915#2587 <https://gitlab.freedesktop.org/drm/intel/issues/2587> / i915#2672 <https://gitlab.freedesktop.org/drm/intel/issues/2672>) +2 similar issues
> *
>
> igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode.html> (i915#3555 <https://gitlab.freedesktop.org/drm/intel/issues/3555>) +1 similar issue
> *
>
> igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-default-mode:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-default-mode.html> (i915#2672 <https://gitlab.freedesktop.org/drm/intel/issues/2672>) +4 similar issues
> *
>
> igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu.html> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +24 similar issues
> *
>
> igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +31 similar issues
> *
>
> igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html> (fdo#109280 <https://bugs.freedesktop.org/show_bug.cgi?id=109280>)
> *
>
> igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
>
> o shard-glk: NOTRUN -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html> (fdo#108145 <https://bugs.freedesktop.org/show_bug.cgi?id=108145> / i915#265 <https://gitlab.freedesktop.org/drm/intel/issues/265>) +1 similar issue
> *
>
> igt@kms_psr2_sf@plane-move-sf-dmg-area:
>
> o shard-glk: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@kms_psr@psr2_cursor_mmap_gtt:
>
> o shard-iclb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html> -> SKIP <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_gtt.html> (fdo#109441 <https://bugs.freedesktop.org/show_bug.cgi?id=109441>) +2 similar issues
> *
>
> igt@kms_psr@psr2_primary_blt:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@kms_psr@psr2_primary_blt.html> (fdo#109441 <https://bugs.freedesktop.org/show_bug.cgi?id=109441>)
> *
>
> igt@perf_pmu@rc6-suspend:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl4/igt@perf_pmu@rc6-suspend.html> -> DMESG-WARN <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl1/igt@perf_pmu@rc6-suspend.html> (i915#180 <https://gitlab.freedesktop.org/drm/intel/issues/180>) +1 similar issue
> *
>
> igt@prime_nv_api@i915_nv_import_vs_close:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@prime_nv_api@i915_nv_import_vs_close.html> (fdo#109291 <https://bugs.freedesktop.org/show_bug.cgi?id=109291>)
>
>
> Possible fixes
>
> *
>
> igt@feature_discovery@psr2:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb8/igt@feature_discovery@psr2.html> (i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@feature_discovery@psr2.html>
> *
>
> igt@gem_ctx_exec@basic-nohangcheck:
>
> o {shard-tglu}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglu-4/igt@gem_ctx_exec@basic-nohangcheck.html> (i915#6268 <https://gitlab.freedesktop.org/drm/intel/issues/6268>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglu-6/igt@gem_ctx_exec@basic-nohangcheck.html>
> *
>
> igt@gem_eio@unwedge-stress:
>
> o
>
> shard-iclb: TIMEOUT
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb4/igt@gem_eio@unwedge-stress.html> (i915#3070 <https://gitlab.freedesktop.org/drm/intel/issues/3070>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb6/igt@gem_eio@unwedge-stress.html>
>
> o
>
> {shard-tglu}: TIMEOUT
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglu-4/igt@gem_eio@unwedge-stress.html> (i915#3063 <https://gitlab.freedesktop.org/drm/intel/issues/3063>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglu-6/igt@gem_eio@unwedge-stress.html>
>
> *
>
> igt@gem_exec_balancer@parallel-keep-in-fence:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb6/igt@gem_exec_balancer@parallel-keep-in-fence.html> (i915#4525 <https://gitlab.freedesktop.org/drm/intel/issues/4525>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@gem_exec_balancer@parallel-keep-in-fence.html> +2 similar issues
> *
>
> igt@gem_exec_fair@basic-deadline:
>
> o shard-iclb: DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb7/igt@gem_exec_fair@basic-deadline.html> (i915#4391 <https://gitlab.freedesktop.org/drm/intel/issues/4391>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb8/igt@gem_exec_fair@basic-deadline.html> +1 similar issue
> *
>
> igt@gem_exec_fair@basic-none-share@rcs0:
>
> o shard-tglb: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html> (i915#2842 <https://gitlab.freedesktop.org/drm/intel/issues/2842>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html>
> *
>
> igt@gem_exec_fair@basic-none@vecs0:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-glk9/igt@gem_exec_fair@basic-none@vecs0.html> (i915#2842 <https://gitlab.freedesktop.org/drm/intel/issues/2842>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk2/igt@gem_exec_fair@basic-none@vecs0.html>
> *
>
> igt@gem_exec_fair@basic-pace@rcs0:
>
> o shard-iclb: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb3/igt@gem_exec_fair@basic-pace@rcs0.html> (i915#2842 <https://gitlab.freedesktop.org/drm/intel/issues/2842>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@gem_exec_fair@basic-pace@rcs0.html>
> *
>
> igt@gen9_exec_parse@bb-large:
>
> o shard-apl: TIMEOUT
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl7/igt@gen9_exec_parse@bb-large.html> -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl2/igt@gen9_exec_parse@bb-large.html>
> *
>
> igt@i915_pm_dc@dc6-dpms:
>
> o shard-iclb: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html> (i915#454 <https://gitlab.freedesktop.org/drm/intel/issues/454>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb1/igt@i915_pm_dc@dc6-dpms.html> +1 similar issue
> *
>
> igt@i915_pm_dc@dc9-dpms:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html> (i915#4281 <https://gitlab.freedesktop.org/drm/intel/issues/4281>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb5/igt@i915_pm_dc@dc9-dpms.html>
> *
>
> igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
>
> o {shard-tglu}: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-tglu-4/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html> (i915#3825 <https://gitlab.freedesktop.org/drm/intel/issues/3825>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-tglu-1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html>
> *
>
> igt@i915_suspend@fence-restore-tiled2untiled:
>
> o shard-apl: DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html> (i915#180 <https://gitlab.freedesktop.org/drm/intel/issues/180>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html> +1 similar issue
> *
>
> igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html> (i915#79 <https://gitlab.freedesktop.org/drm/intel/issues/79>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html>
> *
>
> igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html> (i915#5176 <https://gitlab.freedesktop.org/drm/intel/issues/5176>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html> +2 similar issues
> *
>
> igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1.html> (i915#5235 <https://gitlab.freedesktop.org/drm/intel/issues/5235>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1.html> +5 similar issues
> *
>
> igt@kms_psr@psr2_sprite_render:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb8/igt@kms_psr@psr2_sprite_render.html> (fdo#109441 <https://bugs.freedesktop.org/show_bug.cgi?id=109441>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@kms_psr@psr2_sprite_render.html> +2 similar issues
> *
>
> igt@perf@stress-open-close:
>
> o shard-glk: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-glk9/igt@perf@stress-open-close.html> (i915#5213 <https://gitlab.freedesktop.org/drm/intel/issues/5213>) -> PASS <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-glk8/igt@perf@stress-open-close.html>
>
>
> Warnings
>
> *
>
> igt@i915_pm_rc6_residency@rc6-idle@rcs0:
>
> o shard-iclb: WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html> (i915#2684 <https://gitlab.freedesktop.org/drm/intel/issues/2684>) -> FAIL <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html> (i915#2684 <https://gitlab.freedesktop.org/drm/intel/issues/2684>)
> *
>
> igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html> (i915#2920 <https://gitlab.freedesktop.org/drm/intel/issues/2920>) -> SKIP <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb4/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html> (i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12131/shard-iclb8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html> (fdo#111068 <https://bugs.freedesktop.org/show_bug.cgi?id=111068> / i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>) -> SKIP <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v5/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html> (i915#2920 <https://gitlab.freedesktop.org/drm/intel/issues/2920>) +1 similar issue
>
> {name}: This element is suppressed. This means it is ignored when computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
>
> Build changes
>
> * Linux: CI_DRM_12131 -> Patchwork_107400v5
>
> CI-20190529: 20190529
> CI_DRM_12131: 3c82566040d2d01a9e98f740d8de4a9e18116818 @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGT_6653: 4f927248ebbf11f03f4c1ea2254f011e7575322f @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> Patchwork_107400v5: 3c82566040d2d01a9e98f740d8de4a9e18116818 @
> git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
> git://anongit.freedesktop.org/piglit
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
@ 2022-09-20 14:00 ` Matthew Auld
2022-09-21 5:29 ` Gupta, Anshuman
0 siblings, 1 reply; 10+ messages in thread
From: Matthew Auld @ 2022-09-20 14:00 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx, rodrigo.vivi, Matthew Auld, chris
On Tue, 13 Sept 2022 at 16:27, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
>
> Release all mmap mapping for all lmem objects which are associated
> with userfault such that, while pcie function in D3hot, any access
> to memory mappings will raise a userfault.
>
> Runtime resume the dgpu(when gem object lies in lmem).
> This will transition the dgpu graphics function to D0
> state if it was in D3 in order to access the mmap memory
> mappings.
>
> v2:
> - Squashes the patches. [Matt Auld]
> - Add adequate locking for lmem_userfault_list addition. [Matt Auld]
> - Reused obj->userfault_count to avoid double addition. [Matt Auld]
> - Added i915_gem_object_lock to check
> i915_gem_object_is_lmem. [Matt Auld]
>
> v3:
> - Use i915_ttm_cpu_maps_iomem. [Matt Auld]
> - Fix 'ret == 0 to ret == VM_FAULT_NOPAGE'. [Matt Auld]
> - Reuse obj->userfault_count as a bool 0 or 1. [Matt Auld]
> - Delete the mmaped obj from lmem_userfault_list in obj
> destruction path. [Matt Auld]
> - Get a wakeref for object destruction patch. [Matt Auld]
> - Use intel_wakeref_auto to delay runtime PM. [Matt Auld]
>
> v4:
> - Avoid using mmo offset to get the vma_node. [Matt Auld]
> - Added comment to use the lmem_userfault_lock. [Matt Auld]
> - Get lmem_userfault_lock in i915_gem_object_release_mmap_offset.
> [Matt Auld]
> - Fixed kernel test robot generated warning.
>
> v5:
> - Addressed the cosmetics comments. [Andi]
> - Changed i915_gem_runtime_pm_object_release_mmap_offset() name to
> i915_gem_object_runtime_pm_release_mmap_offset() to be rhythmic.
>
> PCIe Specs 5.3.1.4.1
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 +++++++++++
> drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
> drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 36 +++++++++++++++++--
> drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
> drivers/gpu/drm/i915/gt/intel_gt_types.h | 14 ++++++++
> drivers/gpu/drm/i915/i915_gem.c | 4 +++
> 8 files changed, 79 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index b55befda3387..73d9eda1d6b7 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -550,6 +550,20 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
> intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> }
>
> +void i915_gem_object_runtime_pm_release_mmap_offset(struct drm_i915_gem_object *obj)
> +{
> + struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
> + struct ttm_device *bdev = bo->bdev;
> +
> + drm_vma_node_unmap(&bo->base.vma_node, bdev->dev_mapping);
> +
> + if (obj->userfault_count) {
> + /* rpm wakeref provide exclusive access */
> + list_del(&obj->userfault_link);
> + obj->userfault_count = 0;
> + }
> +}
> +
> void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> {
> struct i915_mmap_offset *mmo, *mn;
> @@ -573,6 +587,13 @@ void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> spin_lock(&obj->mmo.lock);
> }
> spin_unlock(&obj->mmo.lock);
> +
> + if (obj->userfault_count) {
> + mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> + list_del(&obj->userfault_link);
> + mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> + obj->userfault_count = 0;
> + }
Sorry for the late reply, I was out last week. This looks like it's
missing holding the runtime pm AFAICT. We are holding the runtime pm
for object destruction, but this is also called when a move is
triggered (very common). If so, this can race against the runtime pm
also touching the list concurrently. We are chasing some crazy looking
NULL deref bugs, so wondering if this is somehow related...
> }
>
> static struct i915_mmap_offset *
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> index efee9e0d2508..1fa91b3033b3 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> @@ -27,6 +27,7 @@ int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
> void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
> void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
>
> +void i915_gem_object_runtime_pm_release_mmap_offset(struct drm_i915_gem_object *obj);
> void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> index 85482a04d158..7ff9c7877bec 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> @@ -238,7 +238,7 @@ static void __i915_gem_object_free_mmaps(struct drm_i915_gem_object *obj)
> {
> /* Skip serialisation and waking the device if known to be not used. */
>
> - if (obj->userfault_count)
> + if (obj->userfault_count && !IS_DGFX(to_i915(obj->base.dev)))
> i915_gem_object_release_mmap_gtt(obj);
>
> if (!RB_EMPTY_ROOT(&obj->mmo.offsets)) {
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index 9f6b14ec189a..40305e2bcd49 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -298,7 +298,8 @@ struct drm_i915_gem_object {
> };
>
> /**
> - * Whether the object is currently in the GGTT mmap.
> + * Whether the object is currently in the GGTT or any other supported
> + * fake offset mmap backed by lmem.
> */
> unsigned int userfault_count;
> struct list_head userfault_link;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> index f64a3deb12fc..0544b0a4a43a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> @@ -509,9 +509,18 @@ static int i915_ttm_shrink(struct drm_i915_gem_object *obj, unsigned int flags)
> static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo)
> {
> struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
> + intel_wakeref_t wakeref = 0;
>
> if (likely(obj)) {
> + /* ttm_bo_release() already has dma_resv_lock */
> + if (i915_ttm_cpu_maps_iomem(bo->resource))
> + wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
> +
> __i915_gem_object_pages_fini(obj);
> +
> + if (wakeref)
> + intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
> +
> i915_ttm_free_cached_io_rsgt(obj);
> }
> }
> @@ -981,6 +990,7 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> struct ttm_buffer_object *bo = area->vm_private_data;
> struct drm_device *dev = bo->base.dev;
> struct drm_i915_gem_object *obj;
> + intel_wakeref_t wakeref = 0;
> vm_fault_t ret;
> int idx;
>
> @@ -1002,6 +1012,9 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> return VM_FAULT_SIGBUS;
> }
>
> + if (i915_ttm_cpu_maps_iomem(bo->resource))
> + wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
> +
> if (!i915_ttm_resource_mappable(bo->resource)) {
> int err = -ENODEV;
> int i;
> @@ -1023,7 +1036,8 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> if (err) {
> drm_dbg(dev, "Unable to make resource CPU accessible\n");
> dma_resv_unlock(bo->base.resv);
> - return VM_FAULT_SIGBUS;
> + ret = VM_FAULT_SIGBUS;
> + goto out_rpm;
> }
> }
>
> @@ -1034,12 +1048,30 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> } else {
> ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
> }
> +
> if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
> - return ret;
> + goto out_rpm;
> +
> + /* ttm_bo_vm_reserve() already has dma_resv_lock */
> + if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
> + obj->userfault_count = 1;
> + mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> + list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))->lmem_userfault_list);
> + mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> + }
> +
> + if (wakeref & CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
> + intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))->userfault_wakeref,
> + msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
>
> i915_ttm_adjust_lru(obj);
>
> dma_resv_unlock(bo->base.resv);
> +
> +out_rpm:
> + if (wakeref)
> + intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
> +
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 07300b0a0873..d0b03a928b9a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -40,6 +40,8 @@ void intel_gt_common_init_early(struct intel_gt *gt)
> {
> spin_lock_init(gt->irq_lock);
>
> + INIT_LIST_HEAD(>->lmem_userfault_list);
> + mutex_init(>->lmem_userfault_lock);
> INIT_LIST_HEAD(>->closed_vma);
> spin_lock_init(>->closed_lock);
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index 0757d9577551..f19c2de77ff6 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -141,6 +141,20 @@ struct intel_gt {
> struct intel_wakeref wakeref;
> atomic_t user_wakeref;
>
> + /**
> + * Protects access to lmem usefault list.
> + * It is required, if we are outside of the runtime suspend path,
> + * access to @lmem_userfault_list requires always first grabbing the
> + * runtime pm, to ensure we can't race against runtime suspend.
> + * Once we have that we also need to grab @lmem_userfault_lock,
> + * at which point we have exclusive access.
> + * The runtime suspend path is special since it doesn't really hold any locks,
> + * but instead has exclusive access by virtue of all other accesses requiring
> + * holding the runtime pm wakeref.
> + */
> + struct mutex lmem_userfault_lock;
> + struct list_head lmem_userfault_list;
> +
> struct list_head closed_vma;
> spinlock_t closed_lock; /* guards the list of closed_vma */
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 3463dd795950..f18cc6270b2b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -842,6 +842,10 @@ void i915_gem_runtime_suspend(struct drm_i915_private *i915)
> &to_gt(i915)->ggtt->userfault_list, userfault_link)
> __i915_gem_object_release_mmap_gtt(obj);
>
> + list_for_each_entry_safe(obj, on,
> + &to_gt(i915)->lmem_userfault_list, userfault_link)
> + i915_gem_object_runtime_pm_release_mmap_offset(obj);
> +
> /*
> * The fence will be lost when the device powers down. If any were
> * in use by hardware (i.e. they are pinned), we should not be powering
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-20 14:00 ` Matthew Auld
@ 2022-09-21 5:29 ` Gupta, Anshuman
2022-09-21 9:17 ` Matthew Auld
0 siblings, 1 reply; 10+ messages in thread
From: Gupta, Anshuman @ 2022-09-21 5:29 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx, Vivi, Rodrigo, Auld, Matthew, chris
> -----Original Message-----
> From: Matthew Auld <matthew.william.auld@gmail.com>
> Sent: Tuesday, September 20, 2022 7:30 PM
> To: Gupta, Anshuman <anshuman.gupta@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; chris@chris-wilson.co.uk; Auld, Matthew
> <matthew.auld@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Subject: Re: [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm
> suspend
>
> On Tue, 13 Sept 2022 at 16:27, Anshuman Gupta <anshuman.gupta@intel.com>
> wrote:
> >
> > Release all mmap mapping for all lmem objects which are associated
> > with userfault such that, while pcie function in D3hot, any access to
> > memory mappings will raise a userfault.
> >
> > Runtime resume the dgpu(when gem object lies in lmem).
> > This will transition the dgpu graphics function to D0 state if it was
> > in D3 in order to access the mmap memory mappings.
> >
> > v2:
> > - Squashes the patches. [Matt Auld]
> > - Add adequate locking for lmem_userfault_list addition. [Matt Auld]
> > - Reused obj->userfault_count to avoid double addition. [Matt Auld]
> > - Added i915_gem_object_lock to check
> > i915_gem_object_is_lmem. [Matt Auld]
> >
> > v3:
> > - Use i915_ttm_cpu_maps_iomem. [Matt Auld]
> > - Fix 'ret == 0 to ret == VM_FAULT_NOPAGE'. [Matt Auld]
> > - Reuse obj->userfault_count as a bool 0 or 1. [Matt Auld]
> > - Delete the mmaped obj from lmem_userfault_list in obj
> > destruction path. [Matt Auld]
> > - Get a wakeref for object destruction patch. [Matt Auld]
> > - Use intel_wakeref_auto to delay runtime PM. [Matt Auld]
> >
> > v4:
> > - Avoid using mmo offset to get the vma_node. [Matt Auld]
> > - Added comment to use the lmem_userfault_lock. [Matt Auld]
> > - Get lmem_userfault_lock in i915_gem_object_release_mmap_offset.
> > [Matt Auld]
> > - Fixed kernel test robot generated warning.
> >
> > v5:
> > - Addressed the cosmetics comments. [Andi]
> > - Changed i915_gem_runtime_pm_object_release_mmap_offset() name to
> > i915_gem_object_runtime_pm_release_mmap_offset() to be rhythmic.
> >
> > PCIe Specs 5.3.1.4.1
> >
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 +++++++++++
> > drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
> > drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
> > .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
> > drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 36 +++++++++++++++++--
> > drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
> > drivers/gpu/drm/i915/gt/intel_gt_types.h | 14 ++++++++
> > drivers/gpu/drm/i915/i915_gem.c | 4 +++
> > 8 files changed, 79 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > index b55befda3387..73d9eda1d6b7 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > @@ -550,6 +550,20 @@ void i915_gem_object_release_mmap_gtt(struct
> drm_i915_gem_object *obj)
> > intel_runtime_pm_put(&i915->runtime_pm, wakeref); }
> >
> > +void i915_gem_object_runtime_pm_release_mmap_offset(struct
> > +drm_i915_gem_object *obj) {
> > + struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
> > + struct ttm_device *bdev = bo->bdev;
> > +
> > + drm_vma_node_unmap(&bo->base.vma_node, bdev->dev_mapping);
> > +
> > + if (obj->userfault_count) {
> > + /* rpm wakeref provide exclusive access */
> > + list_del(&obj->userfault_link);
> > + obj->userfault_count = 0;
> > + }
> > +}
> > +
> > void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
> > *obj) {
> > struct i915_mmap_offset *mmo, *mn; @@ -573,6 +587,13 @@ void
> > i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> > spin_lock(&obj->mmo.lock);
> > }
> > spin_unlock(&obj->mmo.lock);
> > +
> > + if (obj->userfault_count) {
> > + mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> > + list_del(&obj->userfault_link);
> > + mutex_unlock(&to_gt(to_i915(obj->base.dev))-
> >lmem_userfault_lock);
> > + obj->userfault_count = 0;
> > + }
>
> Sorry for the late reply, I was out last week. This looks like it's missing holding
> the runtime pm AFAICT. We are holding the runtime pm for object destruction,
> but this is also called when a move is triggered (very common). If so, this can
> race against the runtime pm also touching the list concurrently. We are chasing
> some crazy looking NULL deref bugs, so wondering if this is somehow related...
Yes it is called from i915_ttm_move_notify(), I missed it thinking of __i915_gem_object_pages_fini
Would be sufficient to protect against runtime PM.
Having said that, it ok to remove the wakeref from i915_ttm_delete_mem_notify and having only
in one place in i915_gem_object_release_mmap_offset ?
If that is the case then is it safer to use the i915_gem_object_is_lmem() or we should use
i915_ttm_cpu_maps_iomem() here ?
Br,
Anshuman Gupta.
>
> > }
> >
> > static struct i915_mmap_offset *
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > index efee9e0d2508..1fa91b3033b3 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > @@ -27,6 +27,7 @@ int i915_gem_dumb_mmap_offset(struct drm_file
> > *file_priv, void __i915_gem_object_release_mmap_gtt(struct
> > drm_i915_gem_object *obj); void
> > i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
> >
> > +void i915_gem_object_runtime_pm_release_mmap_offset(struct
> > +drm_i915_gem_object *obj);
> > void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
> > *obj);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > index 85482a04d158..7ff9c7877bec 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > @@ -238,7 +238,7 @@ static void __i915_gem_object_free_mmaps(struct
> > drm_i915_gem_object *obj) {
> > /* Skip serialisation and waking the device if known to be not
> > used. */
> >
> > - if (obj->userfault_count)
> > + if (obj->userfault_count && !IS_DGFX(to_i915(obj->base.dev)))
> > i915_gem_object_release_mmap_gtt(obj);
> >
> > if (!RB_EMPTY_ROOT(&obj->mmo.offsets)) { diff --git
> > a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > index 9f6b14ec189a..40305e2bcd49 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > @@ -298,7 +298,8 @@ struct drm_i915_gem_object {
> > };
> >
> > /**
> > - * Whether the object is currently in the GGTT mmap.
> > + * Whether the object is currently in the GGTT or any other supported
> > + * fake offset mmap backed by lmem.
> > */
> > unsigned int userfault_count;
> > struct list_head userfault_link; diff --git
> > a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > index f64a3deb12fc..0544b0a4a43a 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > @@ -509,9 +509,18 @@ static int i915_ttm_shrink(struct
> > drm_i915_gem_object *obj, unsigned int flags) static void
> > i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo) {
> > struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
> > + intel_wakeref_t wakeref = 0;
> >
> > if (likely(obj)) {
> > + /* ttm_bo_release() already has dma_resv_lock */
> > + if (i915_ttm_cpu_maps_iomem(bo->resource))
> > + wakeref =
> > + intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
> > +
> > __i915_gem_object_pages_fini(obj);
> > +
> > + if (wakeref)
> > +
> > + intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
> > +
> > i915_ttm_free_cached_io_rsgt(obj);
> > }
> > }
> > @@ -981,6 +990,7 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> > struct ttm_buffer_object *bo = area->vm_private_data;
> > struct drm_device *dev = bo->base.dev;
> > struct drm_i915_gem_object *obj;
> > + intel_wakeref_t wakeref = 0;
> > vm_fault_t ret;
> > int idx;
> >
> > @@ -1002,6 +1012,9 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
> *vmf)
> > return VM_FAULT_SIGBUS;
> > }
> >
> > + if (i915_ttm_cpu_maps_iomem(bo->resource))
> > + wakeref =
> > + intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
> > +
> > if (!i915_ttm_resource_mappable(bo->resource)) {
> > int err = -ENODEV;
> > int i;
> > @@ -1023,7 +1036,8 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
> *vmf)
> > if (err) {
> > drm_dbg(dev, "Unable to make resource CPU accessible\n");
> > dma_resv_unlock(bo->base.resv);
> > - return VM_FAULT_SIGBUS;
> > + ret = VM_FAULT_SIGBUS;
> > + goto out_rpm;
> > }
> > }
> >
> > @@ -1034,12 +1048,30 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
> *vmf)
> > } else {
> > ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
> > }
> > +
> > if (ret == VM_FAULT_RETRY && !(vmf->flags &
> FAULT_FLAG_RETRY_NOWAIT))
> > - return ret;
> > + goto out_rpm;
> > +
> > + /* ttm_bo_vm_reserve() already has dma_resv_lock */
> > + if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
> > + obj->userfault_count = 1;
> > + mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> > + list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))-
> >lmem_userfault_list);
> > + mutex_unlock(&to_gt(to_i915(obj->base.dev))-
> >lmem_userfault_lock);
> > + }
> > +
> > + if (wakeref & CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
> > + intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))-
> >userfault_wakeref,
> > +
> > +
> msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
> >
> > i915_ttm_adjust_lru(obj);
> >
> > dma_resv_unlock(bo->base.resv);
> > +
> > +out_rpm:
> > + if (wakeref)
> > +
> > +intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
> > +
> > return ret;
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> > b/drivers/gpu/drm/i915/gt/intel_gt.c
> > index 07300b0a0873..d0b03a928b9a 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > @@ -40,6 +40,8 @@ void intel_gt_common_init_early(struct intel_gt *gt)
> > {
> > spin_lock_init(gt->irq_lock);
> >
> > + INIT_LIST_HEAD(>->lmem_userfault_list);
> > + mutex_init(>->lmem_userfault_lock);
> > INIT_LIST_HEAD(>->closed_vma);
> > spin_lock_init(>->closed_lock);
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > index 0757d9577551..f19c2de77ff6 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > @@ -141,6 +141,20 @@ struct intel_gt {
> > struct intel_wakeref wakeref;
> > atomic_t user_wakeref;
> >
> > + /**
> > + * Protects access to lmem usefault list.
> > + * It is required, if we are outside of the runtime suspend path,
> > + * access to @lmem_userfault_list requires always first grabbing the
> > + * runtime pm, to ensure we can't race against runtime suspend.
> > + * Once we have that we also need to grab @lmem_userfault_lock,
> > + * at which point we have exclusive access.
> > + * The runtime suspend path is special since it doesn't really hold any
> locks,
> > + * but instead has exclusive access by virtue of all other accesses
> requiring
> > + * holding the runtime pm wakeref.
> > + */
> > + struct mutex lmem_userfault_lock;
> > + struct list_head lmem_userfault_list;
> > +
> > struct list_head closed_vma;
> > spinlock_t closed_lock; /* guards the list of closed_vma */
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c
> > b/drivers/gpu/drm/i915/i915_gem.c index 3463dd795950..f18cc6270b2b
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -842,6 +842,10 @@ void i915_gem_runtime_suspend(struct
> drm_i915_private *i915)
> > &to_gt(i915)->ggtt->userfault_list, userfault_link)
> > __i915_gem_object_release_mmap_gtt(obj);
> >
> > + list_for_each_entry_safe(obj, on,
> > + &to_gt(i915)->lmem_userfault_list, userfault_link)
> > + i915_gem_object_runtime_pm_release_mmap_offset(obj);
> > +
> > /*
> > * The fence will be lost when the device powers down. If any were
> > * in use by hardware (i.e. they are pinned), we should not be
> > powering
> > --
> > 2.26.2
> >
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-21 5:29 ` Gupta, Anshuman
@ 2022-09-21 9:17 ` Matthew Auld
0 siblings, 0 replies; 10+ messages in thread
From: Matthew Auld @ 2022-09-21 9:17 UTC (permalink / raw)
To: Gupta, Anshuman, Matthew Auld; +Cc: intel-gfx, Vivi, Rodrigo, chris
On 21/09/2022 06:29, Gupta, Anshuman wrote:
>
>
>> -----Original Message-----
>> From: Matthew Auld <matthew.william.auld@gmail.com>
>> Sent: Tuesday, September 20, 2022 7:30 PM
>> To: Gupta, Anshuman <anshuman.gupta@intel.com>
>> Cc: intel-gfx@lists.freedesktop.org; chris@chris-wilson.co.uk; Auld, Matthew
>> <matthew.auld@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
>> Subject: Re: [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm
>> suspend
>>
>> On Tue, 13 Sept 2022 at 16:27, Anshuman Gupta <anshuman.gupta@intel.com>
>> wrote:
>>>
>>> Release all mmap mapping for all lmem objects which are associated
>>> with userfault such that, while pcie function in D3hot, any access to
>>> memory mappings will raise a userfault.
>>>
>>> Runtime resume the dgpu(when gem object lies in lmem).
>>> This will transition the dgpu graphics function to D0 state if it was
>>> in D3 in order to access the mmap memory mappings.
>>>
>>> v2:
>>> - Squashes the patches. [Matt Auld]
>>> - Add adequate locking for lmem_userfault_list addition. [Matt Auld]
>>> - Reused obj->userfault_count to avoid double addition. [Matt Auld]
>>> - Added i915_gem_object_lock to check
>>> i915_gem_object_is_lmem. [Matt Auld]
>>>
>>> v3:
>>> - Use i915_ttm_cpu_maps_iomem. [Matt Auld]
>>> - Fix 'ret == 0 to ret == VM_FAULT_NOPAGE'. [Matt Auld]
>>> - Reuse obj->userfault_count as a bool 0 or 1. [Matt Auld]
>>> - Delete the mmaped obj from lmem_userfault_list in obj
>>> destruction path. [Matt Auld]
>>> - Get a wakeref for object destruction patch. [Matt Auld]
>>> - Use intel_wakeref_auto to delay runtime PM. [Matt Auld]
>>>
>>> v4:
>>> - Avoid using mmo offset to get the vma_node. [Matt Auld]
>>> - Added comment to use the lmem_userfault_lock. [Matt Auld]
>>> - Get lmem_userfault_lock in i915_gem_object_release_mmap_offset.
>>> [Matt Auld]
>>> - Fixed kernel test robot generated warning.
>>>
>>> v5:
>>> - Addressed the cosmetics comments. [Andi]
>>> - Changed i915_gem_runtime_pm_object_release_mmap_offset() name to
>>> i915_gem_object_runtime_pm_release_mmap_offset() to be rhythmic.
>>>
>>> PCIe Specs 5.3.1.4.1
>>>
>>> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
>>> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
>>> ---
>>> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 +++++++++++
>>> drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
>>> drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
>>> .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
>>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 36 +++++++++++++++++--
>>> drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
>>> drivers/gpu/drm/i915/gt/intel_gt_types.h | 14 ++++++++
>>> drivers/gpu/drm/i915/i915_gem.c | 4 +++
>>> 8 files changed, 79 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>>> b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>>> index b55befda3387..73d9eda1d6b7 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>>> @@ -550,6 +550,20 @@ void i915_gem_object_release_mmap_gtt(struct
>> drm_i915_gem_object *obj)
>>> intel_runtime_pm_put(&i915->runtime_pm, wakeref); }
>>>
>>> +void i915_gem_object_runtime_pm_release_mmap_offset(struct
>>> +drm_i915_gem_object *obj) {
>>> + struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
>>> + struct ttm_device *bdev = bo->bdev;
>>> +
>>> + drm_vma_node_unmap(&bo->base.vma_node, bdev->dev_mapping);
>>> +
>>> + if (obj->userfault_count) {
>>> + /* rpm wakeref provide exclusive access */
>>> + list_del(&obj->userfault_link);
>>> + obj->userfault_count = 0;
>>> + }
>>> +}
>>> +
>>> void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
>>> *obj) {
>>> struct i915_mmap_offset *mmo, *mn; @@ -573,6 +587,13 @@ void
>>> i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
>>> spin_lock(&obj->mmo.lock);
>>> }
>>> spin_unlock(&obj->mmo.lock);
>>> +
>>> + if (obj->userfault_count) {
>>> + mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
>>> + list_del(&obj->userfault_link);
>>> + mutex_unlock(&to_gt(to_i915(obj->base.dev))-
>>> lmem_userfault_lock);
>>> + obj->userfault_count = 0;
>>> + }
>>
>> Sorry for the late reply, I was out last week. This looks like it's missing holding
>> the runtime pm AFAICT. We are holding the runtime pm for object destruction,
>> but this is also called when a move is triggered (very common). If so, this can
>> race against the runtime pm also touching the list concurrently. We are chasing
>> some crazy looking NULL deref bugs, so wondering if this is somehow related...
> Yes it is called from i915_ttm_move_notify(), I missed it thinking of __i915_gem_object_pages_fini
> Would be sufficient to protect against runtime PM.
> Having said that, it ok to remove the wakeref from i915_ttm_delete_mem_notify and having only
> in one place in i915_gem_object_release_mmap_offset ?
> If that is the case then is it safer to use the i915_gem_object_is_lmem() or we should use
> i915_ttm_cpu_maps_iomem() here ?
Yeah, maybe we should just throw this into i915_ttm_unmap_virtual().
Something like:
static void i915_ttm_unmap_virtual(struct drm_i915_gem_object *obj)
{
+ struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
+ struct ttm_device *bdev = bo->bdev;
+
+ assert_object_held_shared(obj);
+
+ if (i915_ttm_cpu_maps_iomem(bo->resource)) {
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+ /** XXX: make this a spin lock */
+ mutex_lock(&i915->lmem_userfault_lock);
+
+ if (obj->userfault_count) {
+ list_del(&obj->userfault_link);
+ obj->userfault_count = 0;
+ }
+
+ mutex_unlock(&i915->lmem_userfault_lock);
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ }
+
ttm_bo_unmap_virtual(i915_gem_to_ttm(obj));
}
That should cover object destruction, and any kind of move, I think.
Also it looks like obj->userfault_count is actually protected by the
object lock + runtime pm ref, when outside runtime suspend (at least for
the lmem case), so some kernel doc for that would be nice.
And then in i915_gem_object_runtime_pm_release_mmap_offset:
- if (obj->userfault_count) {
- /* rpm wakeref provide exclusive access */
- list_del(&obj->userfault_link);
- obj->userfault_count = 0;
- }
+ /*
+ * We have exclusive access here via runtime suspend. All other
callers
+ * must first be holding the runtime pm.
+ */
+ GEM_BUG_ON(!obj->userfault_count);
+ list_del(&obj->userfault_link);
+ obj->userfault_count = 0;
}
Also see the comment about maybe using spinlock.
>
> Br,
> Anshuman Gupta.
>>
>>> }
>>>
>>> static struct i915_mmap_offset *
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
>>> b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
>>> index efee9e0d2508..1fa91b3033b3 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
>>> @@ -27,6 +27,7 @@ int i915_gem_dumb_mmap_offset(struct drm_file
>>> *file_priv, void __i915_gem_object_release_mmap_gtt(struct
>>> drm_i915_gem_object *obj); void
>>> i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
>>>
>>> +void i915_gem_object_runtime_pm_release_mmap_offset(struct
>>> +drm_i915_gem_object *obj);
>>> void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
>>> *obj);
>>>
>>> #endif
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
>>> b/drivers/gpu/drm/i915/gem/i915_gem_object.c
>>> index 85482a04d158..7ff9c7877bec 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
>>> @@ -238,7 +238,7 @@ static void __i915_gem_object_free_mmaps(struct
>>> drm_i915_gem_object *obj) {
>>> /* Skip serialisation and waking the device if known to be not
>>> used. */
>>>
>>> - if (obj->userfault_count)
>>> + if (obj->userfault_count && !IS_DGFX(to_i915(obj->base.dev)))
>>> i915_gem_object_release_mmap_gtt(obj);
>>>
>>> if (!RB_EMPTY_ROOT(&obj->mmo.offsets)) { diff --git
>>> a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>>> b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>>> index 9f6b14ec189a..40305e2bcd49 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>>> @@ -298,7 +298,8 @@ struct drm_i915_gem_object {
>>> };
>>>
>>> /**
>>> - * Whether the object is currently in the GGTT mmap.
>>> + * Whether the object is currently in the GGTT or any other supported
>>> + * fake offset mmap backed by lmem.
>>> */
>>> unsigned int userfault_count;
>>> struct list_head userfault_link; diff --git
>>> a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> index f64a3deb12fc..0544b0a4a43a 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
>>> @@ -509,9 +509,18 @@ static int i915_ttm_shrink(struct
>>> drm_i915_gem_object *obj, unsigned int flags) static void
>>> i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo) {
>>> struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
>>> + intel_wakeref_t wakeref = 0;
>>>
>>> if (likely(obj)) {
>>> + /* ttm_bo_release() already has dma_resv_lock */
>>> + if (i915_ttm_cpu_maps_iomem(bo->resource))
>>> + wakeref =
>>> + intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
>>> +
>>> __i915_gem_object_pages_fini(obj);
>>> +
>>> + if (wakeref)
>>> +
>>> + intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
>>> +
>>> i915_ttm_free_cached_io_rsgt(obj);
>>> }
>>> }
>>> @@ -981,6 +990,7 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
>>> struct ttm_buffer_object *bo = area->vm_private_data;
>>> struct drm_device *dev = bo->base.dev;
>>> struct drm_i915_gem_object *obj;
>>> + intel_wakeref_t wakeref = 0;
>>> vm_fault_t ret;
>>> int idx;
>>>
>>> @@ -1002,6 +1012,9 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
>> *vmf)
>>> return VM_FAULT_SIGBUS;
>>> }
>>>
>>> + if (i915_ttm_cpu_maps_iomem(bo->resource))
>>> + wakeref =
>>> + intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
>>> +
>>> if (!i915_ttm_resource_mappable(bo->resource)) {
>>> int err = -ENODEV;
>>> int i;
>>> @@ -1023,7 +1036,8 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
>> *vmf)
>>> if (err) {
>>> drm_dbg(dev, "Unable to make resource CPU accessible\n");
>>> dma_resv_unlock(bo->base.resv);
>>> - return VM_FAULT_SIGBUS;
>>> + ret = VM_FAULT_SIGBUS;
>>> + goto out_rpm;
>>> }
>>> }
>>>
>>> @@ -1034,12 +1048,30 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
>> *vmf)
>>> } else {
>>> ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
>>> }
>>> +
>>> if (ret == VM_FAULT_RETRY && !(vmf->flags &
>> FAULT_FLAG_RETRY_NOWAIT))
>>> - return ret;
>>> + goto out_rpm;
>>> +
>>> + /* ttm_bo_vm_reserve() already has dma_resv_lock */
>>> + if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
>>> + obj->userfault_count = 1;
>>> + mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
>>> + list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))-
>>> lmem_userfault_list);
>>> + mutex_unlock(&to_gt(to_i915(obj->base.dev))-
>>> lmem_userfault_lock);
>>> + }
>>> +
>>> + if (wakeref & CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
>>> + intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))-
>>> userfault_wakeref,
>>> +
>>> +
>> msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
>>>
>>> i915_ttm_adjust_lru(obj);
>>>
>>> dma_resv_unlock(bo->base.resv);
>>> +
>>> +out_rpm:
>>> + if (wakeref)
>>> +
>>> +intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
>>> +
>>> return ret;
>>> }
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
>>> b/drivers/gpu/drm/i915/gt/intel_gt.c
>>> index 07300b0a0873..d0b03a928b9a 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
>>> @@ -40,6 +40,8 @@ void intel_gt_common_init_early(struct intel_gt *gt)
>>> {
>>> spin_lock_init(gt->irq_lock);
>>>
>>> + INIT_LIST_HEAD(>->lmem_userfault_list);
>>> + mutex_init(>->lmem_userfault_lock);
>>> INIT_LIST_HEAD(>->closed_vma);
>>> spin_lock_init(>->closed_lock);
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
>>> b/drivers/gpu/drm/i915/gt/intel_gt_types.h
>>> index 0757d9577551..f19c2de77ff6 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
>>> @@ -141,6 +141,20 @@ struct intel_gt {
>>> struct intel_wakeref wakeref;
>>> atomic_t user_wakeref;
>>>
>>> + /**
>>> + * Protects access to lmem usefault list.
>>> + * It is required, if we are outside of the runtime suspend path,
>>> + * access to @lmem_userfault_list requires always first grabbing the
>>> + * runtime pm, to ensure we can't race against runtime suspend.
>>> + * Once we have that we also need to grab @lmem_userfault_lock,
>>> + * at which point we have exclusive access.
>>> + * The runtime suspend path is special since it doesn't really hold any
>> locks,
>>> + * but instead has exclusive access by virtue of all other accesses
>> requiring
>>> + * holding the runtime pm wakeref.
>>> + */
>>> + struct mutex lmem_userfault_lock;
>>> + struct list_head lmem_userfault_list;
>>> +
>>> struct list_head closed_vma;
>>> spinlock_t closed_lock; /* guards the list of closed_vma */
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_gem.c
>>> b/drivers/gpu/drm/i915/i915_gem.c index 3463dd795950..f18cc6270b2b
>>> 100644
>>> --- a/drivers/gpu/drm/i915/i915_gem.c
>>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>>> @@ -842,6 +842,10 @@ void i915_gem_runtime_suspend(struct
>> drm_i915_private *i915)
>>> &to_gt(i915)->ggtt->userfault_list, userfault_link)
>>> __i915_gem_object_release_mmap_gtt(obj);
>>>
>>> + list_for_each_entry_safe(obj, on,
>>> + &to_gt(i915)->lmem_userfault_list, userfault_link)
>>> + i915_gem_object_runtime_pm_release_mmap_offset(obj);
>>> +
>>> /*
>>> * The fence will be lost when the device powers down. If any were
>>> * in use by hardware (i.e. they are pinned), we should not be
>>> powering
>>> --
>>> 2.26.2
>>>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-09-21 9:17 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-13 15:27 [Intel-gfx] [PATCH v5 0/2] DGFX mmap with rpm Anshuman Gupta
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
2022-09-13 15:27 ` [Intel-gfx] [PATCH v5 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
2022-09-20 14:00 ` Matthew Auld
2022-09-21 5:29 ` Gupta, Anshuman
2022-09-21 9:17 ` Matthew Auld
2022-09-13 21:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DGFX mmap with rpm (rev5) Patchwork
2022-09-13 21:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-14 11:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-09-14 13:31 ` Gupta, Anshuman
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.