* [PATCH] drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-27 14:36 ` Chris Wilson
0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2019-10-27 14:36 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
We need to verify that our blitter routines perform as expected, so
measure it.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
---
.../i915/gem/selftests/i915_gem_object_blt.c | 172 ++++++++++++++++++
1 file changed, 172 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
index 9666c0aeb6de..435264234c6d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
@@ -3,7 +3,10 @@
* Copyright © 2019 Intel Corporation
*/
+#include <linux/sort.h>
+
#include "gt/intel_gt.h"
+#include "gt/intel_engine_user.h"
#include "i915_selftest.h"
@@ -14,6 +17,173 @@
#include "huge_gem_object.h"
#include "mock_context.h"
+static int wrap_ktime_compare(const void *A, const void *B)
+{
+ const ktime_t *a = A, *b = B;
+
+ return ktime_compare(*a, *b);
+}
+
+static int __perf_fill_blt(struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ int inst = 0;
+
+ do {
+ struct intel_engine_cs *engine;
+ ktime_t t[5];
+ int pass;
+ int err;
+
+ engine = intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_COPY,
+ inst++);
+ if (!engine)
+ return 0;
+
+ for (pass = 0; pass < ARRAY_SIZE(t); pass++) {
+ struct intel_context *ce = engine->kernel_context;
+ ktime_t t0, t1;
+
+ t0 = ktime_get();
+
+ err = i915_gem_object_fill_blt(obj, ce, 0);
+ if (err)
+ return err;
+
+ err = i915_gem_object_wait(obj,
+ I915_WAIT_ALL,
+ MAX_SCHEDULE_TIMEOUT);
+ if (err)
+ return err;
+
+ t1 = ktime_get();
+ t[pass] = ktime_sub(t1, t0);
+ }
+
+ sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
+ pr_info("%s: blt %zd KiB fill: %lld MiB/s\n",
+ engine->name,
+ obj->base.size >> 10,
+ div64_u64(mul_u32_u32(3 * obj->base.size,
+ 1000 * 1000 * 1000),
+ t[1] + t[2] + t[3]) >> 20);
+ } while (1);
+}
+
+static int perf_fill_blt(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ static const unsigned long sizes[] = {
+ SZ_4K,
+ SZ_64K,
+ SZ_2M,
+ SZ_64M
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sizes); i++) {
+ struct drm_i915_gem_object *obj;
+ int err;
+
+ obj = i915_gem_object_create_internal(i915, sizes[i]);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ err = __perf_fill_blt(obj);
+ i915_gem_object_put(obj);
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
+static int __perf_copy_blt(struct drm_i915_gem_object *src,
+ struct drm_i915_gem_object *dst)
+{
+ struct drm_i915_private *i915 = to_i915(src->base.dev);
+ int inst = 0;
+
+ do {
+ struct intel_engine_cs *engine;
+ ktime_t t[5];
+ int pass;
+
+ engine = intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_COPY,
+ inst++);
+ if (!engine)
+ return 0;
+
+ for (pass = 0; pass < ARRAY_SIZE(t); pass++) {
+ struct intel_context *ce = engine->kernel_context;
+ ktime_t t0, t1;
+ int err;
+
+ t0 = ktime_get();
+
+ err = i915_gem_object_copy_blt(src, dst, ce);
+ if (err)
+ return err;
+
+ err = i915_gem_object_wait(dst,
+ I915_WAIT_ALL,
+ MAX_SCHEDULE_TIMEOUT);
+ if (err)
+ return err;
+
+ t1 = ktime_get();
+ t[pass] = ktime_sub(t1, t0);
+ }
+
+ sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
+ pr_info("%s: blt %zd KiB copy: %lld MiB/s\n",
+ engine->name,
+ src->base.size >> 10,
+ div64_u64(mul_u32_u32(3 * src->base.size,
+ 1000 * 1000 * 1000),
+ t[1] + t[2] + t[3]) >> 20);
+ } while(1);
+}
+
+static int perf_copy_blt(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ static const unsigned long sizes[] = {
+ SZ_4K,
+ SZ_64K,
+ SZ_2M,
+ SZ_64M
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sizes); i++) {
+ struct drm_i915_gem_object *src, *dst;
+ int err;
+
+ src = i915_gem_object_create_internal(i915, sizes[i]);
+ if (IS_ERR(src))
+ return PTR_ERR(src);
+
+ dst = i915_gem_object_create_internal(i915, sizes[i]);
+ if (IS_ERR(dst)) {
+ err = PTR_ERR(dst);
+ goto err_src;
+ }
+
+ err = __perf_copy_blt(src, dst);
+
+ i915_gem_object_put(dst);
+err_src:
+ i915_gem_object_put(src);
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
struct igt_thread_arg {
struct drm_i915_private *i915;
struct rnd_state prng;
@@ -335,6 +505,8 @@ static int igt_copy_blt(void *arg)
int i915_gem_object_blt_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
+ SUBTEST(perf_fill_blt),
+ SUBTEST(perf_copy_blt),
SUBTEST(igt_fill_blt),
SUBTEST(igt_copy_blt),
};
--
2.24.0.rc1
_______________________________________________
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^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-27 14:36 ` Chris Wilson
0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2019-10-27 14:36 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
We need to verify that our blitter routines perform as expected, so
measure it.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
---
.../i915/gem/selftests/i915_gem_object_blt.c | 172 ++++++++++++++++++
1 file changed, 172 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
index 9666c0aeb6de..435264234c6d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
@@ -3,7 +3,10 @@
* Copyright © 2019 Intel Corporation
*/
+#include <linux/sort.h>
+
#include "gt/intel_gt.h"
+#include "gt/intel_engine_user.h"
#include "i915_selftest.h"
@@ -14,6 +17,173 @@
#include "huge_gem_object.h"
#include "mock_context.h"
+static int wrap_ktime_compare(const void *A, const void *B)
+{
+ const ktime_t *a = A, *b = B;
+
+ return ktime_compare(*a, *b);
+}
+
+static int __perf_fill_blt(struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ int inst = 0;
+
+ do {
+ struct intel_engine_cs *engine;
+ ktime_t t[5];
+ int pass;
+ int err;
+
+ engine = intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_COPY,
+ inst++);
+ if (!engine)
+ return 0;
+
+ for (pass = 0; pass < ARRAY_SIZE(t); pass++) {
+ struct intel_context *ce = engine->kernel_context;
+ ktime_t t0, t1;
+
+ t0 = ktime_get();
+
+ err = i915_gem_object_fill_blt(obj, ce, 0);
+ if (err)
+ return err;
+
+ err = i915_gem_object_wait(obj,
+ I915_WAIT_ALL,
+ MAX_SCHEDULE_TIMEOUT);
+ if (err)
+ return err;
+
+ t1 = ktime_get();
+ t[pass] = ktime_sub(t1, t0);
+ }
+
+ sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
+ pr_info("%s: blt %zd KiB fill: %lld MiB/s\n",
+ engine->name,
+ obj->base.size >> 10,
+ div64_u64(mul_u32_u32(3 * obj->base.size,
+ 1000 * 1000 * 1000),
+ t[1] + t[2] + t[3]) >> 20);
+ } while (1);
+}
+
+static int perf_fill_blt(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ static const unsigned long sizes[] = {
+ SZ_4K,
+ SZ_64K,
+ SZ_2M,
+ SZ_64M
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sizes); i++) {
+ struct drm_i915_gem_object *obj;
+ int err;
+
+ obj = i915_gem_object_create_internal(i915, sizes[i]);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ err = __perf_fill_blt(obj);
+ i915_gem_object_put(obj);
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
+static int __perf_copy_blt(struct drm_i915_gem_object *src,
+ struct drm_i915_gem_object *dst)
+{
+ struct drm_i915_private *i915 = to_i915(src->base.dev);
+ int inst = 0;
+
+ do {
+ struct intel_engine_cs *engine;
+ ktime_t t[5];
+ int pass;
+
+ engine = intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_COPY,
+ inst++);
+ if (!engine)
+ return 0;
+
+ for (pass = 0; pass < ARRAY_SIZE(t); pass++) {
+ struct intel_context *ce = engine->kernel_context;
+ ktime_t t0, t1;
+ int err;
+
+ t0 = ktime_get();
+
+ err = i915_gem_object_copy_blt(src, dst, ce);
+ if (err)
+ return err;
+
+ err = i915_gem_object_wait(dst,
+ I915_WAIT_ALL,
+ MAX_SCHEDULE_TIMEOUT);
+ if (err)
+ return err;
+
+ t1 = ktime_get();
+ t[pass] = ktime_sub(t1, t0);
+ }
+
+ sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
+ pr_info("%s: blt %zd KiB copy: %lld MiB/s\n",
+ engine->name,
+ src->base.size >> 10,
+ div64_u64(mul_u32_u32(3 * src->base.size,
+ 1000 * 1000 * 1000),
+ t[1] + t[2] + t[3]) >> 20);
+ } while(1);
+}
+
+static int perf_copy_blt(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ static const unsigned long sizes[] = {
+ SZ_4K,
+ SZ_64K,
+ SZ_2M,
+ SZ_64M
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sizes); i++) {
+ struct drm_i915_gem_object *src, *dst;
+ int err;
+
+ src = i915_gem_object_create_internal(i915, sizes[i]);
+ if (IS_ERR(src))
+ return PTR_ERR(src);
+
+ dst = i915_gem_object_create_internal(i915, sizes[i]);
+ if (IS_ERR(dst)) {
+ err = PTR_ERR(dst);
+ goto err_src;
+ }
+
+ err = __perf_copy_blt(src, dst);
+
+ i915_gem_object_put(dst);
+err_src:
+ i915_gem_object_put(src);
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
struct igt_thread_arg {
struct drm_i915_private *i915;
struct rnd_state prng;
@@ -335,6 +505,8 @@ static int igt_copy_blt(void *arg)
int i915_gem_object_blt_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
+ SUBTEST(perf_fill_blt),
+ SUBTEST(perf_copy_blt),
SUBTEST(igt_fill_blt),
SUBTEST(igt_copy_blt),
};
--
2.24.0.rc1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-27 15:15 ` Patchwork
0 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2019-10-27 15:15 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Measure basic throughput of blit routines
URL : https://patchwork.freedesktop.org/series/68610/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b5fd5010e156 drm/i915/selftests: Measure basic throughput of blit routines
-:158: ERROR:SPACING: space required before the open parenthesis '('
#158: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:147:
+ } while(1);
total: 1 errors, 0 warnings, 0 checks, 191 lines checked
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-27 15:15 ` Patchwork
0 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2019-10-27 15:15 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Measure basic throughput of blit routines
URL : https://patchwork.freedesktop.org/series/68610/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b5fd5010e156 drm/i915/selftests: Measure basic throughput of blit routines
-:158: ERROR:SPACING: space required before the open parenthesis '('
#158: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:147:
+ } while(1);
total: 1 errors, 0 warnings, 0 checks, 191 lines checked
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-27 16:01 ` Patchwork
0 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2019-10-27 16:01 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Measure basic throughput of blit routines
URL : https://patchwork.freedesktop.org/series/68610/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15010
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_15010 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15010, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15010:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_blt:
- fi-hsw-peppy: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7194/fi-hsw-peppy/igt@i915_selftest@live_blt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/fi-hsw-peppy/igt@i915_selftest@live_blt.html
Known issues
------------
Here are the changes found in Patchwork_15010 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@gem_exec_fence@basic-wait-default:
- fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7194/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
Participating hosts (49 -> 41)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus fi-byt-clapper fi-skl-6600u
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7194 -> Patchwork_15010
CI-20190529: 20190529
CI_DRM_7194: 5d2161b339033a7eb2d11eef17c5780b44edd996 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5244: 5eef4d167c00031709751f12bd77a42a1b74ac67 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15010: b5fd5010e156f498e540268517a7073286a57ec0 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b5fd5010e156 drm/i915/selftests: Measure basic throughput of blit routines
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-27 16:01 ` Patchwork
0 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2019-10-27 16:01 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Measure basic throughput of blit routines
URL : https://patchwork.freedesktop.org/series/68610/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15010
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_15010 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15010, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15010:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_blt:
- fi-hsw-peppy: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7194/fi-hsw-peppy/igt@i915_selftest@live_blt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/fi-hsw-peppy/igt@i915_selftest@live_blt.html
Known issues
------------
Here are the changes found in Patchwork_15010 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@gem_exec_fence@basic-wait-default:
- fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7194/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
Participating hosts (49 -> 41)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus fi-byt-clapper fi-skl-6600u
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7194 -> Patchwork_15010
CI-20190529: 20190529
CI_DRM_7194: 5d2161b339033a7eb2d11eef17c5780b44edd996 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5244: 5eef4d167c00031709751f12bd77a42a1b74ac67 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15010: b5fd5010e156f498e540268517a7073286a57ec0 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b5fd5010e156 drm/i915/selftests: Measure basic throughput of blit routines
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15010/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-28 11:10 ` Matthew Auld
0 siblings, 0 replies; 8+ messages in thread
From: Matthew Auld @ 2019-10-28 11:10 UTC (permalink / raw)
To: Chris Wilson; +Cc: Intel Graphics Development, Matthew Auld
On Sun, 27 Oct 2019 at 14:36, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> We need to verify that our blitter routines perform as expected, so
> measure it.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/selftests: Measure basic throughput of blit routines
@ 2019-10-28 11:10 ` Matthew Auld
0 siblings, 0 replies; 8+ messages in thread
From: Matthew Auld @ 2019-10-28 11:10 UTC (permalink / raw)
To: Chris Wilson; +Cc: Intel Graphics Development, Matthew Auld
On Sun, 27 Oct 2019 at 14:36, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> We need to verify that our blitter routines perform as expected, so
> measure it.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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end of thread, other threads:[~2019-10-28 11:11 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-27 14:36 [PATCH] drm/i915/selftests: Measure basic throughput of blit routines Chris Wilson
2019-10-27 14:36 ` [Intel-gfx] " Chris Wilson
2019-10-27 15:15 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-10-27 15:15 ` [Intel-gfx] " Patchwork
2019-10-27 16:01 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-27 16:01 ` [Intel-gfx] " Patchwork
2019-10-28 11:10 ` [PATCH] " Matthew Auld
2019-10-28 11:10 ` [Intel-gfx] " Matthew Auld
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