All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-20 10:23 ` Geert Uytterhoeven
  0 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2022-05-20 10:23 UTC (permalink / raw)
  To: Hoan Tran, Serge Semin, Linus Walleij, Bartosz Golaszewski,
	Damien Le Moal, Marc Zyngier
  Cc: linux-gpio, linux-riscv, Geert Uytterhoeven

Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the dwapb driver:

    gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the dwapb driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Against gpio/for-next.
Boot-tested on SiPEED MAiXBiT (Canaan K210).

v2:
  - Factor out hwirq using preferred helper.
---
 drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
 1 file changed, 24 insertions(+), 14 deletions(-)

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 7130195da48d75dd..04afe728e18748df 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -95,7 +95,6 @@ struct dwapb_context {
 #endif
 
 struct dwapb_gpio_port_irqchip {
-	struct irq_chip		irqchip;
 	unsigned int		nr_irqs;
 	unsigned int		irq[DWAPB_MAX_GPIOS];
 };
@@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
 {
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
+	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 	unsigned long flags;
 	u32 val;
 
 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
-	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
+	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
 	dwapb_write(gpio, GPIO_INTMASK, val);
 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+
+	gpiochip_disable_irq(gc, hwirq);
 }
 
 static void dwapb_irq_unmask(struct irq_data *d)
 {
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
+	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 	unsigned long flags;
 	u32 val;
 
+	gpiochip_enable_irq(gc, hwirq);
+
 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
-	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
+	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
 	dwapb_write(gpio, GPIO_INTMASK, val);
 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
@@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
 
 	return 0;
 }
+#else
+#define dwapb_irq_set_wake	NULL
 #endif
 
+static const struct irq_chip dwapb_irq_chip = {
+	.name		= DWAPB_DRIVER_NAME,
+	.irq_ack	= dwapb_irq_ack,
+	.irq_mask	= dwapb_irq_mask,
+	.irq_unmask	= dwapb_irq_unmask,
+	.irq_set_type	= dwapb_irq_set_type,
+	.irq_enable	= dwapb_irq_enable,
+	.irq_disable	= dwapb_irq_disable,
+	.irq_set_wake	= dwapb_irq_set_wake,
+	.flags		= IRQCHIP_IMMUTABLE,
+	GPIOCHIP_IRQ_RESOURCE_HELPERS,
+};
+
 static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
 				   unsigned offset, unsigned debounce)
 {
@@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
 	girq->default_type = IRQ_TYPE_NONE;
 
 	port->pirq = pirq;
-	pirq->irqchip.name = DWAPB_DRIVER_NAME;
-	pirq->irqchip.irq_ack = dwapb_irq_ack;
-	pirq->irqchip.irq_mask = dwapb_irq_mask;
-	pirq->irqchip.irq_unmask = dwapb_irq_unmask;
-	pirq->irqchip.irq_set_type = dwapb_irq_set_type;
-	pirq->irqchip.irq_enable = dwapb_irq_enable;
-	pirq->irqchip.irq_disable = dwapb_irq_disable;
-#ifdef CONFIG_PM_SLEEP
-	pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
-#endif
 
 	/*
 	 * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
@@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
 		girq->parent_handler = dwapb_irq_handler;
 	}
 
-	girq->chip = &pirq->irqchip;
+	gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
 
 	return;
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-20 10:23 ` Geert Uytterhoeven
  0 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2022-05-20 10:23 UTC (permalink / raw)
  To: Hoan Tran, Serge Semin, Linus Walleij, Bartosz Golaszewski,
	Damien Le Moal, Marc Zyngier
  Cc: linux-gpio, linux-riscv, Geert Uytterhoeven

Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the dwapb driver:

    gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the dwapb driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Against gpio/for-next.
Boot-tested on SiPEED MAiXBiT (Canaan K210).

v2:
  - Factor out hwirq using preferred helper.
---
 drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
 1 file changed, 24 insertions(+), 14 deletions(-)

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 7130195da48d75dd..04afe728e18748df 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -95,7 +95,6 @@ struct dwapb_context {
 #endif
 
 struct dwapb_gpio_port_irqchip {
-	struct irq_chip		irqchip;
 	unsigned int		nr_irqs;
 	unsigned int		irq[DWAPB_MAX_GPIOS];
 };
@@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
 {
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
+	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 	unsigned long flags;
 	u32 val;
 
 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
-	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
+	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
 	dwapb_write(gpio, GPIO_INTMASK, val);
 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+
+	gpiochip_disable_irq(gc, hwirq);
 }
 
 static void dwapb_irq_unmask(struct irq_data *d)
 {
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
+	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 	unsigned long flags;
 	u32 val;
 
+	gpiochip_enable_irq(gc, hwirq);
+
 	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
-	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
+	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
 	dwapb_write(gpio, GPIO_INTMASK, val);
 	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
@@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
 
 	return 0;
 }
+#else
+#define dwapb_irq_set_wake	NULL
 #endif
 
+static const struct irq_chip dwapb_irq_chip = {
+	.name		= DWAPB_DRIVER_NAME,
+	.irq_ack	= dwapb_irq_ack,
+	.irq_mask	= dwapb_irq_mask,
+	.irq_unmask	= dwapb_irq_unmask,
+	.irq_set_type	= dwapb_irq_set_type,
+	.irq_enable	= dwapb_irq_enable,
+	.irq_disable	= dwapb_irq_disable,
+	.irq_set_wake	= dwapb_irq_set_wake,
+	.flags		= IRQCHIP_IMMUTABLE,
+	GPIOCHIP_IRQ_RESOURCE_HELPERS,
+};
+
 static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
 				   unsigned offset, unsigned debounce)
 {
@@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
 	girq->default_type = IRQ_TYPE_NONE;
 
 	port->pirq = pirq;
-	pirq->irqchip.name = DWAPB_DRIVER_NAME;
-	pirq->irqchip.irq_ack = dwapb_irq_ack;
-	pirq->irqchip.irq_mask = dwapb_irq_mask;
-	pirq->irqchip.irq_unmask = dwapb_irq_unmask;
-	pirq->irqchip.irq_set_type = dwapb_irq_set_type;
-	pirq->irqchip.irq_enable = dwapb_irq_enable;
-	pirq->irqchip.irq_disable = dwapb_irq_disable;
-#ifdef CONFIG_PM_SLEEP
-	pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
-#endif
 
 	/*
 	 * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
@@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
 		girq->parent_handler = dwapb_irq_handler;
 	}
 
-	girq->chip = &pirq->irqchip;
+	gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
 
 	return;
 
-- 
2.25.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
  2022-05-20 10:23 ` Geert Uytterhoeven
@ 2022-05-20 23:40   ` Damien Le Moal
  -1 siblings, 0 replies; 14+ messages in thread
From: Damien Le Moal @ 2022-05-20 23:40 UTC (permalink / raw)
  To: Geert Uytterhoeven, Hoan Tran, Serge Semin, Linus Walleij,
	Bartosz Golaszewski, Damien Le Moal, Marc Zyngier
  Cc: linux-gpio, linux-riscv

On 5/20/22 19:23, Geert Uytterhoeven wrote:
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
> 
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
> 
> Fix this by making the irqchip in the dwapb driver immutable.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).

FYI, fully fixed userspace is available here:

git@github.com:damien-lemoal/buildroot.git
branch: k210-v16

Need some patch commit message cleanup and I will post that to buildroot list.

> 
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
>  1 file changed, 24 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
> index 7130195da48d75dd..04afe728e18748df 100644
> --- a/drivers/gpio/gpio-dwapb.c
> +++ b/drivers/gpio/gpio-dwapb.c
> @@ -95,7 +95,6 @@ struct dwapb_context {
>  #endif
>  
>  struct dwapb_gpio_port_irqchip {
> -	struct irq_chip		irqchip;
>  	unsigned int		nr_irqs;
>  	unsigned int		irq[DWAPB_MAX_GPIOS];
>  };
> @@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
>  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>  	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +	irq_hw_number_t hwirq = irqd_to_hwirq(d);
>  	unsigned long flags;
>  	u32 val;
>  
>  	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
> +	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
>  	dwapb_write(gpio, GPIO_INTMASK, val);
>  	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> +
> +	gpiochip_disable_irq(gc, hwirq);
>  }
>  
>  static void dwapb_irq_unmask(struct irq_data *d)
>  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>  	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +	irq_hw_number_t hwirq = irqd_to_hwirq(d);
>  	unsigned long flags;
>  	u32 val;
>  
> +	gpiochip_enable_irq(gc, hwirq);
> +
>  	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
> +	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
>  	dwapb_write(gpio, GPIO_INTMASK, val);
>  	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
>  }
> @@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
>  
>  	return 0;
>  }
> +#else
> +#define dwapb_irq_set_wake	NULL
>  #endif
>  
> +static const struct irq_chip dwapb_irq_chip = {
> +	.name		= DWAPB_DRIVER_NAME,
> +	.irq_ack	= dwapb_irq_ack,
> +	.irq_mask	= dwapb_irq_mask,
> +	.irq_unmask	= dwapb_irq_unmask,
> +	.irq_set_type	= dwapb_irq_set_type,
> +	.irq_enable	= dwapb_irq_enable,
> +	.irq_disable	= dwapb_irq_disable,
> +	.irq_set_wake	= dwapb_irq_set_wake,
> +	.flags		= IRQCHIP_IMMUTABLE,
> +	GPIOCHIP_IRQ_RESOURCE_HELPERS,
> +};
> +
>  static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
>  				   unsigned offset, unsigned debounce)
>  {
> @@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>  	girq->default_type = IRQ_TYPE_NONE;
>  
>  	port->pirq = pirq;
> -	pirq->irqchip.name = DWAPB_DRIVER_NAME;
> -	pirq->irqchip.irq_ack = dwapb_irq_ack;
> -	pirq->irqchip.irq_mask = dwapb_irq_mask;
> -	pirq->irqchip.irq_unmask = dwapb_irq_unmask;
> -	pirq->irqchip.irq_set_type = dwapb_irq_set_type;
> -	pirq->irqchip.irq_enable = dwapb_irq_enable;
> -	pirq->irqchip.irq_disable = dwapb_irq_disable;
> -#ifdef CONFIG_PM_SLEEP
> -	pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
> -#endif
>  
>  	/*
>  	 * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
> @@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>  		girq->parent_handler = dwapb_irq_handler;
>  	}
>  
> -	girq->chip = &pirq->irqchip;
> +	gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
>  
>  	return;
>  

Looks OK to me.

Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>

-- 
Damien Le Moal
Western Digital Research

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-20 23:40   ` Damien Le Moal
  0 siblings, 0 replies; 14+ messages in thread
From: Damien Le Moal @ 2022-05-20 23:40 UTC (permalink / raw)
  To: Geert Uytterhoeven, Hoan Tran, Serge Semin, Linus Walleij,
	Bartosz Golaszewski, Damien Le Moal, Marc Zyngier
  Cc: linux-gpio, linux-riscv

On 5/20/22 19:23, Geert Uytterhoeven wrote:
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
> 
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
> 
> Fix this by making the irqchip in the dwapb driver immutable.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).

FYI, fully fixed userspace is available here:

git@github.com:damien-lemoal/buildroot.git
branch: k210-v16

Need some patch commit message cleanup and I will post that to buildroot list.

> 
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
>  1 file changed, 24 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
> index 7130195da48d75dd..04afe728e18748df 100644
> --- a/drivers/gpio/gpio-dwapb.c
> +++ b/drivers/gpio/gpio-dwapb.c
> @@ -95,7 +95,6 @@ struct dwapb_context {
>  #endif
>  
>  struct dwapb_gpio_port_irqchip {
> -	struct irq_chip		irqchip;
>  	unsigned int		nr_irqs;
>  	unsigned int		irq[DWAPB_MAX_GPIOS];
>  };
> @@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
>  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>  	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +	irq_hw_number_t hwirq = irqd_to_hwirq(d);
>  	unsigned long flags;
>  	u32 val;
>  
>  	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
> +	val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
>  	dwapb_write(gpio, GPIO_INTMASK, val);
>  	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> +
> +	gpiochip_disable_irq(gc, hwirq);
>  }
>  
>  static void dwapb_irq_unmask(struct irq_data *d)
>  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>  	struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +	irq_hw_number_t hwirq = irqd_to_hwirq(d);
>  	unsigned long flags;
>  	u32 val;
>  
> +	gpiochip_enable_irq(gc, hwirq);
> +
>  	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
> +	val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
>  	dwapb_write(gpio, GPIO_INTMASK, val);
>  	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
>  }
> @@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
>  
>  	return 0;
>  }
> +#else
> +#define dwapb_irq_set_wake	NULL
>  #endif
>  
> +static const struct irq_chip dwapb_irq_chip = {
> +	.name		= DWAPB_DRIVER_NAME,
> +	.irq_ack	= dwapb_irq_ack,
> +	.irq_mask	= dwapb_irq_mask,
> +	.irq_unmask	= dwapb_irq_unmask,
> +	.irq_set_type	= dwapb_irq_set_type,
> +	.irq_enable	= dwapb_irq_enable,
> +	.irq_disable	= dwapb_irq_disable,
> +	.irq_set_wake	= dwapb_irq_set_wake,
> +	.flags		= IRQCHIP_IMMUTABLE,
> +	GPIOCHIP_IRQ_RESOURCE_HELPERS,
> +};
> +
>  static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
>  				   unsigned offset, unsigned debounce)
>  {
> @@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>  	girq->default_type = IRQ_TYPE_NONE;
>  
>  	port->pirq = pirq;
> -	pirq->irqchip.name = DWAPB_DRIVER_NAME;
> -	pirq->irqchip.irq_ack = dwapb_irq_ack;
> -	pirq->irqchip.irq_mask = dwapb_irq_mask;
> -	pirq->irqchip.irq_unmask = dwapb_irq_unmask;
> -	pirq->irqchip.irq_set_type = dwapb_irq_set_type;
> -	pirq->irqchip.irq_enable = dwapb_irq_enable;
> -	pirq->irqchip.irq_disable = dwapb_irq_disable;
> -#ifdef CONFIG_PM_SLEEP
> -	pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
> -#endif
>  
>  	/*
>  	 * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
> @@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>  		girq->parent_handler = dwapb_irq_handler;
>  	}
>  
> -	girq->chip = &pirq->irqchip;
> +	gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
>  
>  	return;
>  

Looks OK to me.

Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>

-- 
Damien Le Moal
Western Digital Research

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
  2022-05-20 10:23 ` Geert Uytterhoeven
@ 2022-05-21 17:29   ` Andy Shevchenko
  -1 siblings, 0 replies; 14+ messages in thread
From: Andy Shevchenko @ 2022-05-21 17:29 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Bartosz Golaszewski,
	Damien Le Moal, Marc Zyngier, open list:GPIO SUBSYSTEM,
	linux-riscv

On Sat, May 21, 2022 at 1:24 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
>
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
>
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the dwapb driver immutable.


> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
>
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
>  1 file changed, 24 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
> index 7130195da48d75dd..04afe728e18748df 100644
> --- a/drivers/gpio/gpio-dwapb.c
> +++ b/drivers/gpio/gpio-dwapb.c
> @@ -95,7 +95,6 @@ struct dwapb_context {
>  #endif
>
>  struct dwapb_gpio_port_irqchip {
> -       struct irq_chip         irqchip;
>         unsigned int            nr_irqs;
>         unsigned int            irq[DWAPB_MAX_GPIOS];
>  };
> @@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> +
> +       gpiochip_disable_irq(gc, hwirq);
>  }
>
>  static void dwapb_irq_unmask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
> +       gpiochip_enable_irq(gc, hwirq);
> +
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
>  }
> @@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
>
>         return 0;
>  }
> +#else
> +#define dwapb_irq_set_wake     NULL
>  #endif
>
> +static const struct irq_chip dwapb_irq_chip = {
> +       .name           = DWAPB_DRIVER_NAME,
> +       .irq_ack        = dwapb_irq_ack,
> +       .irq_mask       = dwapb_irq_mask,
> +       .irq_unmask     = dwapb_irq_unmask,
> +       .irq_set_type   = dwapb_irq_set_type,
> +       .irq_enable     = dwapb_irq_enable,
> +       .irq_disable    = dwapb_irq_disable,
> +       .irq_set_wake   = dwapb_irq_set_wake,
> +       .flags          = IRQCHIP_IMMUTABLE,
> +       GPIOCHIP_IRQ_RESOURCE_HELPERS,
> +};
> +
>  static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
>                                    unsigned offset, unsigned debounce)
>  {
> @@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>         girq->default_type = IRQ_TYPE_NONE;
>
>         port->pirq = pirq;
> -       pirq->irqchip.name = DWAPB_DRIVER_NAME;
> -       pirq->irqchip.irq_ack = dwapb_irq_ack;
> -       pirq->irqchip.irq_mask = dwapb_irq_mask;
> -       pirq->irqchip.irq_unmask = dwapb_irq_unmask;
> -       pirq->irqchip.irq_set_type = dwapb_irq_set_type;
> -       pirq->irqchip.irq_enable = dwapb_irq_enable;
> -       pirq->irqchip.irq_disable = dwapb_irq_disable;
> -#ifdef CONFIG_PM_SLEEP
> -       pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
> -#endif
>
>         /*
>          * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
> @@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>                 girq->parent_handler = dwapb_irq_handler;
>         }
>
> -       girq->chip = &pirq->irqchip;
> +       gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
>
>         return;
>
> --
> 2.25.1
>


-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-21 17:29   ` Andy Shevchenko
  0 siblings, 0 replies; 14+ messages in thread
From: Andy Shevchenko @ 2022-05-21 17:29 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Bartosz Golaszewski,
	Damien Le Moal, Marc Zyngier, open list:GPIO SUBSYSTEM,
	linux-riscv

On Sat, May 21, 2022 at 1:24 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
>
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
>
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the dwapb driver immutable.


> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
>
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
>  1 file changed, 24 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
> index 7130195da48d75dd..04afe728e18748df 100644
> --- a/drivers/gpio/gpio-dwapb.c
> +++ b/drivers/gpio/gpio-dwapb.c
> @@ -95,7 +95,6 @@ struct dwapb_context {
>  #endif
>
>  struct dwapb_gpio_port_irqchip {
> -       struct irq_chip         irqchip;
>         unsigned int            nr_irqs;
>         unsigned int            irq[DWAPB_MAX_GPIOS];
>  };
> @@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> +
> +       gpiochip_disable_irq(gc, hwirq);
>  }
>
>  static void dwapb_irq_unmask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
> +       gpiochip_enable_irq(gc, hwirq);
> +
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
>  }
> @@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
>
>         return 0;
>  }
> +#else
> +#define dwapb_irq_set_wake     NULL
>  #endif
>
> +static const struct irq_chip dwapb_irq_chip = {
> +       .name           = DWAPB_DRIVER_NAME,
> +       .irq_ack        = dwapb_irq_ack,
> +       .irq_mask       = dwapb_irq_mask,
> +       .irq_unmask     = dwapb_irq_unmask,
> +       .irq_set_type   = dwapb_irq_set_type,
> +       .irq_enable     = dwapb_irq_enable,
> +       .irq_disable    = dwapb_irq_disable,
> +       .irq_set_wake   = dwapb_irq_set_wake,
> +       .flags          = IRQCHIP_IMMUTABLE,
> +       GPIOCHIP_IRQ_RESOURCE_HELPERS,
> +};
> +
>  static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
>                                    unsigned offset, unsigned debounce)
>  {
> @@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>         girq->default_type = IRQ_TYPE_NONE;
>
>         port->pirq = pirq;
> -       pirq->irqchip.name = DWAPB_DRIVER_NAME;
> -       pirq->irqchip.irq_ack = dwapb_irq_ack;
> -       pirq->irqchip.irq_mask = dwapb_irq_mask;
> -       pirq->irqchip.irq_unmask = dwapb_irq_unmask;
> -       pirq->irqchip.irq_set_type = dwapb_irq_set_type;
> -       pirq->irqchip.irq_enable = dwapb_irq_enable;
> -       pirq->irqchip.irq_disable = dwapb_irq_disable;
> -#ifdef CONFIG_PM_SLEEP
> -       pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
> -#endif
>
>         /*
>          * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
> @@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>                 girq->parent_handler = dwapb_irq_handler;
>         }
>
> -       girq->chip = &pirq->irqchip;
> +       gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
>
>         return;
>
> --
> 2.25.1
>


-- 
With Best Regards,
Andy Shevchenko

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
  2022-05-20 10:23 ` Geert Uytterhoeven
@ 2022-05-21 17:29   ` Andy Shevchenko
  -1 siblings, 0 replies; 14+ messages in thread
From: Andy Shevchenko @ 2022-05-21 17:29 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Bartosz Golaszewski,
	Damien Le Moal, Marc Zyngier, open list:GPIO SUBSYSTEM,
	linux-riscv

On Sat, May 21, 2022 at 1:24 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
>
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
>
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the dwapb driver immutable.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
>
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
>  1 file changed, 24 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
> index 7130195da48d75dd..04afe728e18748df 100644
> --- a/drivers/gpio/gpio-dwapb.c
> +++ b/drivers/gpio/gpio-dwapb.c
> @@ -95,7 +95,6 @@ struct dwapb_context {
>  #endif
>
>  struct dwapb_gpio_port_irqchip {
> -       struct irq_chip         irqchip;
>         unsigned int            nr_irqs;
>         unsigned int            irq[DWAPB_MAX_GPIOS];
>  };
> @@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> +
> +       gpiochip_disable_irq(gc, hwirq);
>  }
>
>  static void dwapb_irq_unmask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
> +       gpiochip_enable_irq(gc, hwirq);
> +
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
>  }
> @@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
>
>         return 0;
>  }
> +#else
> +#define dwapb_irq_set_wake     NULL
>  #endif
>
> +static const struct irq_chip dwapb_irq_chip = {
> +       .name           = DWAPB_DRIVER_NAME,
> +       .irq_ack        = dwapb_irq_ack,
> +       .irq_mask       = dwapb_irq_mask,
> +       .irq_unmask     = dwapb_irq_unmask,
> +       .irq_set_type   = dwapb_irq_set_type,
> +       .irq_enable     = dwapb_irq_enable,
> +       .irq_disable    = dwapb_irq_disable,
> +       .irq_set_wake   = dwapb_irq_set_wake,
> +       .flags          = IRQCHIP_IMMUTABLE,
> +       GPIOCHIP_IRQ_RESOURCE_HELPERS,
> +};
> +
>  static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
>                                    unsigned offset, unsigned debounce)
>  {
> @@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>         girq->default_type = IRQ_TYPE_NONE;
>
>         port->pirq = pirq;
> -       pirq->irqchip.name = DWAPB_DRIVER_NAME;
> -       pirq->irqchip.irq_ack = dwapb_irq_ack;
> -       pirq->irqchip.irq_mask = dwapb_irq_mask;
> -       pirq->irqchip.irq_unmask = dwapb_irq_unmask;
> -       pirq->irqchip.irq_set_type = dwapb_irq_set_type;
> -       pirq->irqchip.irq_enable = dwapb_irq_enable;
> -       pirq->irqchip.irq_disable = dwapb_irq_disable;
> -#ifdef CONFIG_PM_SLEEP
> -       pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
> -#endif
>
>         /*
>          * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
> @@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>                 girq->parent_handler = dwapb_irq_handler;
>         }
>
> -       girq->chip = &pirq->irqchip;
> +       gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
>
>         return;
>
> --
> 2.25.1
>


-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-21 17:29   ` Andy Shevchenko
  0 siblings, 0 replies; 14+ messages in thread
From: Andy Shevchenko @ 2022-05-21 17:29 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Bartosz Golaszewski,
	Damien Le Moal, Marc Zyngier, open list:GPIO SUBSYSTEM,
	linux-riscv

On Sat, May 21, 2022 at 1:24 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
>
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
>
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the dwapb driver immutable.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
>
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-dwapb.c | 38 ++++++++++++++++++++++++--------------
>  1 file changed, 24 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
> index 7130195da48d75dd..04afe728e18748df 100644
> --- a/drivers/gpio/gpio-dwapb.c
> +++ b/drivers/gpio/gpio-dwapb.c
> @@ -95,7 +95,6 @@ struct dwapb_context {
>  #endif
>
>  struct dwapb_gpio_port_irqchip {
> -       struct irq_chip         irqchip;
>         unsigned int            nr_irqs;
>         unsigned int            irq[DWAPB_MAX_GPIOS];
>  };
> @@ -252,24 +251,30 @@ static void dwapb_irq_mask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> +
> +       gpiochip_disable_irq(gc, hwirq);
>  }
>
>  static void dwapb_irq_unmask(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
>         unsigned long flags;
>         u32 val;
>
> +       gpiochip_enable_irq(gc, hwirq);
> +
>         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> -       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
> +       val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
>         dwapb_write(gpio, GPIO_INTMASK, val);
>         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
>  }
> @@ -364,8 +369,23 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
>
>         return 0;
>  }
> +#else
> +#define dwapb_irq_set_wake     NULL
>  #endif
>
> +static const struct irq_chip dwapb_irq_chip = {
> +       .name           = DWAPB_DRIVER_NAME,
> +       .irq_ack        = dwapb_irq_ack,
> +       .irq_mask       = dwapb_irq_mask,
> +       .irq_unmask     = dwapb_irq_unmask,
> +       .irq_set_type   = dwapb_irq_set_type,
> +       .irq_enable     = dwapb_irq_enable,
> +       .irq_disable    = dwapb_irq_disable,
> +       .irq_set_wake   = dwapb_irq_set_wake,
> +       .flags          = IRQCHIP_IMMUTABLE,
> +       GPIOCHIP_IRQ_RESOURCE_HELPERS,
> +};
> +
>  static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
>                                    unsigned offset, unsigned debounce)
>  {
> @@ -439,16 +459,6 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>         girq->default_type = IRQ_TYPE_NONE;
>
>         port->pirq = pirq;
> -       pirq->irqchip.name = DWAPB_DRIVER_NAME;
> -       pirq->irqchip.irq_ack = dwapb_irq_ack;
> -       pirq->irqchip.irq_mask = dwapb_irq_mask;
> -       pirq->irqchip.irq_unmask = dwapb_irq_unmask;
> -       pirq->irqchip.irq_set_type = dwapb_irq_set_type;
> -       pirq->irqchip.irq_enable = dwapb_irq_enable;
> -       pirq->irqchip.irq_disable = dwapb_irq_disable;
> -#ifdef CONFIG_PM_SLEEP
> -       pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
> -#endif
>
>         /*
>          * Intel ACPI-based platforms mostly have the DesignWare APB GPIO
> @@ -475,7 +485,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
>                 girq->parent_handler = dwapb_irq_handler;
>         }
>
> -       girq->chip = &pirq->irqchip;
> +       gpio_irq_chip_set_chip(girq, &dwapb_irq_chip);
>
>         return;
>
> --
> 2.25.1
>


-- 
With Best Regards,
Andy Shevchenko

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
  2022-05-20 10:23 ` Geert Uytterhoeven
@ 2022-05-22 20:13   ` Bartosz Golaszewski
  -1 siblings, 0 replies; 14+ messages in thread
From: Bartosz Golaszewski @ 2022-05-22 20:13 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Damien Le Moal,
	Marc Zyngier, open list:GPIO SUBSYSTEM, linux-riscv

On Fri, May 20, 2022 at 12:23 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
>
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
>
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the dwapb driver immutable.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
>
> v2:
>   - Factor out hwirq using preferred helper.
> ---

Hi Geert!

I'll pick those patches up for the next cycle to let them spend some
time in next.

Bart

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-22 20:13   ` Bartosz Golaszewski
  0 siblings, 0 replies; 14+ messages in thread
From: Bartosz Golaszewski @ 2022-05-22 20:13 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Damien Le Moal,
	Marc Zyngier, open list:GPIO SUBSYSTEM, linux-riscv

On Fri, May 20, 2022 at 12:23 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
>
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the dwapb driver:
>
>     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the dwapb driver immutable.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
>
> v2:
>   - Factor out hwirq using preferred helper.
> ---

Hi Geert!

I'll pick those patches up for the next cycle to let them spend some
time in next.

Bart

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
  2022-05-22 20:13   ` Bartosz Golaszewski
@ 2022-05-23  7:25     ` Geert Uytterhoeven
  -1 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2022-05-23  7:25 UTC (permalink / raw)
  To: Bartosz Golaszewski
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Damien Le Moal,
	Marc Zyngier, open list:GPIO SUBSYSTEM, linux-riscv

Hi Bartosz,

On Sun, May 22, 2022 at 10:13 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote:
> On Fri, May 20, 2022 at 12:23 PM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> > immutable") added a warning to indicate if the gpiolib is altering the
> > internals of irqchips.  Following this change the following warning is
> > now observed for the dwapb driver:
> >
> >     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
> >
> > Fix this by making the irqchip in the dwapb driver immutable.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > Against gpio/for-next.
> > Boot-tested on SiPEED MAiXBiT (Canaan K210).
> >
> > v2:
> >   - Factor out hwirq using preferred helper.

> I'll pick those patches up for the next cycle to let them spend some
> time in next.

"next cycle" = later PR for v5.19, I hope?
If the new warning will make it into v5.19-rc1 (commit 6c846d026d490b23
is in gpio/for-next), I think you should collect all fixes and make
sure they end up in v5.19, too.

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-23  7:25     ` Geert Uytterhoeven
  0 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2022-05-23  7:25 UTC (permalink / raw)
  To: Bartosz Golaszewski
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Damien Le Moal,
	Marc Zyngier, open list:GPIO SUBSYSTEM, linux-riscv

Hi Bartosz,

On Sun, May 22, 2022 at 10:13 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote:
> On Fri, May 20, 2022 at 12:23 PM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> > immutable") added a warning to indicate if the gpiolib is altering the
> > internals of irqchips.  Following this change the following warning is
> > now observed for the dwapb driver:
> >
> >     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
> >
> > Fix this by making the irqchip in the dwapb driver immutable.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > Against gpio/for-next.
> > Boot-tested on SiPEED MAiXBiT (Canaan K210).
> >
> > v2:
> >   - Factor out hwirq using preferred helper.

> I'll pick those patches up for the next cycle to let them spend some
> time in next.

"next cycle" = later PR for v5.19, I hope?
If the new warning will make it into v5.19-rc1 (commit 6c846d026d490b23
is in gpio/for-next), I think you should collect all fixes and make
sure they end up in v5.19, too.

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
  2022-05-23  7:25     ` Geert Uytterhoeven
@ 2022-05-23 18:56       ` Bartosz Golaszewski
  -1 siblings, 0 replies; 14+ messages in thread
From: Bartosz Golaszewski @ 2022-05-23 18:56 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Damien Le Moal,
	Marc Zyngier, open list:GPIO SUBSYSTEM, linux-riscv

On Mon, May 23, 2022 at 9:25 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Bartosz,
>
> On Sun, May 22, 2022 at 10:13 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote:
> > On Fri, May 20, 2022 at 12:23 PM Geert Uytterhoeven
> > <geert+renesas@glider.be> wrote:
> > > Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> > > immutable") added a warning to indicate if the gpiolib is altering the
> > > internals of irqchips.  Following this change the following warning is
> > > now observed for the dwapb driver:
> > >
> > >     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
> > >
> > > Fix this by making the irqchip in the dwapb driver immutable.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > ---
> > > Against gpio/for-next.
> > > Boot-tested on SiPEED MAiXBiT (Canaan K210).
> > >
> > > v2:
> > >   - Factor out hwirq using preferred helper.
>
> > I'll pick those patches up for the next cycle to let them spend some
> > time in next.
>
> "next cycle" = later PR for v5.19, I hope?
> If the new warning will make it into v5.19-rc1 (commit 6c846d026d490b23
> is in gpio/for-next), I think you should collect all fixes and make
> sure they end up in v5.19, too.
>

Ah you're right, sorry, yeah I will pick those up now.

Bart

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2] gpio: dwapb: Make the irqchip immutable
@ 2022-05-23 18:56       ` Bartosz Golaszewski
  0 siblings, 0 replies; 14+ messages in thread
From: Bartosz Golaszewski @ 2022-05-23 18:56 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Hoan Tran, Serge Semin, Linus Walleij, Damien Le Moal,
	Marc Zyngier, open list:GPIO SUBSYSTEM, linux-riscv

On Mon, May 23, 2022 at 9:25 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Bartosz,
>
> On Sun, May 22, 2022 at 10:13 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote:
> > On Fri, May 20, 2022 at 12:23 PM Geert Uytterhoeven
> > <geert+renesas@glider.be> wrote:
> > > Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> > > immutable") added a warning to indicate if the gpiolib is altering the
> > > internals of irqchips.  Following this change the following warning is
> > > now observed for the dwapb driver:
> > >
> > >     gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!
> > >
> > > Fix this by making the irqchip in the dwapb driver immutable.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > ---
> > > Against gpio/for-next.
> > > Boot-tested on SiPEED MAiXBiT (Canaan K210).
> > >
> > > v2:
> > >   - Factor out hwirq using preferred helper.
>
> > I'll pick those patches up for the next cycle to let them spend some
> > time in next.
>
> "next cycle" = later PR for v5.19, I hope?
> If the new warning will make it into v5.19-rc1 (commit 6c846d026d490b23
> is in gpio/for-next), I think you should collect all fixes and make
> sure they end up in v5.19, too.
>

Ah you're right, sorry, yeah I will pick those up now.

Bart

^ permalink raw reply	[flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-05-23 19:21 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-20 10:23 [PATCH v2] gpio: dwapb: Make the irqchip immutable Geert Uytterhoeven
2022-05-20 10:23 ` Geert Uytterhoeven
2022-05-20 23:40 ` Damien Le Moal
2022-05-20 23:40   ` Damien Le Moal
2022-05-21 17:29 ` Andy Shevchenko
2022-05-21 17:29   ` Andy Shevchenko
2022-05-21 17:29 ` Andy Shevchenko
2022-05-21 17:29   ` Andy Shevchenko
2022-05-22 20:13 ` Bartosz Golaszewski
2022-05-22 20:13   ` Bartosz Golaszewski
2022-05-23  7:25   ` Geert Uytterhoeven
2022-05-23  7:25     ` Geert Uytterhoeven
2022-05-23 18:56     ` Bartosz Golaszewski
2022-05-23 18:56       ` Bartosz Golaszewski

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.