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* [PATCH] drm/i915/gen9: Check for DC state mismatch
@ 2016-02-11  9:40 Patrik Jakobsson
  2016-02-11 10:43 ` Mika Kuoppala
  2016-02-15 14:36 ` ✗ Fi.CI.BAT: warning for " Patchwork
  0 siblings, 2 replies; 6+ messages in thread
From: Patrik Jakobsson @ 2016-02-11  9:40 UTC (permalink / raw)
  To: intel-gfx, mika.kuoppala, rodrigo.vivi

The DMC can incorrectly run off and allow DC states on it's own. We
don't know the root-cause for this yet but this patch makes it more
visible.

Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         | 1 +
 drivers/gpu/drm/i915/intel_csr.c        | 2 ++
 drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
 3 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e11eef1..7e33454 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -746,6 +746,7 @@ struct intel_csr {
 	uint32_t mmio_count;
 	i915_reg_t mmioaddr[8];
 	uint32_t mmiodata[8];
+	uint32_t dc_state;
 };
 
 #define DEV_INFO_FOR_EACH_FLAG(func, sep) \
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 2a7ec31..b453fcc 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -243,6 +243,8 @@ void intel_csr_load_program(struct drm_i915_private *dev_priv)
 		I915_WRITE(dev_priv->csr.mmioaddr[i],
 			   dev_priv->csr.mmiodata[i]);
 	}
+
+	dev_priv->csr.dc_state = 0;
 }
 
 static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index bbca527..e79674b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -494,10 +494,18 @@ static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state)
 	val = I915_READ(DC_STATE_EN);
 	DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
 		      val & mask, state);
+
+	/* Check if DMC is ignoring our DC state requests */
+	if ((val & mask) != dev_priv->csr.dc_state)
+		DRM_ERROR("DC state mismatch (0x%x -> 0x%x)\n",
+			  dev_priv->csr.dc_state, val & mask);
+
 	val &= ~mask;
 	val |= state;
 	I915_WRITE(DC_STATE_EN, val);
 	POSTING_READ(DC_STATE_EN);
+
+	dev_priv->csr.dc_state = val & mask;
 }
 
 void bxt_enable_dc9(struct drm_i915_private *dev_priv)
-- 
2.5.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915/gen9: Check for DC state mismatch
  2016-02-11  9:40 [PATCH] drm/i915/gen9: Check for DC state mismatch Patrik Jakobsson
@ 2016-02-11 10:43 ` Mika Kuoppala
  2016-02-18  0:16   ` Vivi, Rodrigo
  2016-02-15 14:36 ` ✗ Fi.CI.BAT: warning for " Patchwork
  1 sibling, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2016-02-11 10:43 UTC (permalink / raw)
  To: Patrik Jakobsson, intel-gfx, rodrigo.vivi

Patrik Jakobsson <patrik.jakobsson@linux.intel.com> writes:

> The DMC can incorrectly run off and allow DC states on it's own. We
> don't know the root-cause for this yet but this patch makes it more
> visible.
>
> Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>

Yes, we definitely need much more state checking and hardening
in this area.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>


> ---
>  drivers/gpu/drm/i915/i915_drv.h         | 1 +
>  drivers/gpu/drm/i915/intel_csr.c        | 2 ++
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
>  3 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e11eef1..7e33454 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -746,6 +746,7 @@ struct intel_csr {
>  	uint32_t mmio_count;
>  	i915_reg_t mmioaddr[8];
>  	uint32_t mmiodata[8];
> +	uint32_t dc_state;
>  };
>  
>  #define DEV_INFO_FOR_EACH_FLAG(func, sep) \
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index 2a7ec31..b453fcc 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -243,6 +243,8 @@ void intel_csr_load_program(struct drm_i915_private *dev_priv)
>  		I915_WRITE(dev_priv->csr.mmioaddr[i],
>  			   dev_priv->csr.mmiodata[i]);
>  	}
> +
> +	dev_priv->csr.dc_state = 0;
>  }
>  
>  static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index bbca527..e79674b 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -494,10 +494,18 @@ static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state)
>  	val = I915_READ(DC_STATE_EN);
>  	DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
>  		      val & mask, state);
> +
> +	/* Check if DMC is ignoring our DC state requests */
> +	if ((val & mask) != dev_priv->csr.dc_state)
> +		DRM_ERROR("DC state mismatch (0x%x -> 0x%x)\n",
> +			  dev_priv->csr.dc_state, val & mask);
> +
>  	val &= ~mask;
>  	val |= state;
>  	I915_WRITE(DC_STATE_EN, val);
>  	POSTING_READ(DC_STATE_EN);
> +
> +	dev_priv->csr.dc_state = val & mask;
>  }
>  
>  void bxt_enable_dc9(struct drm_i915_private *dev_priv)
> -- 
> 2.5.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✗ Fi.CI.BAT: warning for drm/i915/gen9: Check for DC state mismatch
  2016-02-11  9:40 [PATCH] drm/i915/gen9: Check for DC state mismatch Patrik Jakobsson
  2016-02-11 10:43 ` Mika Kuoppala
@ 2016-02-15 14:36 ` Patchwork
  1 sibling, 0 replies; 6+ messages in thread
From: Patchwork @ 2016-02-15 14:36 UTC (permalink / raw)
  To: Patrik Jakobsson; +Cc: intel-gfx

== Summary ==

Series 3276v1 drm/i915/gen9: Check for DC state mismatch
http://patchwork.freedesktop.org/api/1.0/series/3276/revisions/1/mbox/

Test drv_module_reload_basic:
                pass       -> DMESG-WARN (ilk-hp8440p)
Test gem_mmap_gtt:
        Subgroup basic-small-copy:
                pass       -> DMESG-WARN (ilk-hp8440p)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> DMESG-WARN (skl-i5k-2)
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (skl-i5k-2)
        Subgroup suspend-read-crc-pipe-c:
                pass       -> SKIP       (hsw-gt2)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                fail       -> PASS       (bdw-nuci7)

bdw-nuci7        total:162  pass:152  dwarn:0   dfail:0   fail:0   skip:10 
bdw-ultra        total:165  pass:152  dwarn:0   dfail:0   fail:0   skip:13 
bsw-nuc-2        total:165  pass:134  dwarn:2   dfail:0   fail:0   skip:29 
byt-nuc          total:165  pass:141  dwarn:0   dfail:0   fail:0   skip:24 
hsw-brixbox      total:165  pass:151  dwarn:0   dfail:0   fail:0   skip:14 
hsw-gt2          total:165  pass:153  dwarn:0   dfail:0   fail:1   skip:11 
ilk-hp8440p      total:165  pass:114  dwarn:2   dfail:0   fail:1   skip:48 
ivb-t430s        total:165  pass:150  dwarn:0   dfail:0   fail:1   skip:14 
skl-i5k-2        total:165  pass:149  dwarn:1   dfail:0   fail:0   skip:15 
snb-dellxps      total:165  pass:142  dwarn:0   dfail:0   fail:1   skip:22 
snb-x220t        total:165  pass:142  dwarn:0   dfail:0   fail:2   skip:21 

Results at /archive/results/CI_IGT_test/Patchwork_1393/

f2110d8eac120416f8f5669f2aa561d9ab330a77 drm-intel-nightly: 2016y-02m-15d-09h-53m-04s UTC integration manifest
6bbe421b1a4cf2afe5519bf2ad297436c04144f0 drm/i915/gen9: Check for DC state mismatch

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915/gen9: Check for DC state mismatch
  2016-02-11 10:43 ` Mika Kuoppala
@ 2016-02-18  0:16   ` Vivi, Rodrigo
  2016-02-18 10:22     ` Patrik Jakobsson
  0 siblings, 1 reply; 6+ messages in thread
From: Vivi, Rodrigo @ 2016-02-18  0:16 UTC (permalink / raw)
  To: mika.kuoppala, intel-gfx, patrik.jakobsson; +Cc: daniel.vetter

I was going to merge here but I saw on patchwork we got some warnings
so I'm not sure they are only false positives or this is exactly what
this patches wants...

On Thu, 2016-02-11 at 12:43 +0200, Mika Kuoppala wrote:
> Patrik Jakobsson <patrik.jakobsson@linux.intel.com> writes:
> 
> > The DMC can incorrectly run off and allow DC states on it's own. We
> > don't know the root-cause for this yet but this patch makes it more
> > visible.
> > 
> > Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
> 
> Yes, we definitely need much more state checking and hardening
> in this area.
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> 
> 
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h         | 1 +
> >  drivers/gpu/drm/i915/intel_csr.c        | 2 ++
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
> >  3 files changed, 11 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index e11eef1..7e33454 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -746,6 +746,7 @@ struct intel_csr {
> >  	uint32_t mmio_count;
> >  	i915_reg_t mmioaddr[8];
> >  	uint32_t mmiodata[8];
> > +	uint32_t dc_state;
> >  };
> >  
> >  #define DEV_INFO_FOR_EACH_FLAG(func, sep) \
> > diff --git a/drivers/gpu/drm/i915/intel_csr.c 
> > b/drivers/gpu/drm/i915/intel_csr.c
> > index 2a7ec31..b453fcc 100644
> > --- a/drivers/gpu/drm/i915/intel_csr.c
> > +++ b/drivers/gpu/drm/i915/intel_csr.c
> > @@ -243,6 +243,8 @@ void intel_csr_load_program(struct 
> > drm_i915_private *dev_priv)
> >  		I915_WRITE(dev_priv->csr.mmioaddr[i],
> >  			   dev_priv->csr.mmiodata[i]);
> >  	}
> > +
> > +	dev_priv->csr.dc_state = 0;
> >  }
> >  
> >  static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index bbca527..e79674b 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -494,10 +494,18 @@ static void gen9_set_dc_state(struct 
> > drm_i915_private *dev_priv, uint32_t state)
> >  	val = I915_READ(DC_STATE_EN);
> >  	DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
> >  		      val & mask, state);
> > +
> > +	/* Check if DMC is ignoring our DC state requests */
> > +	if ((val & mask) != dev_priv->csr.dc_state)
> > +		DRM_ERROR("DC state mismatch (0x%x -> 0x%x)\n",
> > +			  dev_priv->csr.dc_state, val & mask);
> > +
> >  	val &= ~mask;
> >  	val |= state;
> >  	I915_WRITE(DC_STATE_EN, val);
> >  	POSTING_READ(DC_STATE_EN);
> > +
> > +	dev_priv->csr.dc_state = val & mask;
> >  }
> >  
> >  void bxt_enable_dc9(struct drm_i915_private *dev_priv)
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915/gen9: Check for DC state mismatch
  2016-02-18  0:16   ` Vivi, Rodrigo
@ 2016-02-18 10:22     ` Patrik Jakobsson
  2016-02-18 12:24       ` Patrik Jakobsson
  0 siblings, 1 reply; 6+ messages in thread
From: Patrik Jakobsson @ 2016-02-18 10:22 UTC (permalink / raw)
  To: Vivi, Rodrigo; +Cc: intel-gfx, daniel.vetter

On Thu, Feb 18, 2016 at 12:16:40AM +0000, Vivi, Rodrigo wrote:
> I was going to merge here but I saw on patchwork we got some warnings
> so I'm not sure they are only false positives or this is exactly what
> this patches wants...

They are unfortunately not false positives. The question is if it's ok
to clutter CI results with known errors or not? Together with Mika's and
Imre's patches we shouldn't be seeing this but if we do we know we're
not out of the deep water yet. Perhaps we can wait with this patch until
the others are merged?

-Patrik

> 
> On Thu, 2016-02-11 at 12:43 +0200, Mika Kuoppala wrote:
> > Patrik Jakobsson <patrik.jakobsson@linux.intel.com> writes:
> > 
> > > The DMC can incorrectly run off and allow DC states on it's own. We
> > > don't know the root-cause for this yet but this patch makes it more
> > > visible.
> > > 
> > > Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
> > 
> > Yes, we definitely need much more state checking and hardening
> > in this area.
> > 
> > Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> > 
> > 
> > > ---
> > >  drivers/gpu/drm/i915/i915_drv.h         | 1 +
> > >  drivers/gpu/drm/i915/intel_csr.c        | 2 ++
> > >  drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
> > >  3 files changed, 11 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > > b/drivers/gpu/drm/i915/i915_drv.h
> > > index e11eef1..7e33454 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -746,6 +746,7 @@ struct intel_csr {
> > >  	uint32_t mmio_count;
> > >  	i915_reg_t mmioaddr[8];
> > >  	uint32_t mmiodata[8];
> > > +	uint32_t dc_state;
> > >  };
> > >  
> > >  #define DEV_INFO_FOR_EACH_FLAG(func, sep) \
> > > diff --git a/drivers/gpu/drm/i915/intel_csr.c 
> > > b/drivers/gpu/drm/i915/intel_csr.c
> > > index 2a7ec31..b453fcc 100644
> > > --- a/drivers/gpu/drm/i915/intel_csr.c
> > > +++ b/drivers/gpu/drm/i915/intel_csr.c
> > > @@ -243,6 +243,8 @@ void intel_csr_load_program(struct 
> > > drm_i915_private *dev_priv)
> > >  		I915_WRITE(dev_priv->csr.mmioaddr[i],
> > >  			   dev_priv->csr.mmiodata[i]);
> > >  	}
> > > +
> > > +	dev_priv->csr.dc_state = 0;
> > >  }
> > >  
> > >  static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> > > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index bbca527..e79674b 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > @@ -494,10 +494,18 @@ static void gen9_set_dc_state(struct 
> > > drm_i915_private *dev_priv, uint32_t state)
> > >  	val = I915_READ(DC_STATE_EN);
> > >  	DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
> > >  		      val & mask, state);
> > > +
> > > +	/* Check if DMC is ignoring our DC state requests */
> > > +	if ((val & mask) != dev_priv->csr.dc_state)
> > > +		DRM_ERROR("DC state mismatch (0x%x -> 0x%x)\n",
> > > +			  dev_priv->csr.dc_state, val & mask);
> > > +
> > >  	val &= ~mask;
> > >  	val |= state;
> > >  	I915_WRITE(DC_STATE_EN, val);
> > >  	POSTING_READ(DC_STATE_EN);
> > > +
> > > +	dev_priv->csr.dc_state = val & mask;
> > >  }
> > >  
> > >  void bxt_enable_dc9(struct drm_i915_private *dev_priv)

-- 
---
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_______________________________________________
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915/gen9: Check for DC state mismatch
  2016-02-18 10:22     ` Patrik Jakobsson
@ 2016-02-18 12:24       ` Patrik Jakobsson
  0 siblings, 0 replies; 6+ messages in thread
From: Patrik Jakobsson @ 2016-02-18 12:24 UTC (permalink / raw)
  To: Vivi, Rodrigo, mika.kuoppala, intel-gfx, daniel.vetter

On Thu, Feb 18, 2016 at 11:22 AM, Patrik Jakobsson
<patrik.jakobsson@linux.intel.com> wrote:
> On Thu, Feb 18, 2016 at 12:16:40AM +0000, Vivi, Rodrigo wrote:
>> I was going to merge here but I saw on patchwork we got some warnings
>> so I'm not sure they are only false positives or this is exactly what
>> this patches wants...
>
> They are unfortunately not false positives. The question is if it's ok
> to clutter CI results with known errors or not? Together with Mika's and
> Imre's patches we shouldn't be seeing this but if we do we know we're
> not out of the deep water yet. Perhaps we can wait with this patch until
> the others are merged?
>
> -Patrik

I just tested Mika's tree (with all the required patches included) and
I see no "DC state mismatch" errors. If we wait with this one until
they are merged we wont unnecessarily clutter CI.

>
>>
>> On Thu, 2016-02-11 at 12:43 +0200, Mika Kuoppala wrote:
>> > Patrik Jakobsson <patrik.jakobsson@linux.intel.com> writes:
>> >
>> > > The DMC can incorrectly run off and allow DC states on it's own. We
>> > > don't know the root-cause for this yet but this patch makes it more
>> > > visible.
>> > >
>> > > Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
>> >
>> > Yes, we definitely need much more state checking and hardening
>> > in this area.
>> >
>> > Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
>> >
>> >
>> > > ---
>> > >  drivers/gpu/drm/i915/i915_drv.h         | 1 +
>> > >  drivers/gpu/drm/i915/intel_csr.c        | 2 ++
>> > >  drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++
>> > >  3 files changed, 11 insertions(+)
>> > >
>> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> > > b/drivers/gpu/drm/i915/i915_drv.h
>> > > index e11eef1..7e33454 100644
>> > > --- a/drivers/gpu/drm/i915/i915_drv.h
>> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
>> > > @@ -746,6 +746,7 @@ struct intel_csr {
>> > >   uint32_t mmio_count;
>> > >   i915_reg_t mmioaddr[8];
>> > >   uint32_t mmiodata[8];
>> > > + uint32_t dc_state;
>> > >  };
>> > >
>> > >  #define DEV_INFO_FOR_EACH_FLAG(func, sep) \
>> > > diff --git a/drivers/gpu/drm/i915/intel_csr.c
>> > > b/drivers/gpu/drm/i915/intel_csr.c
>> > > index 2a7ec31..b453fcc 100644
>> > > --- a/drivers/gpu/drm/i915/intel_csr.c
>> > > +++ b/drivers/gpu/drm/i915/intel_csr.c
>> > > @@ -243,6 +243,8 @@ void intel_csr_load_program(struct
>> > > drm_i915_private *dev_priv)
>> > >           I915_WRITE(dev_priv->csr.mmioaddr[i],
>> > >                      dev_priv->csr.mmiodata[i]);
>> > >   }
>> > > +
>> > > + dev_priv->csr.dc_state = 0;
>> > >  }
>> > >
>> > >  static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
>> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > > b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > > index bbca527..e79674b 100644
>> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > > @@ -494,10 +494,18 @@ static void gen9_set_dc_state(struct
>> > > drm_i915_private *dev_priv, uint32_t state)
>> > >   val = I915_READ(DC_STATE_EN);
>> > >   DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",
>> > >                 val & mask, state);
>> > > +
>> > > + /* Check if DMC is ignoring our DC state requests */
>> > > + if ((val & mask) != dev_priv->csr.dc_state)
>> > > +         DRM_ERROR("DC state mismatch (0x%x -> 0x%x)\n",
>> > > +                   dev_priv->csr.dc_state, val & mask);
>> > > +
>> > >   val &= ~mask;
>> > >   val |= state;
>> > >   I915_WRITE(DC_STATE_EN, val);
>> > >   POSTING_READ(DC_STATE_EN);
>> > > +
>> > > + dev_priv->csr.dc_state = val & mask;
>> > >  }
>> > >
>> > >  void bxt_enable_dc9(struct drm_i915_private *dev_priv)
>
> --
> ---
> Intel Sweden AB Registered Office: Knarrarnasgatan 15, 164 40 Kista, Stockholm, Sweden Registration Number: 556189-6027
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2016-02-18 12:24 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-02-11  9:40 [PATCH] drm/i915/gen9: Check for DC state mismatch Patrik Jakobsson
2016-02-11 10:43 ` Mika Kuoppala
2016-02-18  0:16   ` Vivi, Rodrigo
2016-02-18 10:22     ` Patrik Jakobsson
2016-02-18 12:24       ` Patrik Jakobsson
2016-02-15 14:36 ` ✗ Fi.CI.BAT: warning for " Patchwork

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