[U-Boot] [PATCH 1/2] sun8i_emac: add support for setting EMAC TX/RX delay

[U-Boot] [PATCH 1/2] sun8i_emac: add support for setting EMAC TX/RX delay

[Alexander Weidinger]

From: Icenowy Zheng <icenowy@aosc.io>

Some boards have the EMAC TX/RX lanes wired with a different length with
the clock lane, which can be workarounded by setting a TX/RX delay in
the EMAC.

This kind of delays are already defined in the newest device tree
binding of dwmac-sun8i, which has already entered linux-next.

Add support for setting these delays.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 drivers/net/sun8i_emac.c | 31 +++++++++++++++++++++++++++++--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 3ba3a1ff8b..230ff045d5 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -60,6 +60,10 @@
 #define SC_ETCS_MASK		GENMASK(1, 0)
 #define SC_ETCS_EXT_GMII	0x1
 #define SC_ETCS_INT_GMII	0x2
+#define SC_ETXDC_MASK		GENMASK(12, 10)
+#define SC_ETXDC_OFFSET		10
+#define SC_ERXDC_MASK		GENMASK(9, 5)
+#define SC_ERXDC_OFFSET		5
 
 #define CONFIG_MDIO_TIMEOUT	(3 * CONFIG_SYS_HZ)
 
@@ -140,6 +144,8 @@ struct emac_eth_dev {
 struct sun8i_eth_pdata {
 	struct eth_pdata eth_pdata;
 	u32 reset_delays[3];
+	int tx_delay_ps;
+	int rx_delay_ps;
 };
 
 
@@ -273,7 +279,8 @@ static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg)
 	return 0;
 }
 
-static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
+static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
+				 struct emac_eth_dev *priv)
 {
 	int ret;
 	u32 reg;
@@ -312,6 +319,14 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
 		return -EINVAL;
 	}
 
+	if (pdata->tx_delay_ps)
+		reg |= ((pdata->tx_delay_ps / 100) << SC_ETXDC_OFFSET)
+			 & SC_ETXDC_MASK;
+
+	if (pdata->rx_delay_ps)
+		reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET)
+			 & SC_ERXDC_MASK;
+
 	writel(reg, priv->sysctl_reg + 0x30);
 
 	return 0;
@@ -790,7 +805,7 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
 	priv->mac_reg = (void *)pdata->iobase;
 
 	sun8i_emac_board_setup(priv);
-	sun8i_emac_set_syscon(priv);
+	sun8i_emac_set_syscon((struct sun8i_eth_pdata *)pdata, priv);
 
 	sun8i_mdio_init(dev->name, dev);
 	priv->bus = miiphy_get_dev_by_name(dev->name);
@@ -891,6 +906,18 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
 	if (!priv->use_internal_phy)
 		parse_phy_pins(dev);
 
+	sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
+						  "allwinner,tx-delay-ps", 0);
+	if (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700)
+		printf("%s: Invalid TX delay value %d\n", __func__,
+		       sun8i_pdata->tx_delay_ps);
+
+	sun8i_pdata->rx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
+						  "allwinner,rx-delay-ps", 0);
+	if (sun8i_pdata->rx_delay_ps < 0 || sun8i_pdata->rx_delay_ps > 3100)
+		printf("%s: Invalid RX delay value %d\n", __func__,
+		       sun8i_pdata->rx_delay_ps);
+
 #ifdef CONFIG_DM_GPIO
 	if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
 			    "snps,reset-active-low"))
-- 
2.19.1

[U-Boot] [PATCH 2/2] enable EMAC for A64-OLinuXino

[Alexander Weidinger]

Add Ethernet nodes to OLinuXino DT to enable Gigabit Ethernet
[ commit 21eac6f33e68ae778e9d1c910606452abf058d3d in Linux ]

Set PHY TX delay of 600ps
[ commit 679294497be31596e1c9c61507746d72b6b05f26 in Linux ]

Signed-off-by: Alexander Weidinger <alexander.weidinger@tum.de>
---
 arch/arm/dts/sun50i-a64-olinuxino.dts | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
index 3b3081b10e..d29695a7d0 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
@@ -51,6 +51,7 @@
 	compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 	};
 
@@ -64,6 +65,23 @@
 	};
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_dcdc1>;
+	allwinner,tx-delay-ps = <600>;
+	status = "okay";
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-- 
2.19.1

[U-Boot] [PATCH 2/2] enable EMAC for A64-OLinuXino

[Jagan Teki]

On Fri, Nov 16, 2018 at 9:09 PM Alexander Weidinger
<alexander.weidinger@tum.de> wrote:
>
> Add Ethernet nodes to OLinuXino DT to enable Gigabit Ethernet
> [ commit 21eac6f33e68ae778e9d1c910606452abf058d3d in Linux ]
>
> Set PHY TX delay of 600ps
> [ commit 679294497be31596e1c9c61507746d72b6b05f26 in Linux ]
>
> Signed-off-by: Alexander Weidinger <alexander.weidinger@tum.de>
> ---

Reviewed-by: Jagan Teki <jagan@openedev.com>

[U-Boot] [PATCH 1/2] sun8i_emac: add support for setting EMAC TX/RX delay

[Jagan Teki]

On Fri, Nov 16, 2018 at 9:08 PM Alexander Weidinger
<alexander.weidinger@tum.de> wrote:
>
> From: Icenowy Zheng <icenowy@aosc.io>
>
> Some boards have the EMAC TX/RX lanes wired with a different length with
> the clock lane, which can be workarounded by setting a TX/RX delay in
> the EMAC.
>
> This kind of delays are already defined in the newest device tree
> binding of dwmac-sun8i, which has already entered linux-next.
>
> Add support for setting these delays.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/net/sun8i_emac.c | 31 +++++++++++++++++++++++++++++--
>  1 file changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
> index 3ba3a1ff8b..230ff045d5 100644
> --- a/drivers/net/sun8i_emac.c
> +++ b/drivers/net/sun8i_emac.c
> @@ -60,6 +60,10 @@
>  #define SC_ETCS_MASK           GENMASK(1, 0)
>  #define SC_ETCS_EXT_GMII       0x1
>  #define SC_ETCS_INT_GMII       0x2
> +#define SC_ETXDC_MASK          GENMASK(12, 10)
> +#define SC_ETXDC_OFFSET                10
> +#define SC_ERXDC_MASK          GENMASK(9, 5)
> +#define SC_ERXDC_OFFSET                5
>
>  #define CONFIG_MDIO_TIMEOUT    (3 * CONFIG_SYS_HZ)
>
> @@ -140,6 +144,8 @@ struct emac_eth_dev {
>  struct sun8i_eth_pdata {
>         struct eth_pdata eth_pdata;
>         u32 reset_delays[3];
> +       int tx_delay_ps;
> +       int rx_delay_ps;
>  };
>
>
> @@ -273,7 +279,8 @@ static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg)
>         return 0;
>  }
>
> -static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
> +static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
> +                                struct emac_eth_dev *priv)
>  {
>         int ret;
>         u32 reg;
> @@ -312,6 +319,14 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
>                 return -EINVAL;
>         }
>
> +       if (pdata->tx_delay_ps)
> +               reg |= ((pdata->tx_delay_ps / 100) << SC_ETXDC_OFFSET)
> +                        & SC_ETXDC_MASK;
> +
> +       if (pdata->rx_delay_ps)
> +               reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET)
> +                        & SC_ERXDC_MASK;
> +
>         writel(reg, priv->sysctl_reg + 0x30);
>
>         return 0;
> @@ -790,7 +805,7 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
>         priv->mac_reg = (void *)pdata->iobase;
>
>         sun8i_emac_board_setup(priv);
> -       sun8i_emac_set_syscon(priv);
> +       sun8i_emac_set_syscon((struct sun8i_eth_pdata *)pdata, priv);

We can get the platdata using dev_get_platdata instead of this type casting.

[U-Boot] [PATCH v2] sun8i_emac: add support for setting EMAC TX/RX delay

[Alexander Weidinger]

From: Icenowy Zheng <icenowy@aosc.io>

Some boards have the EMAC TX/RX lanes wired with a different length with
the clock lane, which can be workarounded by setting a TX/RX delay in
the EMAC.

This kind of delays are already defined in the newest device tree
binding of dwmac-sun8i, which has already entered linux-next.

Add support for setting these delays.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
Changes for v2:
	- Make use of `dev_get_platdata` instead of type casting
	- Patch 2/2 is superseded [ commit 1b39a1834ed182bbd8036a5cd74a9ea111fa4691 ]

 drivers/net/sun8i_emac.c | 34 +++++++++++++++++++++++++++++++---
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 3ba3a1ff8b..c9798445c7 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -60,6 +60,10 @@
 #define SC_ETCS_MASK		GENMASK(1, 0)
 #define SC_ETCS_EXT_GMII	0x1
 #define SC_ETCS_INT_GMII	0x2
+#define SC_ETXDC_MASK		GENMASK(12, 10)
+#define SC_ETXDC_OFFSET		10
+#define SC_ERXDC_MASK		GENMASK(9, 5)
+#define SC_ERXDC_OFFSET		5
 
 #define CONFIG_MDIO_TIMEOUT	(3 * CONFIG_SYS_HZ)
 
@@ -140,6 +144,8 @@ struct emac_eth_dev {
 struct sun8i_eth_pdata {
 	struct eth_pdata eth_pdata;
 	u32 reset_delays[3];
+	int tx_delay_ps;
+	int rx_delay_ps;
 };
 
 
@@ -273,7 +279,8 @@ static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg)
 	return 0;
 }
 
-static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
+static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
+				 struct emac_eth_dev *priv)
 {
 	int ret;
 	u32 reg;
@@ -312,6 +319,14 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
 		return -EINVAL;
 	}
 
+	if (pdata->tx_delay_ps)
+		reg |= ((pdata->tx_delay_ps / 100) << SC_ETXDC_OFFSET)
+			 & SC_ETXDC_MASK;
+
+	if (pdata->rx_delay_ps)
+		reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET)
+			 & SC_ERXDC_MASK;
+
 	writel(reg, priv->sysctl_reg + 0x30);
 
 	return 0;
@@ -784,13 +799,14 @@ static void sun8i_emac_eth_stop(struct udevice *dev)
 
 static int sun8i_emac_eth_probe(struct udevice *dev)
 {
-	struct eth_pdata *pdata = dev_get_platdata(dev);
+	struct sun8i_eth_pdata *sun8i_pdata = dev_get_platdata(dev);
+	struct eth_pdata *pdata = &sun8i_pdata->eth_pdata;
 	struct emac_eth_dev *priv = dev_get_priv(dev);
 
 	priv->mac_reg = (void *)pdata->iobase;
 
 	sun8i_emac_board_setup(priv);
-	sun8i_emac_set_syscon(priv);
+	sun8i_emac_set_syscon(sun8i_pdata, priv);
 
 	sun8i_mdio_init(dev->name, dev);
 	priv->bus = miiphy_get_dev_by_name(dev->name);
@@ -891,6 +907,18 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
 	if (!priv->use_internal_phy)
 		parse_phy_pins(dev);
 
+	sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
+						  "allwinner,tx-delay-ps", 0);
+	if (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700)
+		printf("%s: Invalid TX delay value %d\n", __func__,
+		       sun8i_pdata->tx_delay_ps);
+
+	sun8i_pdata->rx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
+						  "allwinner,rx-delay-ps", 0);
+	if (sun8i_pdata->rx_delay_ps < 0 || sun8i_pdata->rx_delay_ps > 3100)
+		printf("%s: Invalid RX delay value %d\n", __func__,
+		       sun8i_pdata->rx_delay_ps);
+
 #ifdef CONFIG_DM_GPIO
 	if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
 			    "snps,reset-active-low"))
-- 
2.19.1

[U-Boot] [PATCH v2] sun8i_emac: add support for setting EMAC TX/RX delay

[Jagan Teki]

On Fri, Nov 23, 2018 at 5:08 AM Alexander Weidinger
<alexander.weidinger@tum.de> wrote:
>
> From: Icenowy Zheng <icenowy@aosc.io>
>
> Some boards have the EMAC TX/RX lanes wired with a different length with
> the clock lane, which can be workarounded by setting a TX/RX delay in
> the EMAC.
>
> This kind of delays are already defined in the newest device tree
> binding of dwmac-sun8i, which has already entered linux-next.
>
> Add support for setting these delays.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---

Note, that the DT patch for emac enable is already synced, check it on master.

Reviewed-by: Jagan Teki <jagan@openedev.com>

Applied to u-boot-sunxi/master

[U-Boot] [PATCH v2] sun8i_emac: add support for setting EMAC TX/RX delay

[Alexander Weidinger]

On 23.11.18 06:34, Jagan Teki wrote:
> Note, that the DT patch for emac enable is already synced, check it on master.
Saw it while updating the patch with the requested change.
I made a note about this in the change description
and only send one patch in the v2 version of this series.

I'm a first time contributor to U-Boot, so I hope I did this correctly.