* [PATCH v2 0/16] ARM: r8a7790: add soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Hi,
this patchset adds an soc node, moves all nodes for IP blocks with an
address on the bus to be sub nodes of the soc node, and sorts subnodes of
the root and soc nodes.
The use of an soc node is consistent with handling of R-Car Gen3, RZ/G1,
and R-Car V2H (R8A77920) SoCs upstream. This patch-set adds it for all
other R-Car Gen2 SoCs: r8a7790 (H2), r8a7791 (M2-W), r8a7793 (M2-N),
r8a7794 (E2).
Sorting of nodes is also done for the R-Car V2H (R8A77920), making it
consistent across all R-Car Gen2 SoCs and thus allowing easier comparison
of DTs of different R-Car Gen2 SoCs.
The patchset also fixes some minor whitespace problems.
Based on renesas-devel-20180116-v4.15-rc8.
Tested on r8a7790 (H2) / Lager, r8a7791 (M2-W) / Koelsch and
r8a7794 (E2)/ Alt.
As this patchset contains patches with large numbers of lines changed I
have also pushed it to the topic/rcar-gen2-soc-node branch of my renesas
tree on kernel.org.
Simon Horman (16):
ARM: dts: r8a7790: consistently use single space after =
ARM: dts: r8a7790: add soc node
ARM: dts: r8a7790: sort subnodes of soc node
ARM: dts: r8a7790: sort subnodes of root node
ARM: dts: r8a7791: consistently use single space after =
ARM: dts: r8a7791: add soc node
ARM: dts: r8a7791: sort subnodes of root node
ARM: dts: r8a7792: sort subnodes of soc node
ARM: dts: r8a7793: consistently use single space after =
ARM: dts: r8a7793: add soc node
ARM: dts: r8a7793: sort subnodes of soc node
ARM: dts: r8a7793: sort subnodes of root node
ARM: dts: r8a7794: consistently use single space after =
ARM: dts: r8a7794: add soc node
ARM: dts: r8a7794: sort subnodes of soc node
ARM: dts: r8a7794: sort subnodes of root node
arch/arm/boot/dts/r8a7790.dtsi | 2837 +++++++++++++++++++-------------------
arch/arm/boot/dts/r8a7791.dtsi | 2986 ++++++++++++++++++++--------------------
arch/arm/boot/dts/r8a7792.dtsi | 498 +++----
arch/arm/boot/dts/r8a7793.dtsi | 2392 ++++++++++++++++----------------
arch/arm/boot/dts/r8a7794.dtsi | 2421 ++++++++++++++++----------------
5 files changed, 5694 insertions(+), 5440 deletions(-)
--
2.11.0
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 0/16] ARM: r8a7790: add soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
this patchset adds an soc node, moves all nodes for IP blocks with an
address on the bus to be sub nodes of the soc node, and sorts subnodes of
the root and soc nodes.
The use of an soc node is consistent with handling of R-Car Gen3, RZ/G1,
and R-Car V2H (R8A77920) SoCs upstream. This patch-set adds it for all
other R-Car Gen2 SoCs: r8a7790 (H2), r8a7791 (M2-W), r8a7793 (M2-N),
r8a7794 (E2).
Sorting of nodes is also done for the R-Car V2H (R8A77920), making it
consistent across all R-Car Gen2 SoCs and thus allowing easier comparison
of DTs of different R-Car Gen2 SoCs.
The patchset also fixes some minor whitespace problems.
Based on renesas-devel-20180116-v4.15-rc8.
Tested on r8a7790 (H2) / Lager, r8a7791 (M2-W) / Koelsch and
r8a7794 (E2)/ Alt.
As this patchset contains patches with large numbers of lines changed I
have also pushed it to the topic/rcar-gen2-soc-node branch of my renesas
tree on kernel.org.
Simon Horman (16):
ARM: dts: r8a7790: consistently use single space after =
ARM: dts: r8a7790: add soc node
ARM: dts: r8a7790: sort subnodes of soc node
ARM: dts: r8a7790: sort subnodes of root node
ARM: dts: r8a7791: consistently use single space after =
ARM: dts: r8a7791: add soc node
ARM: dts: r8a7791: sort subnodes of root node
ARM: dts: r8a7792: sort subnodes of soc node
ARM: dts: r8a7793: consistently use single space after =
ARM: dts: r8a7793: add soc node
ARM: dts: r8a7793: sort subnodes of soc node
ARM: dts: r8a7793: sort subnodes of root node
ARM: dts: r8a7794: consistently use single space after =
ARM: dts: r8a7794: add soc node
ARM: dts: r8a7794: sort subnodes of soc node
ARM: dts: r8a7794: sort subnodes of root node
arch/arm/boot/dts/r8a7790.dtsi | 2837 +++++++++++++++++++-------------------
arch/arm/boot/dts/r8a7791.dtsi | 2986 ++++++++++++++++++++--------------------
arch/arm/boot/dts/r8a7792.dtsi | 498 +++----
arch/arm/boot/dts/r8a7793.dtsi | 2392 ++++++++++++++++----------------
arch/arm/boot/dts/r8a7794.dtsi | 2421 ++++++++++++++++----------------
5 files changed, 5694 insertions(+), 5440 deletions(-)
--
2.11.0
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 01/16] ARM: dts: r8a7790: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Consistently use a single space after a =.
This patch removes instances where a tab or multiple spaces are used
instead. It also avoids running over 80 columns in width in one of the
lines where whitespace is updated.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* Consistently use tabs for indentation as much as possible
---
arch/arm/boot/dts/r8a7790.dtsi | 75 +++++++++++++++++++++---------------------
1 file changed, 38 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 13926fc7abfa..b4306f7c1bbb 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -291,9 +291,9 @@
};
thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7790",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
+ compatible = "renesas,thermal-r8a7790",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
@@ -423,20 +423,20 @@
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -453,20 +453,20 @@
audma1: dma-controller@ec720000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -1437,12 +1437,13 @@
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
- compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ compatible = "renesas,rcar_sound-r8a7790",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 01/16] ARM: dts: r8a7790: consistently use single space after =
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Consistently use a single space after a =.
This patch removes instances where a tab or multiple spaces are used
instead. It also avoids running over 80 columns in width in one of the
lines where whitespace is updated.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* Consistently use tabs for indentation as much as possible
---
arch/arm/boot/dts/r8a7790.dtsi | 75 +++++++++++++++++++++---------------------
1 file changed, 38 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 13926fc7abfa..b4306f7c1bbb 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -291,9 +291,9 @@
};
thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7790",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
+ compatible = "renesas,thermal-r8a7790",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
@@ -423,20 +423,20 @@
audma0: dma-controller at ec700000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -453,20 +453,20 @@
audma1: dma-controller at ec720000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -1437,12 +1437,13 @@
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
- compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ compatible = "renesas,rcar_sound-r8a7790",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* No change
---
arch/arm/boot/dts/r8a7790.dtsi | 2794 ++++++++++++++++++++--------------------
1 file changed, 1432 insertions(+), 1362 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index b4306f7c1bbb..1f4b3a4ed287 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -17,7 +17,6 @@
/ {
compatible = "renesas,r8a7790";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -159,981 +158,1524 @@
};
};
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- thermal-sensors = <&thermal>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
- trips {
- cpu-crit {
- temperature = <95000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
- cooling-maps {
- };
+ apmu@e6151000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
};
- };
- apmu@e6151000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
- };
+ apmu@e6152000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+ };
- apmu@e6152000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
- };
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio0: gpio@e6050000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio1: gpio@e6051000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 30>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio2: gpio@e6052000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 30>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio3: gpio@e6053000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- gpio4: gpio@e6054000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- gpio5: gpio@e6055000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ thermal: thermal@e61f0000 {
+ compatible = "renesas,thermal-r8a7790",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
- thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7790",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
- };
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,r8a7790-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7790-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
- cmt0: timer@ffca0000 {
- compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ irqc0: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7790", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- cmt1: timer@e6130000 {
- compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- irqc0: interrupt-controller@e61c0000 {
- compatible = "renesas,irqc-r8a7790", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ dmac1: dma-controller@e6720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- audma0: dma-controller@ec700000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ usb_dmac0: dma-controller@e65a0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- audma1: dma-controller@ec720000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ usb_dmac1: dma-controller@e65b0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- usb_dmac0: dma-controller@e65a0000 {
- compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- usb_dmac1: dma-controller@e65b0000 {
- compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ i2c1: i2c@e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c0: i2c@e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ i2c2: i2c@e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c1: i2c@e6518000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c3: i2c@e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- i2c2: i2c@e6530000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ iic0: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
- i2c3: i2c@e6540000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ iic1: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ status = "disabled";
+ };
- iic0: i2c@e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- status = "disabled";
- };
+ iic2: i2c@e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x425>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 300>;
+ dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
+ <&dmac1 0x69>, <&dmac1 0x6a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 300>;
+ status = "disabled";
+ };
- iic1: i2c@e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- status = "disabled";
- };
+ iic3: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
- iic2: i2c@e6520000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6520000 0 0x425>;
- interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 300>;
- dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
- <&dmac1 0x69>, <&dmac1 0x6a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 300>;
- status = "disabled";
- };
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
- iic3: i2c@e60b0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- dmas = <&dmac0 0x77>, <&dmac0 0x78>,
- <&dmac1 0x77>, <&dmac1 0x78>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- status = "disabled";
- };
+ mmcif1: mmc@ee220000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 305>;
+ dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
+ <&dmac1 0xe1>, <&dmac1 0xe2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 305>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
- mmcif0: mmc@ee200000 {
- compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7790";
+ reg = <0 0xe6060000 0 0x250>;
+ };
- mmcif1: mmc@ee220000 {
- compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
- reg = <0 0xee220000 0 0x80>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 305>;
- dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
- <&dmac1 0xe1>, <&dmac1 0xe2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 305>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7790";
- reg = <0 0xe6060000 0 0x250>;
- };
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee120000 0 0x328>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
+ <&dmac1 0xc9>, <&dmac1 0xca>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
- sdhi1: sd@ee120000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee120000 0 0x328>;
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 313>;
- dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
- <&dmac1 0xc9>, <&dmac1 0xca>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 313>;
- status = "disabled";
- };
+ sdhi3: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
- sdhi2: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ scifa0: serial@e6c40000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- sdhi3: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ scifa1: serial@e6c50000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- scifa0: serial@e6c40000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ scifa2: serial@e6c60000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scifa1: serial@e6c50000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- scifa2: serial@e6c60000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- scifb0: serial@e6c20000 {
- compatible = "renesas,scifb-r8a7790",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- scifb1: serial@e6c30000 {
- compatible = "renesas,scifb-r8a7790",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a7790",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- scifb2: serial@e6ce0000 {
- compatible = "renesas,scifb-r8a7790",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a7790",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- scif0: serial@e6e60000 {
- compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scif2: serial@e6e56000 {
+ compatible = "renesas,scif-r8a7790",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e56000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
- scif1: serial@e6e68000 {
- compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ hscif0: serial@e62c0000 {
+ compatible = "renesas,hscif-r8a7790",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- scif2: serial@e6e56000 {
- compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e56000 0 64>;
- interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 310>;
- status = "disabled";
- };
+ hscif1: serial@e62c8000 {
+ compatible = "renesas,hscif-r8a7790",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- hscif0: serial@e62c0000 {
- compatible = "renesas,hscif-r8a7790",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- hscif1: serial@e62c8000 {
- compatible = "renesas,hscif-r8a7790",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ ether: ethernet@ee700000 {
+ compatible = "renesas,ether-r8a7790",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7790",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
- };
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7790",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ sata0: sata@ee300000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
- avb: ethernet@e6800000 {
- compatible = "renesas,etheravb-r8a7790",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ sata1: sata@ee500000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ status = "disabled";
+ };
- sata0: sata@ee300000 {
- compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
- reg = <0 0xee300000 0 0x2000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 815>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 815>;
- status = "disabled";
- };
+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7790",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
- sata1: sata@ee500000 {
- compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
- reg = <0 0xee500000 0 0x2000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 814>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 814>;
- status = "disabled";
- };
+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7790",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
- hsusb: usb@e6590000 {
- compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
- status = "disabled";
- };
+ usb0: usb-channel@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
+ };
- usbphy: usb-phy@e6590100 {
- compatible = "renesas,usb-phy-r8a7790",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- status = "disabled";
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
- usb0: usb-channel@0 {
- reg = <0>;
- #phy-cells = <1>;
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
};
- usb2: usb-channel@2 {
- reg = <2>;
- #phy-cells = <1>;
+
+ vin2: video@e6ef2000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
};
- };
- vin0: video@e6ef0000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ vin3: video@e6ef3000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ status = "disabled";
+ };
- vin1: video@e6ef1000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ vsp@fe920000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 130>;
+ };
- vin2: video@e6ef2000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
- vin3: video@e6ef3000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef3000 0 0x1000>;
- interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 808>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 808>;
- status = "disabled";
- };
+ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
- vsp@fe920000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe920000 0 0x8000>;
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 130>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 130>;
- };
+ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
- vsp@fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7790";
+ reg = <0 0xfeb00000 0 0x70000>,
+ <0 0xfeb90000 0 0x1c>,
+ <0 0xfeb94000 0 0x1c>;
+ reg-names = "du", "lvds.0", "lvds.1";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
+ <&cpg CPG_MOD 725>;
+ clock-names = "du.0", "du.1", "du.2", "lvds.0",
+ "lvds.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ port@2 {
+ reg = <2>;
+ du_out_lvds1: endpoint {
+ };
+ };
+ };
+ };
- vsp@fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ can0: can@e6e80000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
- vsp@fe938000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe938000 0 0x8000>;
- interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 127>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 127>;
- };
+ can1: can@e6e88000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
- du: display@feb00000 {
- compatible = "renesas,du-r8a7790";
- reg = <0 0xfeb00000 0 0x70000>,
- <0 0xfeb90000 0 0x1c>,
- <0 0xfeb94000 0 0x1c>;
- reg-names = "du", "lvds.0", "lvds.1";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
- <&cpg CPG_MOD 725>;
- clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
- status = "disabled";
-
- ports {
+ jpu: jpeg-codec@fe980000 {
+ compatible = "renesas,jpu-r8a7790",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
+ };
+
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7790-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7790-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7790-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7790", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
+ };
- port@0 {
- reg = <0>;
- du_out_rgb: endpoint {
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 0>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi@e6c90000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 215>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x46>,
+ <&dmac1 0x45>, <&dmac1 0x46>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 215>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ xhci: usb@ee000000 {
+ compatible = "renesas,xhci-r8a7790",
+ "renesas,rcar-gen2-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7790",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pci1: pci@ee0b0000 {
+ compatible = "renesas,pci-r8a7790",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0b0000 0 0xc00>,
+ <0 0xee0a0000 0 0x1100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pci2: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7790",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+
+ bus-range = <2 2>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x20800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x21000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pciec: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a7790",
+ "renesas,pcie-rcar-gen2";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
+ 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7790",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7790_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
};
};
- port@1 {
- reg = <1>;
- du_out_lvds0: endpoint {
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
};
};
- port@2 {
- reg = <2>;
- du_out_lvds1: endpoint {
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
};
};
};
- };
- can0: can@e6e80000 {
- compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
+ ipmmu_sy0: mmu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_sy1: mmu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
};
- can1: can@e6e88000 {
- compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ };
+ };
};
- jpu: jpeg-codec@fe980000 {
- compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External root clock */
@@ -1194,476 +1736,4 @@
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
-
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7790-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7790-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7790-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7790", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof0: spi@e6e20000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e20000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 0>;
- dmas = <&dmac0 0x51>, <&dmac0 0x52>,
- <&dmac1 0x51>, <&dmac1 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof1: spi@e6e10000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e10000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x55>, <&dmac0 0x56>,
- <&dmac1 0x55>, <&dmac1 0x56>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof2: spi@e6e00000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 205>;
- dmas = <&dmac0 0x41>, <&dmac0 0x42>,
- <&dmac1 0x41>, <&dmac1 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 205>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof3: spi@e6c90000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6c90000 0 0x0064>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 215>;
- dmas = <&dmac0 0x45>, <&dmac0 0x46>,
- <&dmac1 0x45>, <&dmac1 0x46>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 215>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- xhci: usb@ee000000 {
- compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
- reg = <0 0xee000000 0 0xc00>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
- phys = <&usb2 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- pci0: pci@ee090000 {
- compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
-
- usb@2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
- };
-
- pci1: pci@ee0b0000 {
- compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0b0000 0 0xc00>,
- <0 0xee0a0000 0 0x1100>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- pci2: pci@ee0d0000 {
- compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
- device_type = "pci";
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
-
- bus-range = <2 2>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x20800 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
-
- usb@2,0 {
- reg = <0x21000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
- };
-
- pciec: pcie@fe000000 {
- compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
- reg = <0 0xfe000000 0 0x80000>;
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x00 0xff>;
- device_type = "pci";
- ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
- 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
- 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
- 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
- /* Map all possible DDR as inbound ranges */
- dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
- 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
- clock-names = "pcie", "pcie_bus";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 319>;
- status = "disabled";
- };
-
- rcar_sound: sound@ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7790",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7790_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6", "src.5",
- "src.4", "src.3", "src.2", "src.1", "src.0",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
-
- ipmmu_sy0: mmu@e6280000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu@e6290000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu@e6740000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu@ec680000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu@fe951000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu@ffc80000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* No change
---
arch/arm/boot/dts/r8a7790.dtsi | 2794 ++++++++++++++++++++--------------------
1 file changed, 1432 insertions(+), 1362 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index b4306f7c1bbb..1f4b3a4ed287 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -17,7 +17,6 @@
/ {
compatible = "renesas,r8a7790";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -159,981 +158,1524 @@
};
};
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- thermal-sensors = <&thermal>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
- trips {
- cpu-crit {
- temperature = <95000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
- cooling-maps {
- };
+ apmu at e6151000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
};
- };
- apmu at e6151000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
- };
+ apmu at e6152000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+ };
- apmu at e6152000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
- };
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ gpio0: gpio at e6050000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio0: gpio at e6050000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ gpio1: gpio at e6051000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio1: gpio at e6051000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 30>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gpio2: gpio at e6052000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio2: gpio at e6052000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 30>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio3: gpio at e6053000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio3: gpio at e6053000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio4: gpio at e6054000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- gpio4: gpio at e6054000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio5: gpio at e6055000 {
+ compatible = "renesas,gpio-r8a7790",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- gpio5: gpio at e6055000 {
- compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ thermal: thermal at e61f0000 {
+ compatible = "renesas,thermal-r8a7790",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
- thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7790",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
- };
+ cmt0: timer at ffca0000 {
+ compatible = "renesas,r8a7790-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ cmt1: timer at e6130000 {
+ compatible = "renesas,r8a7790-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
- cmt0: timer at ffca0000 {
- compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ irqc0: interrupt-controller at e61c0000 {
+ compatible = "renesas,irqc-r8a7790", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- cmt1: timer at e6130000 {
- compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ dmac0: dma-controller at e6700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- irqc0: interrupt-controller at e61c0000 {
- compatible = "renesas,irqc-r8a7790", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ dmac1: dma-controller at e6720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- dmac0: dma-controller at e6700000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- dmac1: dma-controller at e6720000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- usb_dmac0: dma-controller at e65a0000 {
- compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ i2c0: i2c at e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- usb_dmac1: dma-controller at e65b0000 {
- compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ i2c1: i2c at e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c0: i2c at e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ i2c2: i2c at e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c1: i2c at e6518000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c3: i2c at e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7790",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- i2c2: i2c at e6530000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ iic0: i2c at e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
- i2c3: i2c at e6540000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ iic1: i2c at e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ status = "disabled";
+ };
- iic0: i2c at e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- status = "disabled";
- };
+ iic2: i2c at e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x425>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 300>;
+ dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
+ <&dmac1 0x69>, <&dmac1 0x6a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 300>;
+ status = "disabled";
+ };
- iic1: i2c at e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- status = "disabled";
- };
+ iic3: i2c at e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
- iic2: i2c at e6520000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6520000 0 0x425>;
- interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 300>;
- dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
- <&dmac1 0x69>, <&dmac1 0x6a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 300>;
- status = "disabled";
- };
+ mmcif0: mmc at ee200000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
- iic3: i2c at e60b0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- dmas = <&dmac0 0x77>, <&dmac0 0x78>,
- <&dmac1 0x77>, <&dmac1 0x78>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- status = "disabled";
- };
+ mmcif1: mmc at ee220000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 305>;
+ dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
+ <&dmac1 0xe1>, <&dmac1 0xe2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 305>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
- mmcif0: mmc at ee200000 {
- compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7790";
+ reg = <0 0xe6060000 0 0x250>;
+ };
- mmcif1: mmc at ee220000 {
- compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
- reg = <0 0xee220000 0 0x80>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 305>;
- dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
- <&dmac1 0xe1>, <&dmac1 0xe2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 305>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7790";
- reg = <0 0xe6060000 0 0x250>;
- };
+ sdhi1: sd at ee120000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee120000 0 0x328>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
+ <&dmac1 0xc9>, <&dmac1 0xca>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ sdhi2: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
- sdhi1: sd at ee120000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee120000 0 0x328>;
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 313>;
- dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
- <&dmac1 0xc9>, <&dmac1 0xca>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 313>;
- status = "disabled";
- };
+ sdhi3: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
- sdhi2: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ scifa0: serial at e6c40000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- sdhi3: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ scifa1: serial at e6c50000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- scifa0: serial at e6c40000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ scifa2: serial at e6c60000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scifa1: serial at e6c50000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ scifb0: serial at e6c20000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- scifa2: serial at e6c60000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ scifb1: serial at e6c30000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- scifb0: serial at e6c20000 {
- compatible = "renesas,scifb-r8a7790",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ scifb2: serial at e6ce0000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- scifb1: serial at e6c30000 {
- compatible = "renesas,scifb-r8a7790",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a7790",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- scifb2: serial at e6ce0000 {
- compatible = "renesas,scifb-r8a7790",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a7790",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scif2: serial at e6e56000 {
+ compatible = "renesas,scif-r8a7790",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e56000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
- scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ hscif0: serial at e62c0000 {
+ compatible = "renesas,hscif-r8a7790",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- scif2: serial at e6e56000 {
- compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e56000 0 64>;
- interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 310>;
- status = "disabled";
- };
+ hscif1: serial at e62c8000 {
+ compatible = "renesas,hscif-r8a7790",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>,
+ <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- hscif0: serial at e62c0000 {
- compatible = "renesas,hscif-r8a7790",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- hscif1: serial at e62c8000 {
- compatible = "renesas,hscif-r8a7790",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7790",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a7790",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
- };
- ether: ethernet at ee700000 {
- compatible = "renesas,ether-r8a7790",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ sata0: sata at ee300000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a7790",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ sata1: sata at ee500000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ status = "disabled";
+ };
- sata0: sata at ee300000 {
- compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
- reg = <0 0xee300000 0 0x2000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 815>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 815>;
- status = "disabled";
- };
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7790",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
- sata1: sata at ee500000 {
- compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
- reg = <0 0xee500000 0 0x2000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 814>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 814>;
- status = "disabled";
- };
+ usbphy: usb-phy at e6590100 {
+ compatible = "renesas,usb-phy-r8a7790",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
- status = "disabled";
- };
+ usb0: usb-channel at 0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel at 2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
+ };
- usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7790",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- status = "disabled";
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
- usb0: usb-channel at 0 {
- reg = <0>;
- #phy-cells = <1>;
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
};
- usb2: usb-channel at 2 {
- reg = <2>;
- #phy-cells = <1>;
+
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
};
- };
- vin0: video at e6ef0000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ vin3: video at e6ef3000 {
+ compatible = "renesas,vin-r8a7790",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ status = "disabled";
+ };
- vin1: video at e6ef1000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ vsp at fe920000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 130>;
+ };
- vin2: video at e6ef2000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
+ vsp at fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
- vin3: video at e6ef3000 {
- compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef3000 0 0x1000>;
- interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 808>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 808>;
- status = "disabled";
- };
+ vsp at fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
- vsp at fe920000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe920000 0 0x8000>;
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 130>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 130>;
- };
+ vsp at fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
- vsp at fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7790";
+ reg = <0 0xfeb00000 0 0x70000>,
+ <0 0xfeb90000 0 0x1c>,
+ <0 0xfeb94000 0 0x1c>;
+ reg-names = "du", "lvds.0", "lvds.1";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
+ <&cpg CPG_MOD 725>;
+ clock-names = "du.0", "du.1", "du.2", "lvds.0",
+ "lvds.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ port at 2 {
+ reg = <2>;
+ du_out_lvds1: endpoint {
+ };
+ };
+ };
+ };
- vsp at fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ can0: can at e6e80000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
- vsp at fe938000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe938000 0 0x8000>;
- interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 127>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 127>;
- };
+ can1: can at e6e88000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
- du: display at feb00000 {
- compatible = "renesas,du-r8a7790";
- reg = <0 0xfeb00000 0 0x70000>,
- <0 0xfeb90000 0 0x1c>,
- <0 0xfeb94000 0 0x1c>;
- reg-names = "du", "lvds.0", "lvds.1";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
- <&cpg CPG_MOD 725>;
- clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
- status = "disabled";
-
- ports {
+ jpu: jpeg-codec at fe980000 {
+ compatible = "renesas,jpu-r8a7790",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
+ };
+
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7790-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7790-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7790-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7790", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
+ };
- port at 0 {
- reg = <0>;
- du_out_rgb: endpoint {
+ msiof0: spi at e6e20000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 0>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi at e6e10000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi at e6e00000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi at e6c90000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 215>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x46>,
+ <&dmac1 0x45>, <&dmac1 0x46>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 215>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ xhci: usb at ee000000 {
+ compatible = "renesas,xhci-r8a7790",
+ "renesas,rcar-gen2-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ pci0: pci at ee090000 {
+ compatible = "renesas,pci-r8a7790",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pci1: pci at ee0b0000 {
+ compatible = "renesas,pci-r8a7790",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0b0000 0 0xc00>,
+ <0 0xee0a0000 0 0x1100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pci2: pci at ee0d0000 {
+ compatible = "renesas,pci-r8a7790",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+
+ bus-range = <2 2>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x20800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x21000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pciec: pcie at fe000000 {
+ compatible = "renesas,pcie-r8a7790",
+ "renesas,pcie-rcar-gen2";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
+ 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound at ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7790",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7790_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
};
};
- port at 1 {
- reg = <1>;
- du_out_lvds0: endpoint {
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
};
};
- port at 2 {
- reg = <2>;
- du_out_lvds1: endpoint {
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
};
};
};
- };
- can0: can at e6e80000 {
- compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
+ ipmmu_sy0: mmu at e6280000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_sy1: mmu at e6290000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu at ec680000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu at fe951000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
};
- can1: can at e6e88000 {
- compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ };
+ };
};
- jpu: jpeg-codec at fe980000 {
- compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External root clock */
@@ -1194,476 +1736,4 @@
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
-
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7790-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7790-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7790-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7790", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e20000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 0>;
- dmas = <&dmac0 0x51>, <&dmac0 0x52>,
- <&dmac1 0x51>, <&dmac1 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e10000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x55>, <&dmac0 0x56>,
- <&dmac1 0x55>, <&dmac1 0x56>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof2: spi at e6e00000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 205>;
- dmas = <&dmac0 0x41>, <&dmac0 0x42>,
- <&dmac1 0x41>, <&dmac1 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 205>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof3: spi at e6c90000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6c90000 0 0x0064>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 215>;
- dmas = <&dmac0 0x45>, <&dmac0 0x46>,
- <&dmac1 0x45>, <&dmac1 0x46>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 215>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- xhci: usb at ee000000 {
- compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
- reg = <0 0xee000000 0 0xc00>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
- phys = <&usb2 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- pci0: pci at ee090000 {
- compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
-
- usb at 2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
- };
-
- pci1: pci at ee0b0000 {
- compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0b0000 0 0xc00>,
- <0 0xee0a0000 0 0x1100>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- pci2: pci at ee0d0000 {
- compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
- device_type = "pci";
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
-
- bus-range = <2 2>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x20800 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
-
- usb at 2,0 {
- reg = <0x21000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
- };
-
- pciec: pcie at fe000000 {
- compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
- reg = <0 0xfe000000 0 0x80000>;
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x00 0xff>;
- device_type = "pci";
- ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
- 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
- 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
- 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
- /* Map all possible DDR as inbound ranges */
- dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
- 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
- clock-names = "pcie", "pcie_bus";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 319>;
- status = "disabled";
- };
-
- rcar_sound: sound at ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7790",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7790_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6", "src.5",
- "src.4", "src.3", "src.2", "src.1", "src.0",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
-
- ipmmu_sy0: mmu at e6280000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu at e6290000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu at ec680000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu at fe951000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort the subnodes of the soc node to improve maintainability.
The sort key is the addresss on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* Correct order of: qspi, msiof*, can*, and vin* nodes.
---
arch/arm/boot/dts/r8a7790.dtsi | 1592 ++++++++++++++++++++--------------------
1 file changed, 796 insertions(+), 796 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 1f4b3a4ed287..54c5a2d7ea89 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -166,32 +166,6 @@
#size-cells = <2>;
ranges;
- apmu@e6151000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
- };
-
- apmu@e6152000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
- };
-
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7790",
"renesas,rcar-gen2-gpio";
@@ -282,50 +256,42 @@
resets = <&cpg 907>;
};
- thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7790",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7790";
+ reg = <0 0xe6060000 0 0x250>;
};
- cmt0: timer@ffca0000 {
- compatible = "renesas,r8a7790-cmt0",
- "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7790-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- status = "disabled";
+ apmu@e6151000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
};
- cmt1: timer@e6130000 {
- compatible = "renesas,r8a7790-cmt1",
- "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
+ apmu@e6152000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+ };
- status = "disabled";
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7790-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7790-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
};
irqc0: interrupt-controller@e61c0000 {
@@ -342,160 +308,91 @@
resets = <&cpg 407>;
};
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
+ thermal: thermal@e61f0000 {
+ compatible = "renesas,thermal-r8a7790",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
};
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_sy0: mmu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma0: dma-controller@ec700000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_sy1: mmu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma1: dma-controller@ec720000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_ds: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- usb_dmac0: dma-controller@e65a0000 {
- compatible = "renesas,r8a7790-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
+ ipmmu_mp: mmu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- usb_dmac1: dma-controller@e65b0000 {
- compatible = "renesas,r8a7790-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
i2c0: i2c@e6508000 {
@@ -622,107 +519,172 @@
status = "disabled";
};
- mmcif0: mmc@ee200000 {
- compatible = "renesas,mmcif-r8a7790",
- "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7790",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
status = "disabled";
- max-frequency = <97500000>;
};
- mmcif1: mmc@ee220000 {
- compatible = "renesas,mmcif-r8a7790",
- "renesas,sh-mmcif";
- reg = <0 0xee220000 0 0x80>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 305>;
- dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
- <&dmac1 0xe1>, <&dmac1 0xe2>;
- dma-names = "tx", "rx", "tx", "rx";
+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7790",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 305>;
- reg-io-width = <4>;
+ resets = <&cpg 704>;
status = "disabled";
- max-frequency = <97500000>;
+
+ usb0: usb-channel@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
};
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7790";
- reg = <0 0xe6060000 0 0x250>;
+ usb_dmac0: dma-controller@e65a0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
};
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
+ usb_dmac1: dma-controller@e65b0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
};
- sdhi1: sd@ee120000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee120000 0 0x328>;
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 313>;
- dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
- <&dmac1 0xc9>, <&dmac1 0xca>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 313>;
- status = "disabled";
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- sdhi2: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ dmac1: dma-controller@e6720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- sdhi3: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7790",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- scifa0: serial@e6c40000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7790", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ scifa0: serial@e6c40000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>;
clock-names = "fck";
@@ -892,110 +854,94 @@
status = "disabled";
};
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
- };
-
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7790",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 0>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
+ resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
- avb: ethernet@e6800000 {
- compatible = "renesas,etheravb-r8a7790",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
+ resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
- sata0: sata@ee300000 {
- compatible = "renesas,sata-r8a7790",
- "renesas,rcar-gen2-sata";
- reg = <0 0xee300000 0 0x2000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 815>;
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 815>;
+ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- sata1: sata@ee500000 {
- compatible = "renesas,sata-r8a7790",
- "renesas,rcar-gen2-sata";
- reg = <0 0xee500000 0 0x2000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 814>;
+ msiof3: spi@e6c90000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 215>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x46>,
+ <&dmac1 0x45>, <&dmac1 0x46>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 814>;
+ resets = <&cpg 215>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- hsusb: usb@e6590000 {
- compatible = "renesas,usbhs-r8a7790",
- "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
+ can0: can@e6e80000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
+ resets = <&cpg 916>;
status = "disabled";
};
- usbphy: usb-phy@e6590100 {
- compatible = "renesas,usb-phy-r8a7790",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
+ can1: can@e6e88000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
+ resets = <&cpg 915>;
status = "disabled";
-
- usb0: usb-channel@0 {
- reg = <0>;
- #phy-cells = <1>;
- };
- usb2: usb-channel@2 {
- reg = <2>;
- #phy-cells = <1>;
- };
};
vin0: video@e6ef0000 {
@@ -1042,220 +988,267 @@
status = "disabled";
};
- vsp@fe920000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe920000 0 0x8000>;
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 130>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 130>;
- };
+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7790",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
- vsp@fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7790_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
- vsp@fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ status = "disabled";
- vsp@fe938000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe938000 0 0x8000>;
- interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 127>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 127>;
- };
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
- du: display@feb00000 {
- compatible = "renesas,du-r8a7790";
- reg = <0 0xfeb00000 0 0x70000>,
- <0 0xfeb90000 0 0x1c>,
- <0 0xfeb94000 0 0x1c>;
- reg-names = "du", "lvds.0", "lvds.1";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
- <&cpg CPG_MOD 725>;
- clock-names = "du.0", "du.1", "du.2", "lvds.0",
- "lvds.1";
- status = "disabled";
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
- port@0 {
- reg = <0>;
- du_out_rgb: endpoint {
- };
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
};
- port@1 {
- reg = <1>;
- du_out_lvds0: endpoint {
- };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
};
- port@2 {
- reg = <2>;
- du_out_lvds1: endpoint {
- };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
};
};
- };
-
- can0: can@e6e80000 {
- compatible = "renesas,can-r8a7790",
- "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>,
- <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
- };
-
- can1: can@e6e88000 {
- compatible = "renesas,can-r8a7790",
- "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>,
- <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
- };
-
- jpu: jpeg-codec@fe980000 {
- compatible = "renesas,jpu-r8a7790",
- "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
- };
-
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7790-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7790-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7790-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7790", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
- msiof0: spi@e6e20000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e20000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 0>;
- dmas = <&dmac0 0x51>, <&dmac0 0x52>,
- <&dmac1 0x51>, <&dmac1 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof1: spi@e6e10000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e10000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x55>, <&dmac0 0x56>,
- <&dmac1 0x55>, <&dmac1 0x56>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
};
- msiof2: spi@e6e00000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 205>;
- dmas = <&dmac0 0x41>, <&dmac0 0x42>,
- <&dmac1 0x41>, <&dmac1 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 205>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
};
-
- msiof3: spi@e6c90000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6c90000 0 0x0064>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 215>;
- dmas = <&dmac0 0x45>, <&dmac0 0x46>,
- <&dmac1 0x45>, <&dmac1 0x46>;
- dma-names = "tx", "rx", "tx", "rx";
+
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 215>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
};
xhci: usb@ee000000 {
@@ -1364,6 +1357,148 @@
};
};
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee120000 0 0x328>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
+ <&dmac1 0xc9>, <&dmac1 0xca>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
+
+ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi3: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ mmcif1: mmc@ee220000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 305>;
+ dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
+ <&dmac1 0xe1>, <&dmac1 0xe2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 305>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ sata0: sata@ee300000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+ sata1: sata@ee500000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ status = "disabled";
+ };
+
+ ether: ethernet@ee700000 {
+ compatible = "renesas,ether-r8a7790",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
pciec: pcie@fe000000 {
compatible = "renesas,pcie-r8a7790",
"renesas,pcie-rcar-gen2";
@@ -1392,261 +1527,126 @@
status = "disabled";
};
- rcar_sound: sound@ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7790",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+ vsp@fe920000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 130>;
+ };
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7790_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6",
- "ssi.5", "ssi.4", "ssi.3", "ssi.2",
- "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6",
- "src.5", "src.4", "src.3", "src.2",
- "src.1", "src.0",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
+
+ jpu: jpeg-codec@fe980000 {
+ compatible = "renesas,jpu-r8a7790",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>,
- <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>,
- <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6",
- "ssi.5", "ssi.4", "ssi.3", "ssi.2",
- "ssi.1", "ssi.0";
+ resets = <&cpg 106>;
+ };
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7790";
+ reg = <0 0xfeb00000 0 0x70000>,
+ <0 0xfeb90000 0 0x1c>,
+ <0 0xfeb94000 0 0x1c>;
+ reg-names = "du", "lvds.0", "lvds.1";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
+ <&cpg CPG_MOD 725>;
+ clock-names = "du.0", "du.1", "du.2", "lvds.0",
+ "lvds.1";
status = "disabled";
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>,
- <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>,
- <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>,
- <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>,
- <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>,
- <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>,
- <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>,
- <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>,
- <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
};
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>,
- <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
+ port@1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
};
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>,
- <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
+ port@2 {
+ reg = <2>;
+ du_out_lvds1: endpoint {
+ };
};
};
};
- ipmmu_sy0: mmu@e6280000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu@e6290000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
};
- ipmmu_ds: mmu@e6740000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,r8a7790-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
- ipmmu_mp: mmu@ec680000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
status = "disabled";
};
- ipmmu_mx: mmu@fe951000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7790-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
- ipmmu_rt: mmu@ffc80000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
status = "disabled";
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort the subnodes of the soc node to improve maintainability.
The sort key is the addresss on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* Correct order of: qspi, msiof*, can*, and vin* nodes.
---
arch/arm/boot/dts/r8a7790.dtsi | 1592 ++++++++++++++++++++--------------------
1 file changed, 796 insertions(+), 796 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 1f4b3a4ed287..54c5a2d7ea89 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -166,32 +166,6 @@
#size-cells = <2>;
ranges;
- apmu at e6151000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
- };
-
- apmu at e6152000 {
- compatible = "renesas,r8a7790-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
- };
-
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
gpio0: gpio at e6050000 {
compatible = "renesas,gpio-r8a7790",
"renesas,rcar-gen2-gpio";
@@ -282,50 +256,42 @@
resets = <&cpg 907>;
};
- thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7790",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7790";
+ reg = <0 0xe6060000 0 0x250>;
};
- cmt0: timer at ffca0000 {
- compatible = "renesas,r8a7790-cmt0",
- "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7790-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- status = "disabled";
+ apmu at e6151000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
};
- cmt1: timer at e6130000 {
- compatible = "renesas,r8a7790-cmt1",
- "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
+ apmu at e6152000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+ };
- status = "disabled";
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7790-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7790-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
};
irqc0: interrupt-controller at e61c0000 {
@@ -342,160 +308,91 @@
resets = <&cpg 407>;
};
- dmac0: dma-controller at e6700000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
+ thermal: thermal at e61f0000 {
+ compatible = "renesas,thermal-r8a7790",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
};
- dmac1: dma-controller at e6720000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_sy0: mmu at e6280000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_sy1: mmu at e6290000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7790",
- "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_ds: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- usb_dmac0: dma-controller at e65a0000 {
- compatible = "renesas,r8a7790-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
+ ipmmu_mp: mmu at ec680000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- usb_dmac1: dma-controller at e65b0000 {
- compatible = "renesas,r8a7790-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
+ ipmmu_mx: mmu at fe951000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a7790",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
i2c0: i2c at e6508000 {
@@ -622,107 +519,172 @@
status = "disabled";
};
- mmcif0: mmc at ee200000 {
- compatible = "renesas,mmcif-r8a7790",
- "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7790",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
status = "disabled";
- max-frequency = <97500000>;
};
- mmcif1: mmc at ee220000 {
- compatible = "renesas,mmcif-r8a7790",
- "renesas,sh-mmcif";
- reg = <0 0xee220000 0 0x80>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 305>;
- dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
- <&dmac1 0xe1>, <&dmac1 0xe2>;
- dma-names = "tx", "rx", "tx", "rx";
+ usbphy: usb-phy at e6590100 {
+ compatible = "renesas,usb-phy-r8a7790",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 305>;
- reg-io-width = <4>;
+ resets = <&cpg 704>;
status = "disabled";
- max-frequency = <97500000>;
+
+ usb0: usb-channel at 0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel at 2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
};
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7790";
- reg = <0 0xe6060000 0 0x250>;
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
};
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a7790-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
};
- sdhi1: sd at ee120000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee120000 0 0x328>;
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 313>;
- dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
- <&dmac1 0xc9>, <&dmac1 0xca>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
+ dmac0: dma-controller at e6700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 313>;
- status = "disabled";
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- sdhi2: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ dmac1: dma-controller at e6720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- sdhi3: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7790",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a7790",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- scifa0: serial at e6c40000 {
- compatible = "renesas,scifa-r8a7790",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7790", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ scifa0: serial at e6c40000 {
+ compatible = "renesas,scifa-r8a7790",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>;
clock-names = "fck";
@@ -892,110 +854,94 @@
status = "disabled";
};
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
- };
-
- ether: ethernet at ee700000 {
- compatible = "renesas,ether-r8a7790",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
+ msiof0: spi at e6e20000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 0>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
+ resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a7790",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
+ msiof1: spi at e6e10000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
+ resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
- sata0: sata at ee300000 {
- compatible = "renesas,sata-r8a7790",
- "renesas,rcar-gen2-sata";
- reg = <0 0xee300000 0 0x2000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 815>;
+ msiof2: spi at e6e00000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 815>;
+ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- sata1: sata at ee500000 {
- compatible = "renesas,sata-r8a7790",
- "renesas,rcar-gen2-sata";
- reg = <0 0xee500000 0 0x2000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 814>;
+ msiof3: spi at e6c90000 {
+ compatible = "renesas,msiof-r8a7790",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 215>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x46>,
+ <&dmac1 0x45>, <&dmac1 0x46>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 814>;
+ resets = <&cpg 215>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7790",
- "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
+ can0: can at e6e80000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
+ resets = <&cpg 916>;
status = "disabled";
};
- usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7790",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
+ can1: can at e6e88000 {
+ compatible = "renesas,can-r8a7790",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
+ resets = <&cpg 915>;
status = "disabled";
-
- usb0: usb-channel at 0 {
- reg = <0>;
- #phy-cells = <1>;
- };
- usb2: usb-channel at 2 {
- reg = <2>;
- #phy-cells = <1>;
- };
};
vin0: video at e6ef0000 {
@@ -1042,220 +988,267 @@
status = "disabled";
};
- vsp at fe920000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe920000 0 0x8000>;
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 130>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 130>;
- };
+ rcar_sound: sound at ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7790",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
- vsp at fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7790_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
- vsp at fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ status = "disabled";
- vsp at fe938000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe938000 0 0x8000>;
- interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 127>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 127>;
- };
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
- du: display at feb00000 {
- compatible = "renesas,du-r8a7790";
- reg = <0 0xfeb00000 0 0x70000>,
- <0 0xfeb90000 0 0x1c>,
- <0 0xfeb94000 0 0x1c>;
- reg-names = "du", "lvds.0", "lvds.1";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
- <&cpg CPG_MOD 725>;
- clock-names = "du.0", "du.1", "du.2", "lvds.0",
- "lvds.1";
- status = "disabled";
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
- port at 0 {
- reg = <0>;
- du_out_rgb: endpoint {
- };
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
};
- port at 1 {
- reg = <1>;
- du_out_lvds0: endpoint {
- };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
};
- port at 2 {
- reg = <2>;
- du_out_lvds1: endpoint {
- };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
};
};
- };
-
- can0: can at e6e80000 {
- compatible = "renesas,can-r8a7790",
- "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>,
- <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
- };
-
- can1: can at e6e88000 {
- compatible = "renesas,can-r8a7790",
- "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>,
- <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
- };
-
- jpu: jpeg-codec at fe980000 {
- compatible = "renesas,jpu-r8a7790",
- "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
- };
-
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7790-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7790-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7790-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7790", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
- msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e20000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 0>;
- dmas = <&dmac0 0x51>, <&dmac0 0x52>,
- <&dmac1 0x51>, <&dmac1 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e10000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x55>, <&dmac0 0x56>,
- <&dmac1 0x55>, <&dmac1 0x56>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
};
- msiof2: spi at e6e00000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 205>;
- dmas = <&dmac0 0x41>, <&dmac0 0x42>,
- <&dmac1 0x41>, <&dmac1 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 205>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
};
-
- msiof3: spi at e6c90000 {
- compatible = "renesas,msiof-r8a7790",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6c90000 0 0x0064>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 215>;
- dmas = <&dmac0 0x45>, <&dmac0 0x46>,
- <&dmac1 0x45>, <&dmac1 0x46>;
- dma-names = "tx", "rx", "tx", "rx";
+
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7790",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 215>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
};
xhci: usb at ee000000 {
@@ -1364,6 +1357,148 @@
};
};
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd at ee120000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee120000 0 0x328>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
+ <&dmac1 0xc9>, <&dmac1 0xca>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
+
+ sdhi2: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi3: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7790",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc at ee200000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ mmcif1: mmc at ee220000 {
+ compatible = "renesas,mmcif-r8a7790",
+ "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 305>;
+ dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
+ <&dmac1 0xe1>, <&dmac1 0xe2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 305>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ sata0: sata at ee300000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+ sata1: sata at ee500000 {
+ compatible = "renesas,sata-r8a7790",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ status = "disabled";
+ };
+
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7790",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
pciec: pcie at fe000000 {
compatible = "renesas,pcie-r8a7790",
"renesas,pcie-rcar-gen2";
@@ -1392,261 +1527,126 @@
status = "disabled";
};
- rcar_sound: sound at ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7790",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+ vsp at fe920000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 130>;
+ };
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7790_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6",
- "ssi.5", "ssi.4", "ssi.3", "ssi.2",
- "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6",
- "src.5", "src.4", "src.3", "src.2",
- "src.1", "src.0",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
+ vsp at fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp at fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ vsp at fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
+
+ jpu: jpeg-codec at fe980000 {
+ compatible = "renesas,jpu-r8a7790",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>,
- <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>,
- <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6",
- "ssi.5", "ssi.4", "ssi.3", "ssi.2",
- "ssi.1", "ssi.0";
+ resets = <&cpg 106>;
+ };
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7790";
+ reg = <0 0xfeb00000 0 0x70000>,
+ <0 0xfeb90000 0 0x1c>,
+ <0 0xfeb94000 0 0x1c>;
+ reg-names = "du", "lvds.0", "lvds.1";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
+ <&cpg CPG_MOD 725>;
+ clock-names = "du.0", "du.1", "du.2", "lvds.0",
+ "lvds.1";
status = "disabled";
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>,
- <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>,
- <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>,
- <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>,
- <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>,
- <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>,
- <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>,
- <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>,
- <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
+ port at 0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
};
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>,
- <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
+ port at 1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
};
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>,
- <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
+ port at 2 {
+ reg = <2>;
+ du_out_lvds1: endpoint {
+ };
};
};
};
- ipmmu_sy0: mmu at e6280000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu at e6290000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
};
- ipmmu_ds: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ cmt0: timer at ffca0000 {
+ compatible = "renesas,r8a7790-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
- ipmmu_mp: mmu at ec680000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
status = "disabled";
};
- ipmmu_mx: mmu at fe951000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ cmt1: timer at e6130000 {
+ compatible = "renesas,r8a7790-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a7790",
- "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
status = "disabled";
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 04/16] ARM: dts: r8a7790: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort subnodes of root node to aid maintenance.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7790.dtsi | 104 ++++++++++++++++++++---------------------
1 file changed, 52 insertions(+), 52 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 54c5a2d7ea89..3bbcc0b93f1c 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -40,6 +40,35 @@
vin3 = &vin3;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -158,6 +187,29 @@
};
};
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -1678,62 +1730,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /* External PCIe clock - can be overridden by the board */
- pcie_bus_clk: pcie_bus {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_b: audio_clk_b {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 04/16] ARM: dts: r8a7790: sort subnodes of root node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort subnodes of root node to aid maintenance.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7790.dtsi | 104 ++++++++++++++++++++---------------------
1 file changed, 52 insertions(+), 52 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 54c5a2d7ea89..3bbcc0b93f1c 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -40,6 +40,35 @@
vin3 = &vin3;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -158,6 +187,29 @@
};
};
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -1678,62 +1730,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /* External PCIe clock - can be overridden by the board */
- pcie_bus_clk: pcie_bus {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_b: audio_clk_b {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 05/16] ARM: dts: r8a7791: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Consistently use a single space after a =.
This patch removes instances where a tab or multiple spaces are used
instead. It also avoids running over 80 columns in width in one of the
lines where whitespace is updated.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7791.dtsi | 75 +++++++++++++++++++++---------------------
1 file changed, 38 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 8266a9b7cafd..38a9b8cb736d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -237,9 +237,9 @@
};
thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7791",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
+ compatible = "renesas,thermal-r8a7791",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
@@ -375,20 +375,20 @@
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -405,20 +405,20 @@
audma1: dma-controller@ec720000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -1487,12 +1487,13 @@
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
- compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ compatible = "renesas,rcar_sound-r8a7791",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 05/16] ARM: dts: r8a7791: consistently use single space after =
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Consistently use a single space after a =.
This patch removes instances where a tab or multiple spaces are used
instead. It also avoids running over 80 columns in width in one of the
lines where whitespace is updated.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7791.dtsi | 75 +++++++++++++++++++++---------------------
1 file changed, 38 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 8266a9b7cafd..38a9b8cb736d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -237,9 +237,9 @@
};
thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7791",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
+ compatible = "renesas,thermal-r8a7791",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
@@ -375,20 +375,20 @@
audma0: dma-controller at ec700000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -405,20 +405,20 @@
audma1: dma-controller at ec720000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
@@ -1487,12 +1487,13 @@
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
- compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ compatible = "renesas,rcar_sound-r8a7791",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 06/16] ARM: dts: r8a7791: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7791.dtsi | 2909 ++++++++++++++++++++--------------------
1 file changed, 1489 insertions(+), 1420 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 38a9b8cb736d..de2af2199731 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -17,7 +17,6 @@
/ {
compatible = "renesas,r8a7791";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -102,1066 +101,1579 @@
};
};
- apmu@e6152000 {
- compatible = "renesas,r8a7791-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio0: gpio@e6050000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio1: gpio@e6051000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio2: gpio@e6052000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio3: gpio@e6053000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- gpio4: gpio@e6054000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- gpio5: gpio@e6055000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
- gpio6: gpio@e6055400 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055400 0 0x50>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 192 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 905>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 905>;
- };
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 904>;
+ };
- gpio7: gpio@e6055800 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055800 0 0x50>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 224 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 904>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 904>;
- };
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7791";
+ reg = <0 0xe6060000 0 0x250>;
+ };
- thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7791",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
- };
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7791-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ apmu@e6152000 {
+ compatible = "renesas,r8a7791-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- cmt0: timer@ffca0000 {
- compatible = "renesas,r8a7791-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7791-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
- cmt1: timer@e6130000 {
- compatible = "renesas,r8a7791-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7791-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
- irqc0: interrupt-controller@e61c0000 {
- compatible = "renesas,irqc-r8a7791", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ irqc0: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7791", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ thermal: thermal@e61f0000 {
+ compatible = "renesas,thermal-r8a7791",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ ipmmu_sy0: mmu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- audma0: dma-controller@ec700000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ ipmmu_sy1: mmu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- audma1: dma-controller@ec720000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ ipmmu_ds: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- usb_dmac0: dma-controller@e65a0000 {
- compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ ipmmu_mp: mmu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- usb_dmac1: dma-controller@e65b0000 {
- compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- /* The memory map in the User's Manual maps the cores to bus numbers */
- i2c0: i2c@e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- i2c1: i2c@e6518000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ ipmmu_gp: mmu@e62a0000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- i2c2: i2c@e6530000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- i2c3: i2c@e6540000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
- i2c4: i2c@e6520000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
- i2c5: i2c@e6528000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c6: i2c@e60b0000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- dmas = <&dmac0 0x77>, <&dmac0 0x78>,
- <&dmac1 0x77>, <&dmac1 0x78>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- status = "disabled";
- };
+ i2c1: i2c@e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c7: i2c@e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- status = "disabled";
- };
+ i2c2: i2c@e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c8: i2c@e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- status = "disabled";
- };
+ i2c3: i2c@e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7791";
- reg = <0 0xe6060000 0 0x250>;
- };
+ i2c4: i2c@e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- mmcif0: mmc@ee200000 {
- compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ i2c5: i2c@e6528000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7791",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ i2c6: i2c@e60b0000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7791",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
- sdhi1: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7791",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ i2c7: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7791",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
- sdhi2: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7791",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ i2c8: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7791",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ status = "disabled";
+ };
- scifa0: serial@e6c40000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7791",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
- scifa1: serial@e6c50000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7791",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
- scifa2: serial@e6c60000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ usb0: usb-channel@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
+ };
- scifa3: serial@e6c70000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
- };
+ usb_dmac0: dma-controller@e65a0000 {
+ compatible = "renesas,r8a7791-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- scifa4: serial@e6c78000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
- status = "disabled";
- };
+ usb_dmac1: dma-controller@e65b0000 {
+ compatible = "renesas,r8a7791-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- scifa5: serial@e6c80000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
- status = "disabled";
- };
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- scifb0: serial@e6c20000 {
- compatible = "renesas,scifb-r8a7791",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ dmac1: dma-controller@e6720000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- scifb1: serial@e6c30000 {
- compatible = "renesas,scifb-r8a7791",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7791",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- scifb2: serial@e6ce0000 {
- compatible = "renesas,scifb-r8a7791",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- scif0: serial@e6e60000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scifa0: serial@e6c40000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- scif1: serial@e6e68000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ scifa1: serial@e6c50000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- adc: adc@e6e54000 {
- compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
- reg = <0 0xe6e54000 0 64>;
- clocks = <&cpg CPG_MOD 901>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 901>;
- status = "disabled";
- };
+ scifa2: serial@e6c60000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scif2: serial@e6e58000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
- status = "disabled";
- };
+ scifa3: serial@e6c70000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
+ status = "disabled";
+ };
- scif3: serial@e6ea8000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
- status = "disabled";
- };
+ scifa4: serial@e6c78000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
+ status = "disabled";
+ };
- scif4: serial@e6ee0000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
- status = "disabled";
- };
+ scifa5: serial@e6c80000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
+ status = "disabled";
+ };
- scif5: serial@e6ee8000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- hscif0: serial@e62c0000 {
- compatible = "renesas,hscif-r8a7791",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- hscif1: serial@e62c8000 {
- compatible = "renesas,hscif-r8a7791",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- hscif2: serial@e62d0000 {
- compatible = "renesas,hscif-r8a7791",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ scif2: serial@e6e58000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ scif3: serial@e6ea8000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
+ status = "disabled";
};
- };
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7791",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ scif4: serial@e6ee0000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
- avb: ethernet@e6800000 {
- compatible = "renesas,etheravb-r8a7791",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ scif5: serial@e6ee8000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
- sata0: sata@ee300000 {
- compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
- reg = <0 0xee300000 0 0x2000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 815>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 815>;
- status = "disabled";
- };
+ hscif0: serial@e62c0000 {
+ compatible = "renesas,hscif-r8a7791",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- sata1: sata@ee500000 {
- compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
- reg = <0 0xee500000 0 0x2000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 814>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 814>;
- status = "disabled";
- };
+ hscif1: serial@e62c8000 {
+ compatible = "renesas,hscif-r8a7791",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- hsusb: usb@e6590000 {
- compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
- status = "disabled";
- };
+ hscif2: serial@e62d0000 {
+ compatible = "renesas,hscif-r8a7791",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
- usbphy: usb-phy@e6590100 {
- compatible = "renesas,usb-phy-r8a7791",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- status = "disabled";
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 000>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- usb0: usb-channel@0 {
- reg = <0>;
- #phy-cells = <1>;
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
- usb2: usb-channel@2 {
- reg = <2>;
- #phy-cells = <1>;
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
- };
- vin0: video@e6ef0000 {
- compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ adc: adc@e6e54000 {
+ compatible = "renesas,r8a7791-gyroadc",
+ "renesas,rcar-gyroadc";
+ reg = <0 0xe6e54000 0 64>;
+ clocks = <&cpg CPG_MOD 901>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 901>;
+ status = "disabled";
+ };
- vin1: video@e6ef1000 {
- compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ can0: can@e6e80000 {
+ compatible = "renesas,can-r8a7791",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
- vin2: video@e6ef2000 {
- compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
+ can1: can@e6e88000 {
+ compatible = "renesas,can-r8a7791",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
- vsp@fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a7791",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
- vsp@fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a7791",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
- vsp@fe938000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe938000 0 0x8000>;
- interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 127>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 127>;
- };
+ vin2: video@e6ef2000 {
+ compatible = "renesas,vin-r8a7791",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7791",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7791_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0", "src.9", "src.8",
+ "src.7", "src.6", "src.5", "src.4",
+ "src.3", "src.2", "src.1", "src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+ };
+
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- du: display@feb00000 {
- compatible = "renesas,du-r8a7791";
- reg = <0 0xfeb00000 0 0x40000>,
- <0 0xfeb90000 0 0x1c>;
- reg-names = "du", "lvds.0";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 726>;
- clock-names = "du.0", "du.1", "lvds.0";
- status = "disabled";
-
- ports {
+ xhci: usb@ee000000 {
+ compatible = "renesas,xhci-r8a7791",
+ "renesas,rcar-gen2-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7791",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pci1: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7791",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+ };
+
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7791",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7791",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi2: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7791",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7791",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ sata0: sata@ee300000 {
+ compatible = "renesas,sata-r8a7791",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+ sata1: sata@ee500000 {
+ compatible = "renesas,sata-r8a7791",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ status = "disabled";
+ };
+
+ ether: ethernet@ee700000 {
+ compatible = "renesas,ether-r8a7791",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
+ };
- port@0 {
- reg = <0>;
- du_out_rgb: endpoint {
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ pciec: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a7791",
+ "renesas,pcie-rcar-gen2";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
+ 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
+
+ jpu: jpeg-codec@fe980000 {
+ compatible = "renesas,jpu-r8a7791",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
+ };
+
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7791";
+ reg = <0 0xfeb00000 0 0x40000>,
+ <0 0xfeb90000 0 0x1c>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
};
- };
- port@1 {
- reg = <1>;
- du_out_lvds0: endpoint {
+ port@1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
};
};
};
- };
- can0: can@e6e80000 {
- compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
- };
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,r8a7791-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- can1: can@e6e88000 {
- compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7791-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
};
- jpu: jpeg-codec@fe980000 {
- compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External root clock */
@@ -1222,447 +1734,4 @@
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
-
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7791-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7791-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7791-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7791", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof0: spi@e6e20000 {
- compatible = "renesas,msiof-r8a7791",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e20000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 000>;
- dmas = <&dmac0 0x51>, <&dmac0 0x52>,
- <&dmac1 0x51>, <&dmac1 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof1: spi@e6e10000 {
- compatible = "renesas,msiof-r8a7791",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e10000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x55>, <&dmac0 0x56>,
- <&dmac1 0x55>, <&dmac1 0x56>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof2: spi@e6e00000 {
- compatible = "renesas,msiof-r8a7791",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 205>;
- dmas = <&dmac0 0x41>, <&dmac0 0x42>,
- <&dmac1 0x41>, <&dmac1 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 205>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- xhci: usb@ee000000 {
- compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
- reg = <0 0xee000000 0 0xc00>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
- phys = <&usb2 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- pci0: pci@ee090000 {
- compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
-
- usb@2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
- };
-
- pci1: pci@ee0d0000 {
- compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x10800 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
-
- usb@2,0 {
- reg = <0x11000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
- };
-
- pciec: pcie@fe000000 {
- compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
- reg = <0 0xfe000000 0 0x80000>;
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x00 0xff>;
- device_type = "pci";
- ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
- 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
- 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
- 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
- /* Map all possible DDR as inbound ranges */
- dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
- 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
- clock-names = "pcie", "pcie_bus";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 319>;
- status = "disabled";
- };
-
- ipmmu_sy0: mmu@e6280000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu@e6290000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu@e6740000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu@ec680000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu@fe951000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu@ffc80000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_gp: mmu@e62a0000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- rcar_sound: sound@ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7791",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7791_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6", "src.5",
- "src.4", "src.3", "src.2", "src.1", "src.0",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 06/16] ARM: dts: r8a7791: add soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7791.dtsi | 2909 ++++++++++++++++++++--------------------
1 file changed, 1489 insertions(+), 1420 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 38a9b8cb736d..de2af2199731 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -17,7 +17,6 @@
/ {
compatible = "renesas,r8a7791";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -102,1066 +101,1579 @@
};
};
- apmu at e6152000 {
- compatible = "renesas,r8a7791-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio0: gpio at e6050000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio0: gpio at e6050000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ gpio1: gpio at e6051000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio1: gpio at e6051000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gpio2: gpio at e6052000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio2: gpio at e6052000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio3: gpio at e6053000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio3: gpio at e6053000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio4: gpio at e6054000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- gpio4: gpio at e6054000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio5: gpio at e6055000 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- gpio5: gpio at e6055000 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ gpio6: gpio at e6055400 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
- gpio6: gpio at e6055400 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055400 0 0x50>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 192 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 905>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 905>;
- };
+ gpio7: gpio at e6055800 {
+ compatible = "renesas,gpio-r8a7791",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 904>;
+ };
- gpio7: gpio at e6055800 {
- compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055800 0 0x50>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 224 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 904>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 904>;
- };
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7791";
+ reg = <0 0xe6060000 0 0x250>;
+ };
- thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7791",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
- };
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7791-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ apmu at e6152000 {
+ compatible = "renesas,r8a7791-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- cmt0: timer at ffca0000 {
- compatible = "renesas,r8a7791-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7791-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
- cmt1: timer at e6130000 {
- compatible = "renesas,r8a7791-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7791-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
- irqc0: interrupt-controller at e61c0000 {
- compatible = "renesas,irqc-r8a7791", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ irqc0: interrupt-controller at e61c0000 {
+ compatible = "renesas,irqc-r8a7791", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- dmac0: dma-controller at e6700000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ thermal: thermal at e61f0000 {
+ compatible = "renesas,thermal-r8a7791",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
- dmac1: dma-controller at e6720000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ ipmmu_sy0: mmu at e6280000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ ipmmu_sy1: mmu at e6290000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ ipmmu_ds: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- usb_dmac0: dma-controller at e65a0000 {
- compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ ipmmu_mp: mmu at ec680000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- usb_dmac1: dma-controller at e65b0000 {
- compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
+ ipmmu_mx: mmu at fe951000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- /* The memory map in the User's Manual maps the cores to bus numbers */
- i2c0: i2c at e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- i2c1: i2c at e6518000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ ipmmu_gp: mmu at e62a0000 {
+ compatible = "renesas,ipmmu-r8a7791",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- i2c2: i2c at e6530000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- i2c3: i2c at e6540000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
- i2c4: i2c at e6520000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
- i2c5: i2c at e6528000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c at e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c6: i2c at e60b0000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- dmas = <&dmac0 0x77>, <&dmac0 0x78>,
- <&dmac1 0x77>, <&dmac1 0x78>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- status = "disabled";
- };
+ i2c1: i2c at e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c7: i2c at e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- status = "disabled";
- };
+ i2c2: i2c at e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c8: i2c at e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- status = "disabled";
- };
+ i2c3: i2c at e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7791";
- reg = <0 0xe6060000 0 0x250>;
- };
+ i2c4: i2c at e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- mmcif0: mmc at ee200000 {
- compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ i2c5: i2c at e6528000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7791",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ i2c6: i2c at e60b0000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7791",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
- sdhi1: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7791",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ i2c7: i2c at e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7791",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
- sdhi2: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7791",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ i2c8: i2c at e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7791",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ status = "disabled";
+ };
- scifa0: serial at e6c40000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7791",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
- scifa1: serial at e6c50000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ usbphy: usb-phy at e6590100 {
+ compatible = "renesas,usb-phy-r8a7791",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
- scifa2: serial at e6c60000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ usb0: usb-channel at 0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel at 2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
+ };
- scifa3: serial at e6c70000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
- };
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a7791-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- scifa4: serial at e6c78000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
- status = "disabled";
- };
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a7791-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
- scifa5: serial at e6c80000 {
- compatible = "renesas,scifa-r8a7791",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
- status = "disabled";
- };
+ dmac0: dma-controller at e6700000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- scifb0: serial at e6c20000 {
- compatible = "renesas,scifb-r8a7791",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ dmac1: dma-controller at e6720000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- scifb1: serial at e6c30000 {
- compatible = "renesas,scifb-r8a7791",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a7791",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- scifb2: serial at e6ce0000 {
- compatible = "renesas,scifb-r8a7791",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scifa0: serial at e6c40000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ scifa1: serial at e6c50000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- adc: adc at e6e54000 {
- compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
- reg = <0 0xe6e54000 0 64>;
- clocks = <&cpg CPG_MOD 901>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 901>;
- status = "disabled";
- };
+ scifa2: serial at e6c60000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scif2: serial at e6e58000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
- status = "disabled";
- };
+ scifa3: serial at e6c70000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
+ status = "disabled";
+ };
- scif3: serial at e6ea8000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
- status = "disabled";
- };
+ scifa4: serial at e6c78000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
+ status = "disabled";
+ };
- scif4: serial at e6ee0000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
- status = "disabled";
- };
+ scifa5: serial at e6c80000 {
+ compatible = "renesas,scifa-r8a7791",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
+ status = "disabled";
+ };
- scif5: serial at e6ee8000 {
- compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
+ scifb0: serial at e6c20000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- hscif0: serial at e62c0000 {
- compatible = "renesas,hscif-r8a7791",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ scifb1: serial at e6c30000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- hscif1: serial at e62c8000 {
- compatible = "renesas,hscif-r8a7791",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ scifb2: serial at e6ce0000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- hscif2: serial at e62d0000 {
- compatible = "renesas,hscif-r8a7791",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ scif2: serial at e6e58000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ scif3: serial at e6ea8000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
+ status = "disabled";
};
- };
- ether: ethernet at ee700000 {
- compatible = "renesas,ether-r8a7791",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ scif4: serial at e6ee0000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a7791",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ scif5: serial at e6ee8000 {
+ compatible = "renesas,scif-r8a7791",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
- sata0: sata at ee300000 {
- compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
- reg = <0 0xee300000 0 0x2000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 815>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 815>;
- status = "disabled";
- };
+ hscif0: serial at e62c0000 {
+ compatible = "renesas,hscif-r8a7791",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- sata1: sata at ee500000 {
- compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
- reg = <0 0xee500000 0 0x2000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 814>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 814>;
- status = "disabled";
- };
+ hscif1: serial at e62c8000 {
+ compatible = "renesas,hscif-r8a7791",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
- status = "disabled";
- };
+ hscif2: serial at e62d0000 {
+ compatible = "renesas,hscif-r8a7791",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
- usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7791",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- status = "disabled";
+ msiof0: spi at e6e20000 {
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 000>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- usb0: usb-channel at 0 {
- reg = <0>;
- #phy-cells = <1>;
+ msiof1: spi at e6e10000 {
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
- usb2: usb-channel at 2 {
- reg = <2>;
- #phy-cells = <1>;
+
+ msiof2: spi at e6e00000 {
+ compatible = "renesas,msiof-r8a7791",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
- };
- vin0: video at e6ef0000 {
- compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ adc: adc at e6e54000 {
+ compatible = "renesas,r8a7791-gyroadc",
+ "renesas,rcar-gyroadc";
+ reg = <0 0xe6e54000 0 64>;
+ clocks = <&cpg CPG_MOD 901>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 901>;
+ status = "disabled";
+ };
- vin1: video at e6ef1000 {
- compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ can0: can at e6e80000 {
+ compatible = "renesas,can-r8a7791",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
- vin2: video at e6ef2000 {
- compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
+ can1: can at e6e88000 {
+ compatible = "renesas,can-r8a7791",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
- vsp at fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7791",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
- vsp at fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7791",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
- vsp at fe938000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe938000 0 0x8000>;
- interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 127>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 127>;
- };
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a7791",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound at ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7791",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7791_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0", "src.9", "src.8",
+ "src.7", "src.6", "src.5", "src.4",
+ "src.3", "src.2", "src.1", "src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+ };
+
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7791",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- du: display at feb00000 {
- compatible = "renesas,du-r8a7791";
- reg = <0 0xfeb00000 0 0x40000>,
- <0 0xfeb90000 0 0x1c>;
- reg-names = "du", "lvds.0";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 726>;
- clock-names = "du.0", "du.1", "lvds.0";
- status = "disabled";
-
- ports {
+ xhci: usb at ee000000 {
+ compatible = "renesas,xhci-r8a7791",
+ "renesas,rcar-gen2-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ pci0: pci at ee090000 {
+ compatible = "renesas,pci-r8a7791",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pci1: pci at ee0d0000 {
+ compatible = "renesas,pci-r8a7791",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+ };
+
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7791",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7791",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi2: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7791",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc at ee200000 {
+ compatible = "renesas,mmcif-r8a7791",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ sata0: sata at ee300000 {
+ compatible = "renesas,sata-r8a7791",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+ sata1: sata at ee500000 {
+ compatible = "renesas,sata-r8a7791",
+ "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ status = "disabled";
+ };
+
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7791",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
+ };
- port at 0 {
- reg = <0>;
- du_out_rgb: endpoint {
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ pciec: pcie at fe000000 {
+ compatible = "renesas,pcie-r8a7791",
+ "renesas,pcie-rcar-gen2";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
+ 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+ vsp at fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp at fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ vsp at fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
+
+ jpu: jpeg-codec at fe980000 {
+ compatible = "renesas,jpu-r8a7791",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
+ };
+
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7791";
+ reg = <0 0xfeb00000 0 0x40000>,
+ <0 0xfeb90000 0 0x1c>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
};
- };
- port at 1 {
- reg = <1>;
- du_out_lvds0: endpoint {
+ port at 1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
};
};
};
- };
- can0: can at e6e80000 {
- compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
- };
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ cmt0: timer at ffca0000 {
+ compatible = "renesas,r8a7791-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- can1: can at e6e88000 {
- compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
+ cmt1: timer at e6130000 {
+ compatible = "renesas,r8a7791-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
};
- jpu: jpeg-codec at fe980000 {
- compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External root clock */
@@ -1222,447 +1734,4 @@
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
-
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7791-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7791-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7791-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7791", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof0: spi at e6e20000 {
- compatible = "renesas,msiof-r8a7791",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e20000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 000>;
- dmas = <&dmac0 0x51>, <&dmac0 0x52>,
- <&dmac1 0x51>, <&dmac1 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof1: spi at e6e10000 {
- compatible = "renesas,msiof-r8a7791",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e10000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x55>, <&dmac0 0x56>,
- <&dmac1 0x55>, <&dmac1 0x56>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof2: spi at e6e00000 {
- compatible = "renesas,msiof-r8a7791",
- "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 205>;
- dmas = <&dmac0 0x41>, <&dmac0 0x42>,
- <&dmac1 0x41>, <&dmac1 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 205>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- xhci: usb at ee000000 {
- compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
- reg = <0 0xee000000 0 0xc00>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
- phys = <&usb2 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- pci0: pci at ee090000 {
- compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
-
- usb at 2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
- };
-
- pci1: pci at ee0d0000 {
- compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x10800 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
-
- usb at 2,0 {
- reg = <0x11000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
- };
-
- pciec: pcie at fe000000 {
- compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
- reg = <0 0xfe000000 0 0x80000>;
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x00 0xff>;
- device_type = "pci";
- ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
- 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
- 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
- 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
- /* Map all possible DDR as inbound ranges */
- dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
- 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
- clock-names = "pcie", "pcie_bus";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 319>;
- status = "disabled";
- };
-
- ipmmu_sy0: mmu at e6280000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu at e6290000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu at ec680000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu at fe951000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_gp: mmu at e62a0000 {
- compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- rcar_sound: sound at ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7791",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7791_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6", "src.5",
- "src.4", "src.3", "src.2", "src.1", "src.0",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 07/16] ARM: dts: r8a7791: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort subnodes of root node to aid maintenance.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7791.dtsi | 134 ++++++++++++++++++++---------------------
1 file changed, 67 insertions(+), 67 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index de2af2199731..dc659351472f 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -39,6 +39,35 @@
vin2 = &vin2;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -82,23 +111,27 @@
};
};
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
- thermal-sensors = <&thermal>;
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
- trips {
- cpu-crit {
- temperature = <95000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
- cooling-maps {
- };
- };
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
};
soc {
@@ -1668,6 +1701,25 @@
};
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ };
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
@@ -1676,62 +1728,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_b: audio_clk_b {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External PCIe clock - can be overridden by the board */
- pcie_bus_clk: pcie_bus {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 07/16] ARM: dts: r8a7791: sort subnodes of root node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort subnodes of root node to aid maintenance.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7791.dtsi | 134 ++++++++++++++++++++---------------------
1 file changed, 67 insertions(+), 67 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index de2af2199731..dc659351472f 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -39,6 +39,35 @@
vin2 = &vin2;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -82,23 +111,27 @@
};
};
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
- thermal-sensors = <&thermal>;
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
- trips {
- cpu-crit {
- temperature = <95000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
- cooling-maps {
- };
- };
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
};
soc {
@@ -1668,6 +1701,25 @@
};
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ };
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
@@ -1676,62 +1728,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_b: audio_clk_b {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External PCIe clock - can be overridden by the board */
- pcie_bus_clk: pcie_bus {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 08/16] ARM: dts: r8a7792: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7792.dtsi | 498 ++++++++++++++++++++---------------------
1 file changed, 249 insertions(+), 249 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 3be15a158bad..268987ff0201 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -101,63 +101,6 @@
#size-cells = <2>;
ranges;
- apmu@e6152000 {
- compatible = "renesas,r8a7792-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
-
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
- irqc: interrupt-controller@e61c0000 {
- compatible = "renesas,irqc-r8a7792", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7792-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7792-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7792";
- reg = <0 0xe6060000 0 0x144>;
- };
-
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7792",
"renesas,rcar-gen2-gpio";
@@ -338,6 +281,155 @@
resets = <&cpg 913>;
};
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7792";
+ reg = <0 0xe6060000 0 0x144>;
+ };
+
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7792-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>;
+ clock-names = "extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ apmu@e6152000 {
+ compatible = "renesas,r8a7792-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
+
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7792-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7792-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ irqc: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7792", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
+
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
+
+ /* I2C doesn't need pinmux */
+ i2c0: i2c@e6508000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@e6518000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@e6530000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@e6540000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@e6520000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@e6528000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7792",
"renesas,rcar-dmac";
@@ -404,6 +496,35 @@
dma-channels = <15>;
};
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7792",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7792", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7792",
"renesas,rcar-gen2-scif", "renesas,scif";
@@ -500,162 +621,6 @@
status = "disabled";
};
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
- };
-
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7792",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- clocks = <&cpg CPG_MOD 314>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
-
- jpu: jpeg-codec@fe980000 {
- compatible = "renesas,jpu-r8a7792",
- "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
- };
-
- avb: ethernet@e6800000 {
- compatible = "renesas,etheravb-r8a7792",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- /* I2C doesn't need pinmux */
- i2c0: i2c@e6508000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c@e6518000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@e6530000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c3: i2c@e6540000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c4: i2c@e6520000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c5: i2c@e6528000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- i2c-scl-internal-delay-ns = <110>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7792", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7792",
"renesas,rcar-gen2-msiof";
@@ -688,34 +653,6 @@
status = "disabled";
};
- du: display@feb00000 {
- compatible = "renesas,du-r8a7792";
- reg = <0 0xfeb00000 0 0x40000>;
- reg-names = "du";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
- clock-names = "du.0", "du.1";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- du_out_rgb0: endpoint {
- };
- };
- port@1 {
- reg = <1>;
- du_out_rgb1: endpoint {
- };
- };
- };
- };
-
can0: can@e6e80000 {
compatible = "renesas,can-r8a7792",
"renesas,rcar-gen2-can";
@@ -808,6 +745,36 @@
status = "disabled";
};
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7792",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ clocks = <&cpg CPG_MOD 314>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
vsp@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
@@ -835,14 +802,47 @@
resets = <&cpg 127>;
};
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7792-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>;
- clock-names = "extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
+ jpu: jpeg-codec@fe980000 {
+ compatible = "renesas,jpu-r8a7792",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
+ };
+
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7792";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
+ };
+
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 08/16] ARM: dts: r8a7792: sort subnodes of soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7792.dtsi | 498 ++++++++++++++++++++---------------------
1 file changed, 249 insertions(+), 249 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 3be15a158bad..268987ff0201 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -101,63 +101,6 @@
#size-cells = <2>;
ranges;
- apmu at e6152000 {
- compatible = "renesas,r8a7792-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
-
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
- irqc: interrupt-controller at e61c0000 {
- compatible = "renesas,irqc-r8a7792", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7792-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7792-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7792";
- reg = <0 0xe6060000 0 0x144>;
- };
-
gpio0: gpio at e6050000 {
compatible = "renesas,gpio-r8a7792",
"renesas,rcar-gen2-gpio";
@@ -338,6 +281,155 @@
resets = <&cpg 913>;
};
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7792";
+ reg = <0 0xe6060000 0 0x144>;
+ };
+
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7792-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>;
+ clock-names = "extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ apmu at e6152000 {
+ compatible = "renesas,r8a7792-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
+
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7792-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7792-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ irqc: interrupt-controller at e61c0000 {
+ compatible = "renesas,irqc-r8a7792", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
+
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
+
+ /* I2C doesn't need pinmux */
+ i2c0: i2c at e6508000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c at e6518000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c at e6530000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c at e6540000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c at e6520000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c at e6528000 {
+ compatible = "renesas,i2c-r8a7792",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
dmac0: dma-controller at e6700000 {
compatible = "renesas,dmac-r8a7792",
"renesas,rcar-dmac";
@@ -404,6 +496,35 @@
dma-channels = <15>;
};
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a7792",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7792", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scif0: serial at e6e60000 {
compatible = "renesas,scif-r8a7792",
"renesas,rcar-gen2-scif", "renesas,scif";
@@ -500,162 +621,6 @@
status = "disabled";
};
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
- };
-
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7792",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- clocks = <&cpg CPG_MOD 314>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
-
- jpu: jpeg-codec at fe980000 {
- compatible = "renesas,jpu-r8a7792",
- "renesas,rcar-gen2-jpu";
- reg = <0 0xfe980000 0 0x10300>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 106>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 106>;
- };
-
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a7792",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- /* I2C doesn't need pinmux */
- i2c0: i2c at e6508000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c at e6518000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c at e6530000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c3: i2c at e6540000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c4: i2c at e6520000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- i2c-scl-internal-delay-ns = <6>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c5: i2c at e6528000 {
- compatible = "renesas,i2c-r8a7792",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- i2c-scl-internal-delay-ns = <110>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7792", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
msiof0: spi at e6e20000 {
compatible = "renesas,msiof-r8a7792",
"renesas,rcar-gen2-msiof";
@@ -688,34 +653,6 @@
status = "disabled";
};
- du: display at feb00000 {
- compatible = "renesas,du-r8a7792";
- reg = <0 0xfeb00000 0 0x40000>;
- reg-names = "du";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
- clock-names = "du.0", "du.1";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 0 {
- reg = <0>;
- du_out_rgb0: endpoint {
- };
- };
- port at 1 {
- reg = <1>;
- du_out_rgb1: endpoint {
- };
- };
- };
- };
-
can0: can at e6e80000 {
compatible = "renesas,can-r8a7792",
"renesas,rcar-gen2-can";
@@ -808,6 +745,36 @@
status = "disabled";
};
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7792",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ clocks = <&cpg CPG_MOD 314>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
vsp at fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
@@ -835,14 +802,47 @@
resets = <&cpg 127>;
};
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7792-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>;
- clock-names = "extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
+ jpu: jpeg-codec at fe980000 {
+ compatible = "renesas,jpu-r8a7792",
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 106>;
+ };
+
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7792";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
+ };
+
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 09/16] ARM: dts: r8a7793: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Consistently use a single space after a =.
This patch removes instances where a tab is used instead. It also avoids
running over 80 columns in width in one of the lines where whitespace is
updated.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index e95f4fb44dc4..ea4bc06c8e8a 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -228,9 +228,9 @@
};
thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7793",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
+ compatible = "renesas,thermal-r8a7793",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
@@ -1174,12 +1174,13 @@
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
- compatible = "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ compatible = "renesas,rcar_sound-r8a7793",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 09/16] ARM: dts: r8a7793: consistently use single space after =
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Consistently use a single space after a =.
This patch removes instances where a tab is used instead. It also avoids
running over 80 columns in width in one of the lines where whitespace is
updated.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index e95f4fb44dc4..ea4bc06c8e8a 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -228,9 +228,9 @@
};
thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7793",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
+ compatible = "renesas,thermal-r8a7793",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
@@ -1174,12 +1174,13 @@
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
- compatible = "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ compatible = "renesas,rcar_sound-r8a7793",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 10/16] ARM: dts: r8a7793: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 2325 +++++++++++++++++++++-------------------
1 file changed, 1193 insertions(+), 1132 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index ea4bc06c8e8a..d18a65c647bb 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -15,7 +15,6 @@
/ {
compatible = "renesas,r8a7793";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -74,958 +73,1273 @@
};
};
- apmu@e6152000 {
- compatible = "renesas,r8a7793-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
- thermal-sensors = <&thermal>;
+ apmu@e6152000 {
+ compatible = "renesas,r8a7793-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- trips {
- cpu-crit {
- temperature = <95000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
- cooling-maps {
- };
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
- };
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio0: gpio@e6050000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio1: gpio@e6051000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio2: gpio@e6052000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio3: gpio@e6053000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- gpio4: gpio@e6054000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- gpio5: gpio@e6055000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
- gpio6: gpio@e6055400 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055400 0 0x50>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 192 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 905>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 905>;
- };
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 904>;
+ };
- gpio7: gpio@e6055800 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055800 0 0x50>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 224 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 904>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 904>;
- };
+ thermal: thermal@e61f0000 {
+ compatible = "renesas,thermal-r8a7793",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
- thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7793",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
- };
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,r8a7793-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7793-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
- cmt0: timer@ffca0000 {
- compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ irqc0: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7793", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- cmt1: timer@e6130000 {
- compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- irqc0: interrupt-controller@e61c0000 {
- compatible = "renesas,irqc-r8a7793", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ dmac1: dma-controller@e6720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- audma0: dma-controller@ec700000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- audma1: dma-controller@ec720000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ i2c1: i2c@e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- /* The memory map in the User's Manual maps the cores to bus numbers */
- i2c0: i2c@e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c2: i2c@e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c1: i2c@e6518000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c3: i2c@e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c2: i2c@e6530000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c4: i2c@e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c3: i2c@e6540000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c5: i2c@e6528000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- i2c4: i2c@e6520000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c6: i2c@e60b0000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7793",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
- i2c5: i2c@e6528000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ i2c7: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7793",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
- i2c6: i2c@e60b0000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- dmas = <&dmac0 0x77>, <&dmac0 0x78>,
- <&dmac1 0x77>, <&dmac1 0x78>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- status = "disabled";
- };
+ i2c8: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7793",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ status = "disabled";
+ };
- i2c7: i2c@e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- status = "disabled";
- };
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7793";
+ reg = <0 0xe6060000 0 0x250>;
+ };
- i2c8: i2c@e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- status = "disabled";
- };
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7793";
- reg = <0 0xe6060000 0 0x250>;
- };
+ sdhi1: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ sdhi2: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
- sdhi1: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7793",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
- sdhi2: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ scifa0: serial@e6c40000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- mmcif0: mmc@ee200000 {
- compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ scifa1: serial@e6c50000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- scifa0: serial@e6c40000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ scifa2: serial@e6c60000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scifa1: serial@e6c50000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ scifa3: serial@e6c70000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
+ status = "disabled";
+ };
- scifa2: serial@e6c60000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ scifa4: serial@e6c78000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
+ status = "disabled";
+ };
- scifa3: serial@e6c70000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
- };
+ scifa5: serial@e6c80000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
+ status = "disabled";
+ };
- scifa4: serial@e6c78000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
- status = "disabled";
- };
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- scifa5: serial@e6c80000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
- status = "disabled";
- };
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- scifb0: serial@e6c20000 {
- compatible = "renesas,scifb-r8a7793",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- scifb1: serial@e6c30000 {
- compatible = "renesas,scifb-r8a7793",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- scifb2: serial@e6ce0000 {
- compatible = "renesas,scifb-r8a7793",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- scif0: serial@e6e60000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scif2: serial@e6e58000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
- scif1: serial@e6e68000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ scif3: serial@e6ea8000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
+ status = "disabled";
+ };
- scif2: serial@e6e58000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
- status = "disabled";
- };
+ scif4: serial@e6ee0000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
- scif3: serial@e6ea8000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
- status = "disabled";
- };
+ scif5: serial@e6ee8000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
- scif4: serial@e6ee0000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
- status = "disabled";
- };
+ hscif0: serial@e62c0000 {
+ compatible = "renesas,hscif-r8a7793",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- scif5: serial@e6ee8000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
+ hscif1: serial@e62c8000 {
+ compatible = "renesas,hscif-r8a7793",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- hscif0: serial@e62c0000 {
- compatible = "renesas,hscif-r8a7793",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ hscif2: serial@e62d0000 {
+ compatible = "renesas,hscif-r8a7793",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
- hscif1: serial@e62c8000 {
- compatible = "renesas,hscif-r8a7793",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- hscif2: serial@e62d0000 {
- compatible = "renesas,hscif-r8a7793",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ ether: ethernet@ee700000 {
+ compatible = "renesas,ether-r8a7793",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
};
- };
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7793",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
- vin0: video@e6ef0000 {
- compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ vin2: video@e6ef2000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
+ };
- vin1: video@e6ef1000 {
- compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- vin2: video@e6ef2000 {
- compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7793";
+ reg = <0 0xfeb00000 0 0x40000>,
+ <0 0xfeb90000 0 0x1c>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7793", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ can0: can@e6e80000 {
+ compatible = "renesas,can-r8a7793",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
- du: display@feb00000 {
- compatible = "renesas,du-r8a7793";
- reg = <0 0xfeb00000 0 0x40000>,
- <0 0xfeb90000 0 0x1c>;
- reg-names = "du", "lvds.0";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 726>;
- clock-names = "du.0", "du.1", "lvds.0";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ can1: can@e6e88000 {
+ compatible = "renesas,can-r8a7793",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7793-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ ipmmu_sy0: mmu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- port@0 {
- reg = <0>;
- du_out_rgb: endpoint {
+ ipmmu_sy1: mmu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu@e62a0000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7793",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7793_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
};
};
- port@1 {
- reg = <1>;
- du_out_lvds0: endpoint {
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
};
};
};
+
+ /* Special CPG clocks */
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7793-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
};
- can0: can@e6e80000 {
- compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ };
+ };
};
- can1: can@e6e88000 {
- compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External root clock */
@@ -1079,257 +1393,4 @@
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
-
- /* Special CPG clocks */
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7793-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7793-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7793-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu@e6280000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu@e6290000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu@e6740000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu@ec680000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu@fe951000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu@ffc80000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_gp: mmu@e62a0000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- rcar_sound: sound@ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7793",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7793_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6", "src.5",
- "src.4", "src.3", "src.2", "src.1", "src.0",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 10/16] ARM: dts: r8a7793: add soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 2325 +++++++++++++++++++++-------------------
1 file changed, 1193 insertions(+), 1132 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index ea4bc06c8e8a..d18a65c647bb 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -15,7 +15,6 @@
/ {
compatible = "renesas,r8a7793";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -74,958 +73,1273 @@
};
};
- apmu at e6152000 {
- compatible = "renesas,r8a7793-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
- thermal-sensors = <&thermal>;
+ apmu at e6152000 {
+ compatible = "renesas,r8a7793-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- trips {
- cpu-crit {
- temperature = <95000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
- cooling-maps {
- };
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
- };
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ gpio0: gpio at e6050000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio0: gpio at e6050000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ gpio1: gpio at e6051000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio1: gpio at e6051000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gpio2: gpio at e6052000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio2: gpio at e6052000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio3: gpio at e6053000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio3: gpio at e6053000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio4: gpio at e6054000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- gpio4: gpio at e6054000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio5: gpio at e6055000 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- gpio5: gpio at e6055000 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ gpio6: gpio at e6055400 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
- gpio6: gpio at e6055400 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055400 0 0x50>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 192 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 905>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 905>;
- };
+ gpio7: gpio at e6055800 {
+ compatible = "renesas,gpio-r8a7793",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 904>;
+ };
- gpio7: gpio at e6055800 {
- compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055800 0 0x50>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 224 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 904>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 904>;
- };
+ thermal: thermal at e61f0000 {
+ compatible = "renesas,thermal-r8a7793",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
- thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7793",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
- };
+ cmt0: timer at ffca0000 {
+ compatible = "renesas,r8a7793-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ cmt1: timer at e6130000 {
+ compatible = "renesas,r8a7793-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
- cmt0: timer at ffca0000 {
- compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ irqc0: interrupt-controller at e61c0000 {
+ compatible = "renesas,irqc-r8a7793", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- cmt1: timer at e6130000 {
- compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ dmac0: dma-controller at e6700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- irqc0: interrupt-controller at e61c0000 {
- compatible = "renesas,irqc-r8a7793", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ dmac1: dma-controller at e6720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- dmac0: dma-controller at e6700000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- dmac1: dma-controller at e6720000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c at e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ i2c1: i2c at e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- /* The memory map in the User's Manual maps the cores to bus numbers */
- i2c0: i2c at e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c2: i2c at e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c1: i2c at e6518000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c3: i2c at e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c2: i2c at e6530000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c4: i2c at e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c3: i2c at e6540000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c5: i2c at e6528000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7793",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
- i2c4: i2c at e6520000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c6: i2c at e60b0000 {
+ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7793",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
- i2c5: i2c at e6528000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
+ i2c7: i2c at e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7793",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
- i2c6: i2c at e60b0000 {
- /* doesn't need pinmux */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- dmas = <&dmac0 0x77>, <&dmac0 0x78>,
- <&dmac1 0x77>, <&dmac1 0x78>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- status = "disabled";
- };
+ i2c8: i2c at e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7793",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ status = "disabled";
+ };
- i2c7: i2c at e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- status = "disabled";
- };
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7793";
+ reg = <0 0xe6060000 0 0x250>;
+ };
- i2c8: i2c at e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- status = "disabled";
- };
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7793";
- reg = <0 0xe6060000 0 0x250>;
- };
+ sdhi1: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ sdhi2: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
- sdhi1: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ mmcif0: mmc at ee200000 {
+ compatible = "renesas,mmcif-r8a7793",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
- sdhi2: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ scifa0: serial at e6c40000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- mmcif0: mmc at ee200000 {
- compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- max-frequency = <97500000>;
- };
+ scifa1: serial at e6c50000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- scifa0: serial at e6c40000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ scifa2: serial at e6c60000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scifa1: serial at e6c50000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ scifa3: serial at e6c70000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
+ status = "disabled";
+ };
- scifa2: serial at e6c60000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ scifa4: serial at e6c78000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
+ status = "disabled";
+ };
- scifa3: serial at e6c70000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
- };
+ scifa5: serial at e6c80000 {
+ compatible = "renesas,scifa-r8a7793",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
+ status = "disabled";
+ };
- scifa4: serial at e6c78000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
- status = "disabled";
- };
+ scifb0: serial at e6c20000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- scifa5: serial at e6c80000 {
- compatible = "renesas,scifa-r8a7793",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
- status = "disabled";
- };
+ scifb1: serial at e6c30000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- scifb0: serial at e6c20000 {
- compatible = "renesas,scifb-r8a7793",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ scifb2: serial at e6ce0000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- scifb1: serial at e6c30000 {
- compatible = "renesas,scifb-r8a7793",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- scifb2: serial at e6ce0000 {
- compatible = "renesas,scifb-r8a7793",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scif2: serial at e6e58000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
- scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ scif3: serial at e6ea8000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
+ status = "disabled";
+ };
- scif2: serial at e6e58000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
- status = "disabled";
- };
+ scif4: serial at e6ee0000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
- scif3: serial at e6ea8000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
- status = "disabled";
- };
+ scif5: serial at e6ee8000 {
+ compatible = "renesas,scif-r8a7793",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
- scif4: serial at e6ee0000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
- status = "disabled";
- };
+ hscif0: serial at e62c0000 {
+ compatible = "renesas,hscif-r8a7793",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- scif5: serial at e6ee8000 {
- compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
+ hscif1: serial at e62c8000 {
+ compatible = "renesas,hscif-r8a7793",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- hscif0: serial at e62c0000 {
- compatible = "renesas,hscif-r8a7793",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ hscif2: serial at e62d0000 {
+ compatible = "renesas,hscif-r8a7793",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
- hscif1: serial at e62c8000 {
- compatible = "renesas,hscif-r8a7793",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- hscif2: serial at e62d0000 {
- compatible = "renesas,hscif-r8a7793",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7793",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
};
- };
- ether: ethernet at ee700000 {
- compatible = "renesas,ether-r8a7793",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
- vin0: video at e6ef0000 {
- compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
+ };
- vin1: video at e6ef1000 {
- compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- vin2: video at e6ef2000 {
- compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7793";
+ reg = <0 0xfeb00000 0 0x40000>,
+ <0 0xfeb90000 0 0x1c>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7793", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ can0: can at e6e80000 {
+ compatible = "renesas,can-r8a7793",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
- du: display at feb00000 {
- compatible = "renesas,du-r8a7793";
- reg = <0 0xfeb00000 0 0x40000>,
- <0 0xfeb90000 0 0x1c>;
- reg-names = "du", "lvds.0";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 726>;
- clock-names = "du.0", "du.1", "lvds.0";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ can1: can at e6e88000 {
+ compatible = "renesas,can-r8a7793",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7793-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ ipmmu_sy0: mmu at e6280000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
- port at 0 {
- reg = <0>;
- du_out_rgb: endpoint {
+ ipmmu_sy1: mmu at e6290000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu at ec680000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu at fe951000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu at e62a0000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound at ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7793",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7793_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
};
};
- port at 1 {
- reg = <1>;
- du_out_lvds0: endpoint {
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
};
};
};
+
+ /* Special CPG clocks */
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7793-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
};
- can0: can at e6e80000 {
- compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ };
+ };
};
- can1: can at e6e88000 {
- compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External root clock */
@@ -1079,257 +1393,4 @@
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
-
- /* Special CPG clocks */
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7793-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7793-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7793-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu at e6280000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu at e6290000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu at ec680000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu at fe951000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_gp: mmu at e62a0000 {
- compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- rcar_sound: sound at ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7793",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
- <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
- <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
- <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
- <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
- <&cpg CPG_CORE R8A7793_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6", "src.5",
- "src.4", "src.3", "src.2", "src.1", "src.0",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma1 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma1 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,src {
- src0: src-0 {
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x85>, <&audma1 0x9a>;
- dma-names = "rx", "tx";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma1 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma1 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma1 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma1 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma1 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma1 0xb4>;
- dma-names = "rx", "tx";
- };
- src7: src-7 {
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x93>, <&audma1 0xb6>;
- dma-names = "rx", "tx";
- };
- src8: src-8 {
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x95>, <&audma1 0xb8>;
- dma-names = "rx", "tx";
- };
- src9: src-9 {
- interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x97>, <&audma1 0xba>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 11/16] ARM: dts: r8a7793: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 872 ++++++++++++++++++++---------------------
1 file changed, 436 insertions(+), 436 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index d18a65c647bb..f2b58a28cee9 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -81,28 +81,6 @@
#size-cells = <2>;
ranges;
- apmu@e6152000 {
- compatible = "renesas,r8a7793-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
-
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
@@ -223,50 +201,37 @@
resets = <&cpg 904>;
};
- thermal: thermal@e61f0000 {
- compatible = "renesas,thermal-r8a7793",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7793";
+ reg = <0 0xe6060000 0 0x250>;
};
- cmt0: timer@ffca0000 {
- compatible = "renesas,r8a7793-cmt0",
- "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
+ /* Special CPG clocks */
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7793-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- status = "disabled";
+ apmu@e6152000 {
+ compatible = "renesas,r8a7793-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
};
- cmt1: timer@e6130000 {
- compatible = "renesas,r8a7793-cmt1",
- "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7793-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
- status = "disabled";
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
};
irqc0: interrupt-controller@e61c0000 {
@@ -289,132 +254,101 @@
resets = <&cpg 407>;
};
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
+ thermal: thermal@e61f0000 {
+ compatible = "renesas,thermal-r8a7793",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
};
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_sy0: mmu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma0: dma-controller@ec700000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_sy1: mmu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma1: dma-controller@ec720000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_ds: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu@e62a0000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
/* The memory map in the User's Manual maps the cores to
@@ -557,70 +491,86 @@
status = "disabled";
};
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7793";
- reg = <0 0xe6060000 0 0x250>;
- };
-
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
-
- sdhi1: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- sdhi2: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ dmac1: dma-controller@e6720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- mmcif0: mmc@ee200000 {
- compatible = "renesas,mmcif-r8a7793",
- "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
- max-frequency = <97500000>;
};
scifa0: serial@e6c40000 {
@@ -902,117 +852,6 @@
status = "disabled";
};
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
- };
-
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7793",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- vin0: video@e6ef0000 {
- compatible = "renesas,vin-r8a7793",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
-
- vin1: video@e6ef1000 {
- compatible = "renesas,vin-r8a7793",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
-
- vin2: video@e6ef2000 {
- compatible = "renesas,vin-r8a7793",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
-
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7793", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- du: display@feb00000 {
- compatible = "renesas,du-r8a7793";
- reg = <0 0xfeb00000 0 0x40000>,
- <0 0xfeb90000 0 0x1c>;
- reg-names = "du", "lvds.0";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 726>;
- clock-names = "du.0", "du.1", "lvds.0";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- du_out_rgb: endpoint {
- };
- };
- port@1 {
- reg = <1>;
- du_out_lvds0: endpoint {
- };
- };
- };
- };
-
can0: can@e6e80000 {
compatible = "renesas,can-r8a7793",
"renesas,rcar-gen2-can";
@@ -1039,86 +878,36 @@
status = "disabled";
};
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7793-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7793-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu@e6280000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu@e6290000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu@e6740000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu@ec680000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu@fe951000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
- ipmmu_rt: mmu@ffc80000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
- ipmmu_gp: mmu@e62a0000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin2: video@e6ef2000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
status = "disabled";
};
@@ -1153,14 +942,14 @@
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7793_CLK_M2>;
clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6",
- "ssi.5", "ssi.4", "ssi.3", "ssi.2",
- "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6",
- "src.5", "src.4", "src.3", "src.2",
- "src.1", "src.0",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>,
@@ -1303,15 +1092,226 @@
};
};
- /* Special CPG clocks */
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7793-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi2: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7793",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ ether: ethernet@ee700000 {
+ compatible = "renesas,ether-r8a7793",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7793";
+ reg = <0 0xfeb00000 0 0x40000>,
+ <0 0xfeb90000 0 0x1c>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
+
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,r8a7793-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7793-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 11/16] ARM: dts: r8a7793: sort subnodes of soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 872 ++++++++++++++++++++---------------------
1 file changed, 436 insertions(+), 436 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index d18a65c647bb..f2b58a28cee9 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -81,28 +81,6 @@
#size-cells = <2>;
ranges;
- apmu at e6152000 {
- compatible = "renesas,r8a7793-apmu", "renesas,apmu";
- reg = <0 0xe6152000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
-
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
gpio0: gpio at e6050000 {
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
@@ -223,50 +201,37 @@
resets = <&cpg 904>;
};
- thermal: thermal at e61f0000 {
- compatible = "renesas,thermal-r8a7793",
- "renesas,rcar-gen2-thermal",
- "renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <0>;
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7793";
+ reg = <0 0xe6060000 0 0x250>;
};
- cmt0: timer at ffca0000 {
- compatible = "renesas,r8a7793-cmt0",
- "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
+ /* Special CPG clocks */
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7793-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- status = "disabled";
+ apmu at e6152000 {
+ compatible = "renesas,r8a7793-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
};
- cmt1: timer at e6130000 {
- compatible = "renesas,r8a7793-cmt1",
- "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7793-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
- status = "disabled";
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
};
irqc0: interrupt-controller at e61c0000 {
@@ -289,132 +254,101 @@
resets = <&cpg 407>;
};
- dmac0: dma-controller at e6700000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
+ thermal: thermal at e61f0000 {
+ compatible = "renesas,thermal-r8a7793",
+ "renesas,rcar-gen2-thermal",
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
};
- dmac1: dma-controller at e6720000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_sy0: mmu at e6280000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_sy1: mmu at e6290000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7793",
- "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_ds: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu at ec680000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu at fe951000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xffc80000 0 0x1000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu at e62a0000 {
+ compatible = "renesas,ipmmu-r8a7793",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
/* The memory map in the User's Manual maps the cores to
@@ -557,70 +491,86 @@
status = "disabled";
};
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7793";
- reg = <0 0xe6060000 0 0x250>;
- };
-
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
-
- sdhi1: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ dmac0: dma-controller at e6700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- sdhi2: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7793",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
+ dmac1: dma-controller at e6720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- mmcif0: mmc at ee200000 {
- compatible = "renesas,mmcif-r8a7793",
- "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
- max-frequency = <97500000>;
};
scifa0: serial at e6c40000 {
@@ -902,117 +852,6 @@
status = "disabled";
};
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
- };
-
- ether: ethernet at ee700000 {
- compatible = "renesas,ether-r8a7793",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- vin0: video at e6ef0000 {
- compatible = "renesas,vin-r8a7793",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
-
- vin1: video at e6ef1000 {
- compatible = "renesas,vin-r8a7793",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
-
- vin2: video at e6ef2000 {
- compatible = "renesas,vin-r8a7793",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef2000 0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 809>;
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 809>;
- status = "disabled";
- };
-
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7793", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- du: display at feb00000 {
- compatible = "renesas,du-r8a7793";
- reg = <0 0xfeb00000 0 0x40000>,
- <0 0xfeb90000 0 0x1c>;
- reg-names = "du", "lvds.0";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 726>;
- clock-names = "du.0", "du.1", "lvds.0";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 0 {
- reg = <0>;
- du_out_rgb: endpoint {
- };
- };
- port at 1 {
- reg = <1>;
- du_out_lvds0: endpoint {
- };
- };
- };
- };
-
can0: can at e6e80000 {
compatible = "renesas,can-r8a7793",
"renesas,rcar-gen2-can";
@@ -1039,86 +878,36 @@
status = "disabled";
};
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7793-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7793-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu at e6280000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu at e6290000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu at ec680000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu at fe951000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xffc80000 0 0x1000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
- ipmmu_gp: mmu at e62a0000 {
- compatible = "renesas,ipmmu-r8a7793",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a7793",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
status = "disabled";
};
@@ -1153,14 +942,14 @@
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7793_CLK_M2>;
clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6",
- "ssi.5", "ssi.4", "ssi.3", "ssi.2",
- "ssi.1", "ssi.0",
- "src.9", "src.8", "src.7", "src.6",
- "src.5", "src.4", "src.3", "src.2",
- "src.1", "src.0",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>,
@@ -1303,15 +1092,226 @@
};
};
- /* Special CPG clocks */
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7793-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7793",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi2: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7793",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc at ee200000 {
+ compatible = "renesas,mmcif-r8a7793",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7793",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7793";
+ reg = <0 0xfeb00000 0 0x40000>,
+ <0 0xfeb90000 0 0x1c>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
+
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ cmt0: timer at ffca0000 {
+ compatible = "renesas,r8a7793-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
+
+ cmt1: timer at e6130000 {
+ compatible = "renesas,r8a7793-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 12/16] ARM: dts: r8a7793: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 90 +++++++++++++++++++++---------------------
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index f2b58a28cee9..aa7d7792fb13 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -31,6 +31,35 @@
spi0 = &qspi;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -73,6 +102,22 @@
};
};
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -1342,55 +1387,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_b: audio_clk_b {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 12/16] ARM: dts: r8a7793: sort subnodes of root node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7793.dtsi | 90 +++++++++++++++++++++---------------------
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index f2b58a28cee9..aa7d7792fb13 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -31,6 +31,35 @@
spi0 = &qspi;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -73,6 +102,22 @@
};
};
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -1342,55 +1387,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_b: audio_clk_b {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 13/16] ARM: dts: r8a7794: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Consistently use a single space after a =.
This patch removes instances where a tab is used instead.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 38 +++++++++++++++++++-------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 106b4e1649ff..79263377ded3 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -319,20 +319,20 @@
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
"ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
@@ -1186,11 +1186,11 @@
*/
compatible = "renesas,rcar_sound-r8a7794",
"renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 13/16] ARM: dts: r8a7794: consistently use single space after =
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Consistently use a single space after a =.
This patch removes instances where a tab is used instead.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 38 +++++++++++++++++++-------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 106b4e1649ff..79263377ded3 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -319,20 +319,20 @@
audma0: dma-controller at ec700000 {
compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
"ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
@@ -1186,11 +1186,11 @@
*/
compatible = "renesas,rcar_sound-r8a7794",
"renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 14/16] ARM: dts: r8a7794: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 2358 ++++++++++++++++++++--------------------
1 file changed, 1205 insertions(+), 1153 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 79263377ded3..0d65069b1a89 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -16,7 +16,6 @@
/ {
compatible = "renesas,r8a7794";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -67,985 +66,1293 @@
};
};
- apmu@e6151000 {
- compatible = "renesas,r8a7794-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
- gpio0: gpio@e6050000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ apmu@e6151000 {
+ compatible = "renesas,r8a7794-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- gpio1: gpio@e6051000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
- gpio2: gpio@e6052000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio3: gpio@e6053000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio4: gpio@e6054000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio5: gpio@e6055000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 28>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio6: gpio@e6055400 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055400 0 0x50>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 192 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 905>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 905>;
- };
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- cmt0: timer@ffca0000 {
- compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 28>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- cmt1: timer@e6130000 {
- compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,r8a7794-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- irqc0: interrupt-controller@e61c0000 {
- compatible = "renesas,irqc-r8a7794", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7794-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7794";
- reg = <0 0xe6060000 0 0x11c>;
- };
+ irqc0: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7794", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7794";
+ reg = <0 0xe6060000 0 0x11c>;
+ };
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- audma0: dma-controller@ec700000 {
- compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
- "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ dmac1: dma-controller@e6720000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- scifa0: serial@e6c40000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3", "ch4",
+ "ch5", "ch6", "ch7", "ch8", "ch9",
+ "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- scifa1: serial@e6c50000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ scifa0: serial@e6c40000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- scifa2: serial@e6c60000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ scifa1: serial@e6c50000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- scifa3: serial@e6c70000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
- };
+ scifa2: serial@e6c60000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scifa4: serial@e6c78000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
- status = "disabled";
- };
+ scifa3: serial@e6c70000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
+ status = "disabled";
+ };
- scifa5: serial@e6c80000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
- status = "disabled";
- };
+ scifa4: serial@e6c78000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
+ status = "disabled";
+ };
- scifb0: serial@e6c20000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ scifa5: serial@e6c80000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
+ status = "disabled";
+ };
- scifb1: serial@e6c30000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- scifb2: serial@e6ce0000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- scif0: serial@e6e60000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- scif1: serial@e6e68000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- scif2: serial@e6e58000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
- status = "disabled";
- };
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- scif3: serial@e6ea8000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
- status = "disabled";
- };
+ scif2: serial@e6e58000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
- scif4: serial@e6ee0000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
- status = "disabled";
- };
+ scif3: serial@e6ea8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
+ status = "disabled";
+ };
- scif5: serial@e6ee8000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
+ scif4: serial@e6ee0000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
- hscif0: serial@e62c0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ scif5: serial@e6ee8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
- hscif1: serial@e62c8000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ hscif0: serial@e62c0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- hscif2: serial@e62d0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
+ hscif1: serial@e62c8000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ hscif2: serial@e62d0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
- };
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7794",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ ether: ethernet@ee700000 {
+ compatible = "renesas,ether-r8a7794",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- avb: ethernet@e6800000 {
- compatible = "renesas,etheravb-r8a7794",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7794",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- /* The memory map in the User's Manual maps the cores to bus numbers */
- i2c0: i2c@e6508000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c@e6508000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c1: i2c@e6518000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c1: i2c@e6518000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c2: i2c@e6530000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c2: i2c@e6530000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c3: i2c@e6540000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c3: i2c@e6540000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c4: i2c@e6520000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c4: i2c@e6520000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c5: i2c@e6528000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c5: i2c@e6528000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c6: i2c@e6500000 {
- compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ i2c6: i2c@e6500000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- i2c7: i2c@e6510000 {
- compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ i2c7: i2c@e6510000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- mmcif0: mmc@ee200000 {
- compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- };
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7794",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
- sdhi1: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ sdhi1: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
- sdhi2: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ sdhi2: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7794", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7794", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- vin0: video@e6ef0000 {
- compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
- vin1: video@e6ef1000 {
- compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
- pci0: pci@ee090000 {
- compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
};
- usb@2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
+ pci1: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
};
- };
- pci1: pci@ee0d0000 {
- compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x10800 0 0 0 0>;
- phys = <&usb2 0>;
+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7794",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
phy-names = "usb";
+ status = "disabled";
};
- usb@2,0 {
- reg = <0x11000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7794",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
+
+ usb0: usb-channel@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
};
- };
- hsusb: usb@e6590000 {
- compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
- status = "disabled";
- };
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
- usbphy: usb-phy@e6590100 {
- compatible = "renesas,usb-phy-r8a7794",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- status = "disabled";
+ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
- usb0: usb-channel@0 {
- reg = <0>;
- #phy-cells = <1>;
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7794";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
};
- usb2: usb-channel@2 {
- reg = <2>;
- #phy-cells = <1>;
+
+ can0: can@e6e80000 {
+ compatible = "renesas,can-r8a7794",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
};
- };
- vsp@fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ can1: can@e6e88000 {
+ compatible = "renesas,can-r8a7794",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
- vsp@fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7794-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- du: display@feb00000 {
- compatible = "renesas,du-r8a7794";
- reg = <0 0xfeb00000 0 0x40000>;
- reg-names = "du";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
- clock-names = "du.0", "du.1";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7794-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
- port@0 {
- reg = <0>;
- du_out_rgb0: endpoint {
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7794-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ ipmmu_sy0: mmu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_sy1: mmu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu@e62a0000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7794",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
+ <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
+ <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
+ <&cpg CPG_CORE R8A7794_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.6", "src.5", "src.4", "src.3",
+ "src.2", "src.1",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma0 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma0 0xbe>;
+ dma-names = "tx";
};
};
- port@1 {
- reg = <1>;
- du_out_rgb1: endpoint {
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src-0 {
+ status = "disabled";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma0 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma0 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma0 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma0 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma0 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma0 0x02>,
+ <&audma0 0x15>, <&audma0 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma0 0x04>,
+ <&audma0 0x49>, <&audma0 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma0 0x06>,
+ <&audma0 0x63>, <&audma0 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma0 0x08>,
+ <&audma0 0x6f>, <&audma0 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma0 0x0a>,
+ <&audma0 0x71>, <&audma0 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma0 0x0c>,
+ <&audma0 0x73>, <&audma0 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma0 0x0e>,
+ <&audma0 0x75>, <&audma0 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma0 0x10>,
+ <&audma0 0x79>, <&audma0 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma0 0x12>,
+ <&audma0 0x7b>, <&audma0 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma0 0x14>,
+ <&audma0 0x7d>, <&audma0 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
};
};
};
};
- can0: can@e6e80000 {
- compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- can1: can@e6e88000 {
- compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
- };
/* External root clock */
extal_clk: extal {
@@ -1098,259 +1405,4 @@
#clock-cells = <0>;
clock-frequency = <0>;
};
-
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7794-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7794-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7794-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu@e6280000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu@e6290000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu@e6740000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu@ec680000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu@fe951000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_gp: mmu@e62a0000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- rcar_sound: sound@ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7794",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
- <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
- <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
- <&cpg CPG_CORE R8A7794_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.6", "src.5", "src.4", "src.3", "src.2",
- "src.1",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src-0 {
- status = "disabled";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma0 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma0 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma0 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma0 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma0 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma0 0xb4>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma0 0x02>,
- <&audma0 0x15>, <&audma0 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma0 0x04>,
- <&audma0 0x49>, <&audma0 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma0 0x06>,
- <&audma0 0x63>, <&audma0 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma0 0x08>,
- <&audma0 0x6f>, <&audma0 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma0 0x0a>,
- <&audma0 0x71>, <&audma0 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma0 0x0c>,
- <&audma0 0x73>, <&audma0 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma0 0x0e>,
- <&audma0 0x75>, <&audma0 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma0 0x10>,
- <&audma0 0x79>, <&audma0 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma0 0x12>,
- <&audma0 0x7b>, <&audma0 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma0 0x14>,
- <&audma0 0x7d>, <&audma0 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 14/16] ARM: dts: r8a7794: add soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.
The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node. To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 2358 ++++++++++++++++++++--------------------
1 file changed, 1205 insertions(+), 1153 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 79263377ded3..0d65069b1a89 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -16,7 +16,6 @@
/ {
compatible = "renesas,r8a7794";
- interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -67,985 +66,1293 @@
};
};
- apmu at e6151000 {
- compatible = "renesas,r8a7794-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
- gpio0: gpio at e6050000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
+ apmu at e6151000 {
+ compatible = "renesas,r8a7794-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- gpio1: gpio at e6051000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
- };
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
- gpio2: gpio at e6052000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
- };
+ gpio0: gpio at e6050000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
- gpio3: gpio at e6053000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
- };
+ gpio1: gpio at e6051000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
- gpio4: gpio at e6054000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
- };
+ gpio2: gpio at e6052000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
- gpio5: gpio at e6055000 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 28>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
- };
+ gpio3: gpio at e6053000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
- gpio6: gpio at e6055400 {
- compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
- reg = <0 0xe6055400 0 0x50>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 192 26>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 905>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 905>;
- };
+ gpio4: gpio at e6054000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
- cmt0: timer at ffca0000 {
- compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
-
- status = "disabled";
- };
+ gpio5: gpio at e6055000 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 28>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
- cmt1: timer at e6130000 {
- compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
-
- status = "disabled";
- };
+ gpio6: gpio at e6055400 {
+ compatible = "renesas,gpio-r8a7794",
+ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
+ cmt0: timer at ffca0000 {
+ compatible = "renesas,r8a7794-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
- irqc0: interrupt-controller at e61c0000 {
- compatible = "renesas,irqc-r8a7794", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
+ cmt1: timer at e6130000 {
+ compatible = "renesas,r8a7794-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7794";
- reg = <0 0xe6060000 0 0x11c>;
- };
+ irqc0: interrupt-controller at e61c0000 {
+ compatible = "renesas,irqc-r8a7794", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
- dmac0: dma-controller at e6700000 {
- compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7794";
+ reg = <0 0xe6060000 0 0x11c>;
+ };
- dmac1: dma-controller at e6720000 {
- compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
+ dmac0: dma-controller at e6700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
- "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
- };
+ dmac1: dma-controller at e6720000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
- scifa0: serial at e6c40000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3", "ch4",
+ "ch5", "ch6", "ch7", "ch8", "ch9",
+ "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
- scifa1: serial at e6c50000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
+ scifa0: serial at e6c40000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
- scifa2: serial at e6c60000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
+ scifa1: serial at e6c50000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
- scifa3: serial at e6c70000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
- };
+ scifa2: serial at e6c60000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
- scifa4: serial at e6c78000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
- status = "disabled";
- };
+ scifa3: serial at e6c70000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1106>;
+ status = "disabled";
+ };
- scifa5: serial at e6c80000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
- status = "disabled";
- };
+ scifa4: serial at e6c78000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1107>;
+ status = "disabled";
+ };
- scifb0: serial at e6c20000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
+ scifa5: serial at e6c80000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1108>;
+ status = "disabled";
+ };
- scifb1: serial at e6c30000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
+ scifb0: serial at e6c20000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
- scifb2: serial at e6ce0000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
+ scifb1: serial at e6c30000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
- scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
+ scifb2: serial at e6ce0000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 216>;
+ status = "disabled";
+ };
- scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
- scif2: serial at e6e58000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
- status = "disabled";
- };
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 720>;
+ status = "disabled";
+ };
- scif3: serial at e6ea8000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
- status = "disabled";
- };
+ scif2: serial at e6e58000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
- scif4: serial at e6ee0000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
- status = "disabled";
- };
+ scif3: serial at e6ea8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
+ status = "disabled";
+ };
- scif5: serial at e6ee8000 {
- compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
+ scif4: serial at e6ee0000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
- hscif0: serial at e62c0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
+ scif5: serial at e6ee8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
- hscif1: serial at e62c8000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
+ hscif0: serial at e62c0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
- hscif2: serial at e62d0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
+ hscif1: serial at e62c8000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
+ hscif2: serial at e62d0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
- };
- ether: ethernet at ee700000 {
- compatible = "renesas,ether-r8a7794",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7794",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a7794",
- "renesas,etheravb-rcar-gen2";
- reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a7794",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- /* The memory map in the User's Manual maps the cores to bus numbers */
- i2c0: i2c at e6508000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c at e6508000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c1: i2c at e6518000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c1: i2c at e6518000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c2: i2c at e6530000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c2: i2c at e6530000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c3: i2c at e6540000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c3: i2c at e6540000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c4: i2c at e6520000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c4: i2c at e6520000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c5: i2c at e6528000 {
- compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
+ i2c5: i2c at e6528000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 925>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
- i2c6: i2c at e6500000 {
- compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ i2c6: i2c at e6500000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- i2c7: i2c at e6510000 {
- compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ i2c7: i2c at e6510000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 323>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- mmcif0: mmc at ee200000 {
- compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
- status = "disabled";
- };
+ mmcif0: mmc at ee200000 {
+ compatible = "renesas,mmcif-r8a7794",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
- sdhi1: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
+ sdhi1: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
- sdhi2: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
- dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
+ sdhi2: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7794", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7794", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- vin0: video at e6ef0000 {
- compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
- status = "disabled";
- };
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
- vin1: video at e6ef1000 {
- compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
- status = "disabled";
- };
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
- pci0: pci at ee090000 {
- compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
+ pci0: pci at ee090000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
};
- usb at 2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
+ pci1: pci at ee0d0000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
};
- };
- pci1: pci at ee0d0000 {
- compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x10800 0 0 0 0>;
- phys = <&usb2 0>;
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7794",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
phy-names = "usb";
+ status = "disabled";
};
- usb at 2,0 {
- reg = <0x11000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
+ usbphy: usb-phy at e6590100 {
+ compatible = "renesas,usb-phy-r8a7794",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
+
+ usb0: usb-channel at 0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel at 2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
};
- };
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
- status = "disabled";
- };
+ vsp at fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
- usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7794",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- status = "disabled";
+ vsp at fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
- usb0: usb-channel at 0 {
- reg = <0>;
- #phy-cells = <1>;
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7794";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
};
- usb2: usb-channel at 2 {
- reg = <2>;
- #phy-cells = <1>;
+
+ can0: can at e6e80000 {
+ compatible = "renesas,can-r8a7794",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
};
- };
- vsp at fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
- };
+ can1: can at e6e88000 {
+ compatible = "renesas,can-r8a7794",
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
- vsp at fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7794-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
- du: display at feb00000 {
- compatible = "renesas,du-r8a7794";
- reg = <0 0xfeb00000 0 0x40000>;
- reg-names = "du";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
- clock-names = "du.0", "du.1";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7794-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
- port at 0 {
- reg = <0>;
- du_out_rgb0: endpoint {
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7794-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+ ipmmu_sy0: mmu at e6280000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_sy1: mmu at e6290000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: mmu at ec680000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: mmu at fe951000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_gp: mmu at e62a0000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound at ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7794",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
+ <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
+ <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
+ <&cpg CPG_CORE R8A7794_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.6", "src.5", "src.4", "src.3",
+ "src.2", "src.1",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+ <&cpg 1006>, <&cpg 1007>,
+ <&cpg 1008>, <&cpg 1009>,
+ <&cpg 1010>, <&cpg 1011>,
+ <&cpg 1012>, <&cpg 1013>,
+ <&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma0 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma0 0xbe>;
+ dma-names = "tx";
};
};
- port at 1 {
- reg = <1>;
- du_out_rgb1: endpoint {
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src-0 {
+ status = "disabled";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma0 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma0 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma0 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma0 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma0 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma0 0x02>,
+ <&audma0 0x15>, <&audma0 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma0 0x04>,
+ <&audma0 0x49>, <&audma0 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma0 0x06>,
+ <&audma0 0x63>, <&audma0 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma0 0x08>,
+ <&audma0 0x6f>, <&audma0 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma0 0x0a>,
+ <&audma0 0x71>, <&audma0 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma0 0x0c>,
+ <&audma0 0x73>, <&audma0 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma0 0x0e>,
+ <&audma0 0x75>, <&audma0 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma0 0x10>,
+ <&audma0 0x79>, <&audma0 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma0 0x12>,
+ <&audma0 0x7b>, <&audma0 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma0 0x14>,
+ <&audma0 0x7d>, <&audma0 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
};
};
};
};
- can0: can at e6e80000 {
- compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
- reg = <0 0xe6e80000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- can1: can at e6e88000 {
- compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
- reg = <0 0xe6e88000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
- };
/* External root clock */
extal_clk: extal {
@@ -1098,259 +1405,4 @@
#clock-cells = <0>;
clock-frequency = <0>;
};
-
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7794-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7794-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7794-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu at e6280000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu at e6290000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu at ec680000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu at fe951000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_gp: mmu at e62a0000 {
- compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- rcar_sound: sound at ec500000 {
- /*
- * #sound-dai-cells is required
- *
- * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
- * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
- */
- compatible = "renesas,rcar_sound-r8a7794",
- "renesas,rcar_sound-gen2";
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
- reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
-
- clocks = <&cpg CPG_MOD 1005>,
- <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
- <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
- <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
- <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
- <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
- <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
- <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
- <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
- <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
- <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
- <&cpg CPG_CORE R8A7794_CLK_M2>;
- clock-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
- "src.6", "src.5", "src.4", "src.3", "src.2",
- "src.1",
- "ctu.0", "ctu.1",
- "mix.0", "mix.1",
- "dvc.0", "dvc.1",
- "clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1005>,
- <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
- <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
- <&cpg 1014>, <&cpg 1015>;
- reset-names = "ssi-all",
- "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
- "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
-
- status = "disabled";
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- dmas = <&audma0 0xbc>;
- dma-names = "tx";
- };
- dvc1: dvc-1 {
- dmas = <&audma0 0xbe>;
- dma-names = "tx";
- };
- };
-
- rcar_sound,mix {
- mix0: mix-0 { };
- mix1: mix-1 { };
- };
-
- rcar_sound,ctu {
- ctu00: ctu-0 { };
- ctu01: ctu-1 { };
- ctu02: ctu-2 { };
- ctu03: ctu-3 { };
- ctu10: ctu-4 { };
- ctu11: ctu-5 { };
- ctu12: ctu-6 { };
- ctu13: ctu-7 { };
- };
-
- rcar_sound,src {
- src-0 {
- status = "disabled";
- };
- src1: src-1 {
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x87>, <&audma0 0x9c>;
- dma-names = "rx", "tx";
- };
- src2: src-2 {
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x89>, <&audma0 0x9e>;
- dma-names = "rx", "tx";
- };
- src3: src-3 {
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8b>, <&audma0 0xa0>;
- dma-names = "rx", "tx";
- };
- src4: src-4 {
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8d>, <&audma0 0xb0>;
- dma-names = "rx", "tx";
- };
- src5: src-5 {
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x8f>, <&audma0 0xb2>;
- dma-names = "rx", "tx";
- };
- src6: src-6 {
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x91>, <&audma0 0xb4>;
- dma-names = "rx", "tx";
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma0 0x02>,
- <&audma0 0x15>, <&audma0 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma0 0x04>,
- <&audma0 0x49>, <&audma0 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma0 0x06>,
- <&audma0 0x63>, <&audma0 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma0 0x08>,
- <&audma0 0x6f>, <&audma0 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma0 0x0a>,
- <&audma0 0x71>, <&audma0 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma0 0x0c>,
- <&audma0 0x73>, <&audma0 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma0 0x0e>,
- <&audma0 0x75>, <&audma0 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma0 0x10>,
- <&audma0 0x79>, <&audma0 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma0 0x12>,
- <&audma0 0x7b>, <&audma0 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma0 0x14>,
- <&audma0 0x7d>, <&audma0 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 15/16] ARM: dts: r8a7794: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 1525 ++++++++++++++++++++--------------------
1 file changed, 762 insertions(+), 763 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 0d65069b1a89..9e5f886f53c5 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -74,28 +74,6 @@
#size-cells = <2>;
ranges;
- apmu@e6151000 {
- compatible = "renesas,r8a7794-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
-
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7794",
"renesas,rcar-gen2-gpio";
@@ -201,38 +179,36 @@
resets = <&cpg 905>;
};
- cmt0: timer@ffca0000 {
- compatible = "renesas,r8a7794-cmt0",
- "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7794";
+ reg = <0 0xe6060000 0 0x11c>;
+ };
- status = "disabled";
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7794-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
};
- cmt1: timer@e6130000 {
- compatible = "renesas,r8a7794-cmt1",
- "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
+ apmu@e6151000 {
+ compatible = "renesas,r8a7794-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- status = "disabled";
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7794-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7794-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
};
irqc0: interrupt-controller@e61c0000 {
@@ -255,419 +231,303 @@
resets = <&cpg 407>;
};
- pfc: pin-controller@e6060000 {
- compatible = "renesas,pfc-r8a7794";
- reg = <0 0xe6060000 0 0x11c>;
+ ipmmu_sy0: mmu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7794",
- "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_sy1: mmu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7794",
- "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_ds: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma0: dma-controller@ec700000 {
- compatible = "renesas,dmac-r8a7794",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3", "ch4",
- "ch5", "ch6", "ch7", "ch8", "ch9",
- "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_mp: mmu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- scifa0: serial@e6c40000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
+ ipmmu_mx: mmu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
status = "disabled";
};
- scifa1: serial@e6c50000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
+ ipmmu_gp: mmu@e62a0000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
status = "disabled";
};
- scifa2: serial@e6c60000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
};
- scifa3: serial@e6c70000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
- scifa4: serial@e6c78000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c@e6508000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
+ resets = <&cpg 931>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifa5: serial@e6c80000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c1: i2c@e6518000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
+ resets = <&cpg 930>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifb0: serial@e6c20000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c2: i2c@e6530000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
+ resets = <&cpg 929>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifb1: serial@e6c30000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c3: i2c@e6540000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
+ resets = <&cpg 928>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifb2: serial@e6ce0000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c4: i2c@e6520000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
+ resets = <&cpg 927>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scif0: serial@e6e60000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c5: i2c@e6528000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
+ resets = <&cpg 925>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scif1: serial@e6e68000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
+ i2c6: i2c@e6500000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
+ resets = <&cpg 318>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- scif2: serial@e6e58000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
+ i2c7: i2c@e6510000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
+ resets = <&cpg 323>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- scif3: serial@e6ea8000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7794",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
status = "disabled";
};
- scif4: serial@e6ee0000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7794",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
+ resets = <&cpg 704>;
status = "disabled";
+
+ usb0: usb-channel@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
};
- scif5: serial@e6ee8000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
-
- hscif0: serial@e62c0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>,
- <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
-
- hscif1: serial@e62c8000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>,
- <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
-
- hscif2: serial@e62d0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
-
- icram0: sram@e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram@e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram@0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7794",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
+ dmac1: dma-controller@e6720000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
avb: ethernet@e6800000 {
@@ -683,374 +543,301 @@
status = "disabled";
};
- /* The memory map in the User's Manual maps the cores to
- * bus numbers
- */
- i2c0: i2c@e6508000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7794", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- i2c1: i2c@e6518000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
+ scifa0: serial@e6c40000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 204>;
status = "disabled";
};
- i2c2: i2c@e6530000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
+ scifa1: serial@e6c50000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 203>;
status = "disabled";
};
- i2c3: i2c@e6540000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
+ scifa2: serial@e6c60000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 202>;
status = "disabled";
};
- i2c4: i2c@e6520000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
+ scifa3: serial@e6c70000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 1106>;
status = "disabled";
};
- i2c5: i2c@e6528000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
+ scifa4: serial@e6c78000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 1107>;
status = "disabled";
};
- i2c6: i2c@e6500000 {
- compatible = "renesas,iic-r8a7794",
- "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
+ scifa5: serial@e6c80000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 1108>;
status = "disabled";
};
- i2c7: i2c@e6510000 {
- compatible = "renesas,iic-r8a7794",
- "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 206>;
status = "disabled";
};
- mmcif0: mmc@ee200000 {
- compatible = "renesas,mmcif-r8a7794",
- "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
+ resets = <&cpg 207>;
status = "disabled";
};
- sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
+ resets = <&cpg 216>;
status = "disabled";
};
- sdhi1: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
+ resets = <&cpg 721>;
status = "disabled";
};
- sdhi2: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
+ resets = <&cpg 720>;
status = "disabled";
};
- qspi: spi@e6b10000 {
- compatible = "renesas,qspi-r8a7794", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
+ scif2: serial@e6e58000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 719>;
status = "disabled";
};
- vin0: video@e6ef0000 {
- compatible = "renesas,vin-r8a7794",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
+ scif3: serial@e6ea8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
+ resets = <&cpg 718>;
status = "disabled";
};
- vin1: video@e6ef1000 {
- compatible = "renesas,vin-r8a7794",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
+ scif4: serial@e6ee0000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
+ resets = <&cpg 715>;
status = "disabled";
};
- pci0: pci@ee090000 {
- compatible = "renesas,pci-r8a7794",
- "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
+ scif5: serial@e6ee8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
+ resets = <&cpg 714>;
status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
-
- usb@2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
};
- pci1: pci@ee0d0000 {
- compatible = "renesas,pci-r8a7794",
- "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb@1,0 {
- reg = <0x10800 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
-
- usb@2,0 {
- reg = <0x11000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
- };
-
- hsusb: usb@e6590000 {
- compatible = "renesas,usbhs-r8a7794",
- "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
+ hscif0: serial@e62c0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
+ resets = <&cpg 717>;
status = "disabled";
};
- usbphy: usb-phy@e6590100 {
- compatible = "renesas,usb-phy-r8a7794",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
+ hscif1: serial@e62c8000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
+ resets = <&cpg 716>;
status = "disabled";
-
- usb0: usb-channel@0 {
- reg = <0>;
- #phy-cells = <1>;
- };
- usb2: usb-channel@2 {
- reg = <2>;
- #phy-cells = <1>;
- };
- };
-
- vsp@fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
};
- vsp@fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
+ hscif2: serial@e62d0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
-
- du: display@feb00000 {
- compatible = "renesas,du-r8a7794";
- reg = <0 0xfeb00000 0 0x40000>;
- reg-names = "du";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
- clock-names = "du.0", "du.1";
+ resets = <&cpg 713>;
status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- du_out_rgb0: endpoint {
- };
- };
- port@1 {
- reg = <1>;
- du_out_rgb1: endpoint {
- };
- };
- };
};
can0: can@e6e80000 {
@@ -1079,87 +866,25 @@
status = "disabled";
};
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7794-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7794-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7794-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu@e6280000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu@e6290000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu@e6740000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu@ec680000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu@fe951000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
- ipmmu_gp: mmu@e62a0000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
@@ -1343,6 +1068,281 @@
};
};
};
+
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3", "ch4",
+ "ch5", "ch6", "ch7", "ch8", "ch9",
+ "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pci1: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+ };
+
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi2: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7794",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ ether: ethernet@ee700000 {
+ compatible = "renesas,ether-r8a7794",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7794";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
+ };
+
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,r8a7794-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,r8a7794-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
};
timer {
@@ -1353,7 +1353,6 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
-
/* External root clock */
extal_clk: extal {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 15/16] ARM: dts: r8a7794: sort subnodes of soc node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 1525 ++++++++++++++++++++--------------------
1 file changed, 762 insertions(+), 763 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 0d65069b1a89..9e5f886f53c5 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -74,28 +74,6 @@
#size-cells = <2>;
ranges;
- apmu at e6151000 {
- compatible = "renesas,r8a7794-apmu", "renesas,apmu";
- reg = <0 0xe6151000 0 0x188>;
- cpus = <&cpu0 &cpu1>;
- };
-
- gic: interrupt-controller at f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
gpio0: gpio at e6050000 {
compatible = "renesas,gpio-r8a7794",
"renesas,rcar-gen2-gpio";
@@ -201,38 +179,36 @@
resets = <&cpg 905>;
};
- cmt0: timer at ffca0000 {
- compatible = "renesas,r8a7794-cmt0",
- "renesas,rcar-gen2-cmt0";
- reg = <0 0xffca0000 0 0x1004>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 124>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 124>;
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7794";
+ reg = <0 0xe6060000 0 0x11c>;
+ };
- status = "disabled";
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a7794-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&usb_extal_clk>;
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
};
- cmt1: timer at e6130000 {
- compatible = "renesas,r8a7794-cmt1",
- "renesas,rcar-gen2-cmt1";
- reg = <0 0xe6130000 0 0x1004>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 329>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
+ apmu at e6151000 {
+ compatible = "renesas,r8a7794-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
- status = "disabled";
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a7794-rst";
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a7794-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
+ #power-domain-cells = <1>;
};
irqc0: interrupt-controller at e61c0000 {
@@ -255,419 +231,303 @@
resets = <&cpg 407>;
};
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7794";
- reg = <0 0xe6060000 0 0x11c>;
+ ipmmu_sy0: mmu at e6280000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- dmac0: dma-controller at e6700000 {
- compatible = "renesas,dmac-r8a7794",
- "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_sy1: mmu at e6290000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- dmac1: dma-controller at e6720000 {
- compatible = "renesas,dmac-r8a7794",
- "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
+ ipmmu_ds: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7794",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3", "ch4",
- "ch5", "ch6", "ch7", "ch8", "ch9",
- "ch10", "ch11",
- "ch12";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <13>;
+ ipmmu_mp: mmu at ec680000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- scifa0: serial at e6c40000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
+ ipmmu_mx: mmu at fe951000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
status = "disabled";
};
- scifa1: serial at e6c50000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
+ ipmmu_gp: mmu at e62a0000 {
+ compatible = "renesas,ipmmu-r8a7794",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe62a0000 0 0x1000>;
+ interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
status = "disabled";
};
- scifa2: serial at e6c60000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 64>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
+ icram0: sram at e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
};
- scifa3: serial at e6c70000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 64>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
+ icram1: sram at e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram at 0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
};
- scifa4: serial at e6c78000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 64>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
+ /* The memory map in the User's Manual maps the cores to
+ * bus numbers
+ */
+ i2c0: i2c at e6508000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
+ resets = <&cpg 931>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifa5: serial at e6c80000 {
- compatible = "renesas,scifa-r8a7794",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 64>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c1: i2c at e6518000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
+ resets = <&cpg 930>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifb0: serial at e6c20000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c2: i2c at e6530000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
+ resets = <&cpg 929>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifb1: serial at e6c30000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c3: i2c at e6540000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
+ resets = <&cpg 928>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scifb2: serial at e6ce0000 {
- compatible = "renesas,scifb-r8a7794",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c4: i2c at e6520000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
+ resets = <&cpg 927>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
+ i2c5: i2c at e6528000 {
+ compatible = "renesas,i2c-r8a7794",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
+ resets = <&cpg 925>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif",
- "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
+ i2c6: i2c at e6500000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
+ resets = <&cpg 318>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- scif2: serial at e6e58000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6e58000 0 64>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
+ i2c7: i2c at e6510000 {
+ compatible = "renesas,iic-r8a7794",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
+ resets = <&cpg 323>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- scif3: serial at e6ea8000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ea8000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7794",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
status = "disabled";
};
- scif4: serial at e6ee0000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ee0000 0 64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
+ usbphy: usb-phy at e6590100 {
+ compatible = "renesas,usb-phy-r8a7794",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
+ resets = <&cpg 704>;
status = "disabled";
+
+ usb0: usb-channel at 0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel at 2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
};
- scif5: serial at e6ee8000 {
- compatible = "renesas,scif-r8a7794",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ee8000 0 64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
-
- hscif0: serial at e62c0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>,
- <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
-
- hscif1: serial at e62c8000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>,
- <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
-
- hscif2: serial at e62d0000 {
- compatible = "renesas,hscif-r8a7794",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 96>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
+ dmac0: dma-controller at e6700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x20000>;
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
-
- icram0: sram at e63a0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63a0000 0 0x12000>;
- };
-
- icram1: sram at e63c0000 {
- compatible = "mmio-sram";
- reg = <0 0xe63c0000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0xe63c0000 0x1000>;
-
- smp-sram at 0 {
- compatible = "renesas,smp-sram";
- reg = <0 0x10>;
- };
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
- ether: ethernet at ee700000 {
- compatible = "renesas,ether-r8a7794",
- "renesas,rcar-gen2-ether";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
+ dmac1: dma-controller at e6720000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6720000 0 0x20000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
};
avb: ethernet at e6800000 {
@@ -683,374 +543,301 @@
status = "disabled";
};
- /* The memory map in the User's Manual maps the cores to
- * bus numbers
- */
- i2c0: i2c at e6508000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
+ qspi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7794", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
+ resets = <&cpg 917>;
+ num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- i2c1: i2c at e6518000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6518000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
+ scifa0: serial at e6c40000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 204>;
status = "disabled";
};
- i2c2: i2c at e6530000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6530000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
+ scifa1: serial at e6c50000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 203>;
status = "disabled";
};
- i2c3: i2c at e6540000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6540000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
+ scifa2: serial at e6c60000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 202>;
status = "disabled";
};
- i2c4: i2c at e6520000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6520000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
+ scifa3: serial at e6c70000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 1106>;
status = "disabled";
};
- i2c5: i2c at e6528000 {
- compatible = "renesas,i2c-r8a7794",
- "renesas,rcar-gen2-i2c";
- reg = <0 0xe6528000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 925>;
+ scifa4: serial at e6c78000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 925>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 1107>;
status = "disabled";
};
- i2c6: i2c at e6500000 {
- compatible = "renesas,iic-r8a7794",
- "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6500000 0 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>,
- <&dmac1 0x61>, <&dmac1 0x62>;
+ scifa5: serial at e6c80000 {
+ compatible = "renesas,scifa-r8a7794",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 1108>;
status = "disabled";
};
- i2c7: i2c at e6510000 {
- compatible = "renesas,iic-r8a7794",
- "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe6510000 0 0x425>;
- interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 323>;
- dmas = <&dmac0 0x65>, <&dmac0 0x66>,
- <&dmac1 0x65>, <&dmac1 0x66>;
+ scifb0: serial at e6c20000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 323>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 206>;
status = "disabled";
};
- mmcif0: mmc at ee200000 {
- compatible = "renesas,mmcif-r8a7794",
- "renesas,sh-mmcif";
- reg = <0 0xee200000 0 0x80>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 315>;
- dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
- <&dmac1 0xd1>, <&dmac1 0xd2>;
+ scifb1: serial at e6c30000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 315>;
- reg-io-width = <4>;
+ resets = <&cpg 207>;
status = "disabled";
};
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee100000 0 0x328>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
- <&dmac1 0xcd>, <&dmac1 0xce>;
+ scifb2: serial at e6ce0000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <195000000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
+ resets = <&cpg 216>;
status = "disabled";
};
- sdhi1: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee140000 0 0x100>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
- <&dmac1 0xc1>, <&dmac1 0xc2>;
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
+ resets = <&cpg 721>;
status = "disabled";
};
- sdhi2: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7794",
- "renesas,rcar-gen2-sdhi";
- reg = <0 0xee160000 0 0x100>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
- <&dmac1 0xd3>, <&dmac1 0xd4>;
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
- max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
+ resets = <&cpg 720>;
status = "disabled";
};
- qspi: spi at e6b10000 {
- compatible = "renesas,qspi-r8a7794", "renesas,qspi";
- reg = <0 0xe6b10000 0 0x2c>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 917>;
- dmas = <&dmac0 0x17>, <&dmac0 0x18>,
- <&dmac1 0x17>, <&dmac1 0x18>;
+ scif2: serial at e6e58000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 917>;
- num-cs = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 719>;
status = "disabled";
};
- vin0: video at e6ef0000 {
- compatible = "renesas,vin-r8a7794",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef0000 0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 811>;
+ scif3: serial at e6ea8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 811>;
+ resets = <&cpg 718>;
status = "disabled";
};
- vin1: video at e6ef1000 {
- compatible = "renesas,vin-r8a7794",
- "renesas,rcar-gen2-vin";
- reg = <0 0xe6ef1000 0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 810>;
+ scif4: serial at e6ee0000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 810>;
+ resets = <&cpg 715>;
status = "disabled";
};
- pci0: pci at ee090000 {
- compatible = "renesas,pci-r8a7794",
- "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee090000 0 0xc00>,
- <0 0xee080000 0 0x1100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
+ scif5: serial at e6ee8000 {
+ compatible = "renesas,scif-r8a7794",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
+ resets = <&cpg 714>;
status = "disabled";
-
- bus-range = <0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x800 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
-
- usb at 2,0 {
- reg = <0x1000 0 0 0 0>;
- phys = <&usb0 0>;
- phy-names = "usb";
- };
};
- pci1: pci at ee0d0000 {
- compatible = "renesas,pci-r8a7794",
- "renesas,pci-rcar-gen2";
- device_type = "pci";
- reg = <0 0xee0d0000 0 0xc00>,
- <0 0xee0c0000 0 0x1100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- status = "disabled";
-
- bus-range = <1 1>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
- interrupt-map-mask = <0xff00 0 0 0x7>;
- interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
- 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-
- usb at 1,0 {
- reg = <0x10800 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
-
- usb at 2,0 {
- reg = <0x11000 0 0 0 0>;
- phys = <&usb2 0>;
- phy-names = "usb";
- };
- };
-
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7794",
- "renesas,rcar-gen2-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
+ hscif0: serial at e62c0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
- renesas,buswait = <4>;
- phys = <&usb0 1>;
- phy-names = "usb";
+ resets = <&cpg 717>;
status = "disabled";
};
- usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7794",
- "renesas,rcar-gen2-usb-phy";
- reg = <0 0xe6590100 0 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cpg CPG_MOD 704>;
- clock-names = "usbhs";
+ hscif1: serial at e62c8000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>,
+ <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
+ resets = <&cpg 716>;
status = "disabled";
-
- usb0: usb-channel at 0 {
- reg = <0>;
- #phy-cells = <1>;
- };
- usb2: usb-channel at 2 {
- reg = <2>;
- #phy-cells = <1>;
- };
- };
-
- vsp at fe928000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe928000 0 0x8000>;
- interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 131>;
};
- vsp at fe930000 {
- compatible = "renesas,vsp1";
- reg = <0 0xfe930000 0 0x8000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
+ hscif2: serial at e62d0000 {
+ compatible = "renesas,hscif-r8a7794",
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
- resets = <&cpg 128>;
- };
-
- du: display at feb00000 {
- compatible = "renesas,du-r8a7794";
- reg = <0 0xfeb00000 0 0x40000>;
- reg-names = "du";
- interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
- clock-names = "du.0", "du.1";
+ resets = <&cpg 713>;
status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 0 {
- reg = <0>;
- du_out_rgb0: endpoint {
- };
- };
- port at 1 {
- reg = <1>;
- du_out_rgb1: endpoint {
- };
- };
- };
};
can0: can at e6e80000 {
@@ -1079,87 +866,25 @@
status = "disabled";
};
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a7794-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a7794-rst";
- reg = <0 0xe6160000 0 0x0100>;
- };
-
- prr: chipid at ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a7794-sysc";
- reg = <0 0xe6180000 0 0x0200>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_sy0: mmu at e6280000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6280000 0 0x1000>;
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_sy1: mmu at e6290000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6290000 0 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ds: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe6740000 0 0x1000>;
- interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu at ec680000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xec680000 0 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mx: mmu at fe951000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xfe951000 0 0x1000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
status = "disabled";
};
- ipmmu_gp: mmu at e62a0000 {
- compatible = "renesas,ipmmu-r8a7794",
- "renesas,ipmmu-vmsa";
- reg = <0 0xe62a0000 0 0x1000>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7794",
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
status = "disabled";
};
@@ -1343,6 +1068,281 @@
};
};
};
+
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7794",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3", "ch4",
+ "ch5", "ch6", "ch7", "ch8", "ch9",
+ "ch10", "ch11",
+ "ch12";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ pci0: pci at ee090000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+ };
+
+ pci1: pci at ee0d0000 {
+ compatible = "renesas,pci-r8a7794",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb at 1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb at 2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+ };
+
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi2: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ mmcif0: mmc at ee200000 {
+ compatible = "renesas,mmcif-r8a7794",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ ether: ethernet at ee700000 {
+ compatible = "renesas,ether-r8a7794",
+ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1001000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ vsp at fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp at fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a7794";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
+ };
+
+ prr: chipid at ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
+ cmt0: timer at ffca0000 {
+ compatible = "renesas,r8a7794-cmt0",
+ "renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 124>;
+
+ status = "disabled";
+ };
+
+ cmt1: timer at e6130000 {
+ compatible = "renesas,r8a7794-cmt1",
+ "renesas,rcar-gen2-cmt1";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+
+ status = "disabled";
+ };
};
timer {
@@ -1353,7 +1353,6 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
-
/* External root clock */
extal_clk: extal {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-17 16:17 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 90 +++++++++++++++++++++---------------------
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 9e5f886f53c5..d588efa6aeaa 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -33,6 +33,35 @@
vin1 = &vin1;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clka: audio_clka {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clkb: audio_clkb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clkc: audio_clkc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -66,6 +95,22 @@
};
};
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -1353,55 +1398,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed
- * frequency clocks by default. Boards that provide audio
- * clocks should override them.
- */
- audio_clka: audio_clka {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clkb: audio_clkb {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clkc: audio_clkc {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
@ 2018-01-17 16:17 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-17 16:17 UTC (permalink / raw)
To: linux-arm-kernel
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together.
This patch should not introduce any functional change.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v2
* New patch
---
arch/arm/boot/dts/r8a7794.dtsi | 90 +++++++++++++++++++++---------------------
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 9e5f886f53c5..d588efa6aeaa 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -33,6 +33,35 @@
vin1 = &vin1;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clka: audio_clka {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clkb: audio_clkb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clkc: audio_clkc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -66,6 +95,22 @@
};
};
+ /* External root clock */
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -1353,55 +1398,10 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
-
- /* External CAN clock */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /*
- * The external audio clocks are configured as 0 Hz fixed
- * frequency clocks by default. Boards that provide audio
- * clocks should override them.
- */
- audio_clka: audio_clka {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clkb: audio_clkb {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
- audio_clkc: audio_clkc {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 106+ messages in thread
* Re: [PATCH v2 01/16] ARM: dts: r8a7790: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 0:16 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:16 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:02 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * Consistently use tabs for indentation as much as possible
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 75 +++++++++++++++++++++---------------------
> 1 file changed, 38 insertions(+), 37 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 13926fc7abfa..b4306f7c1bbb 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -291,9 +291,9 @@
> };
>
> thermal: thermal@e61f0000 {
> - compatible = "renesas,thermal-r8a7790",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> + compatible = "renesas,thermal-r8a7790",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 522>;
> @@ -423,20 +423,20 @@
> audma0: dma-controller@ec700000 {
> compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -453,20 +453,20 @@
> audma1: dma-controller@ec720000 {
> compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -1437,12 +1437,13 @@
> * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> */
> - compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + compatible = "renesas,rcar_sound-r8a7790",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 01/16] ARM: dts: r8a7790: consistently use single space after =
@ 2018-01-18 0:16 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:02 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * Consistently use tabs for indentation as much as possible
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 75 +++++++++++++++++++++---------------------
> 1 file changed, 38 insertions(+), 37 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 13926fc7abfa..b4306f7c1bbb 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -291,9 +291,9 @@
> };
>
> thermal: thermal at e61f0000 {
> - compatible = "renesas,thermal-r8a7790",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> + compatible = "renesas,thermal-r8a7790",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 522>;
> @@ -423,20 +423,20 @@
> audma0: dma-controller at ec700000 {
> compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -453,20 +453,20 @@
> audma1: dma-controller at ec720000 {
> compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -1437,12 +1437,13 @@
> * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> */
> - compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + compatible = "renesas,rcar_sound-r8a7790",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 0:24 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:24 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:03 +0100, Simon Horman wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The 'ranges' property in the soc node is new. I checked the
documentation and as far as I can make out this is how it should be. But
I'm not certain why :-)
Other then that adding of the soc node and fixing-up the line lengths do
not change anything.
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * No change
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 2794 ++++++++++++++++++++--------------------
> 1 file changed, 1432 insertions(+), 1362 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index b4306f7c1bbb..1f4b3a4ed287 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -17,7 +17,6 @@
>
> / {
> compatible = "renesas,r8a7790";
> - interrupt-parent = <&gic>;
> #address-cells = <2>;
> #size-cells = <2>;
>
> @@ -159,981 +158,1524 @@
> };
> };
>
> - thermal-zones {
> - cpu_thermal: cpu-thermal {
> - polling-delay-passive = <0>;
> - polling-delay = <0>;
> + soc {
> + compatible = "simple-bus";
> + interrupt-parent = <&gic>;
>
> - thermal-sensors = <&thermal>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> - trips {
> - cpu-crit {
> - temperature = <95000>;
> - hysteresis = <0>;
> - type = "critical";
> - };
> - };
> - cooling-maps {
> - };
> + apmu@e6151000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> };
> - };
>
> - apmu@e6151000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> - };
> + apmu@e6152000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> + };
>
> - apmu@e6152000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> - };
> + gic: interrupt-controller@f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
>
> - gic: interrupt-controller@f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> + gpio0: gpio@e6050000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6050000 0 0x50>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 0 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 912>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 912>;
> + };
>
> - gpio0: gpio@e6050000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6050000 0 0x50>;
> - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 0 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 912>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 912>;
> - };
> + gpio1: gpio@e6051000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6051000 0 0x50>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 32 30>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 911>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 911>;
> + };
>
> - gpio1: gpio@e6051000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6051000 0 0x50>;
> - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 32 30>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 911>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 911>;
> - };
> + gpio2: gpio@e6052000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6052000 0 0x50>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 64 30>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 910>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 910>;
> + };
>
> - gpio2: gpio@e6052000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6052000 0 0x50>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 64 30>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 910>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 910>;
> - };
> + gpio3: gpio@e6053000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6053000 0 0x50>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 96 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 909>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 909>;
> + };
>
> - gpio3: gpio@e6053000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6053000 0 0x50>;
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 96 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 909>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 909>;
> - };
> + gpio4: gpio@e6054000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6054000 0 0x50>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 128 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 908>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 908>;
> + };
>
> - gpio4: gpio@e6054000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6054000 0 0x50>;
> - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 128 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 908>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 908>;
> - };
> + gpio5: gpio@e6055000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055000 0 0x50>;
> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 160 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 907>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 907>;
> + };
>
> - gpio5: gpio@e6055000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055000 0 0x50>;
> - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 160 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 907>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 907>;
> - };
> + thermal: thermal@e61f0000 {
> + compatible = "renesas,thermal-r8a7790",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> + };
>
> - thermal: thermal@e61f0000 {
> - compatible = "renesas,thermal-r8a7790",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> - };
> + cmt0: timer@ffca0000 {
> + compatible = "renesas,r8a7790-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
>
> - timer {
> - compatible = "arm,armv7-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> - };
> + cmt1: timer@e6130000 {
> + compatible = "renesas,r8a7790-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
>
> - cmt0: timer@ffca0000 {
> - compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> -
> - status = "disabled";
> - };
> + irqc0: interrupt-controller@e61c0000 {
> + compatible = "renesas,irqc-r8a7790", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
>
> - cmt1: timer@e6130000 {
> - compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> -
> - status = "disabled";
> - };
> + dmac0: dma-controller@e6700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - irqc0: interrupt-controller@e61c0000 {
> - compatible = "renesas,irqc-r8a7790", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> + dmac1: dma-controller@e6720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - dmac0: dma-controller@e6700000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma0: dma-controller@ec700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - dmac1: dma-controller@e6720000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma1: dma-controller@ec720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - audma0: dma-controller@ec700000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + usb_dmac0: dma-controller@e65a0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65a0000 0 0x100>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 330>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 330>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> + };
>
> - audma1: dma-controller@ec720000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + usb_dmac1: dma-controller@e65b0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65b0000 0 0x100>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 331>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 331>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> + };
>
> - usb_dmac0: dma-controller@e65a0000 {
> - compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
> - reg = <0 0xe65a0000 0 0x100>;
> - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 330>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 330>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> - };
> + i2c0: i2c@e6508000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
>
> - usb_dmac1: dma-controller@e65b0000 {
> - compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
> - reg = <0 0xe65b0000 0 0x100>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 331>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 331>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> - };
> + i2c1: i2c@e6518000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c0: i2c@e6508000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - i2c-scl-internal-delay-ns = <110>;
> - status = "disabled";
> - };
> + i2c2: i2c@e6530000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c1: i2c@e6518000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c3: i2c@e6540000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
>
> - i2c2: i2c@e6530000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + iic0: i2c@e6500000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 318>;
> + status = "disabled";
> + };
>
> - i2c3: i2c@e6540000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - i2c-scl-internal-delay-ns = <110>;
> - status = "disabled";
> - };
> + iic1: i2c@e6510000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 323>;
> + status = "disabled";
> + };
>
> - iic0: i2c@e6500000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - status = "disabled";
> - };
> + iic2: i2c@e6520000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6520000 0 0x425>;
> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 300>;
> + dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
> + <&dmac1 0x69>, <&dmac1 0x6a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 300>;
> + status = "disabled";
> + };
>
> - iic1: i2c@e6510000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - status = "disabled";
> - };
> + iic3: i2c@e60b0000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe60b0000 0 0x425>;
> + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 926>;
> + dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> + <&dmac1 0x77>, <&dmac1 0x78>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 926>;
> + status = "disabled";
> + };
>
> - iic2: i2c@e6520000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6520000 0 0x425>;
> - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 300>;
> - dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
> - <&dmac1 0x69>, <&dmac1 0x6a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 300>;
> - status = "disabled";
> - };
> + mmcif0: mmc@ee200000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
>
> - iic3: i2c@e60b0000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe60b0000 0 0x425>;
> - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 926>;
> - dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> - <&dmac1 0x77>, <&dmac1 0x78>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 926>;
> - status = "disabled";
> - };
> + mmcif1: mmc@ee220000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee220000 0 0x80>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 305>;
> + dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> + <&dmac1 0xe1>, <&dmac1 0xe2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 305>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
>
> - mmcif0: mmc@ee200000 {
> - compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> - status = "disabled";
> - max-frequency = <97500000>;
> - };
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7790";
> + reg = <0 0xe6060000 0 0x250>;
> + };
>
> - mmcif1: mmc@ee220000 {
> - compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
> - reg = <0 0xee220000 0 0x80>;
> - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 305>;
> - dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> - <&dmac1 0xe1>, <&dmac1 0xe2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 305>;
> - reg-io-width = <4>;
> - status = "disabled";
> - max-frequency = <97500000>;
> - };
> + sdhi0: sd@ee100000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
>
> - pfc: pin-controller@e6060000 {
> - compatible = "renesas,pfc-r8a7790";
> - reg = <0 0xe6060000 0 0x250>;
> - };
> + sdhi1: sd@ee120000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee120000 0 0x328>;
> + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 313>;
> + dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> + <&dmac1 0xc9>, <&dmac1 0xca>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 313>;
> + status = "disabled";
> + };
>
> - sdhi0: sd@ee100000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> + sdhi2: sd@ee140000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
>
> - sdhi1: sd@ee120000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee120000 0 0x328>;
> - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 313>;
> - dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> - <&dmac1 0xc9>, <&dmac1 0xca>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 313>;
> - status = "disabled";
> - };
> + sdhi3: sd@ee160000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
>
> - sdhi2: sd@ee140000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> - };
> + scifa0: serial@e6c40000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 204>;
> + status = "disabled";
> + };
>
> - sdhi3: sd@ee160000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> - };
> + scifa1: serial@e6c50000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 203>;
> + status = "disabled";
> + };
>
> - scifa0: serial@e6c40000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> - status = "disabled";
> - };
> + scifa2: serial@e6c60000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 202>;
> + status = "disabled";
> + };
>
> - scifa1: serial@e6c50000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> - status = "disabled";
> - };
> + scifb0: serial@e6c20000 {
> + compatible = "renesas,scifb-r8a7790",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 206>;
> + status = "disabled";
> + };
>
> - scifa2: serial@e6c60000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> - };
> + scifb1: serial@e6c30000 {
> + compatible = "renesas,scifb-r8a7790",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 207>;
> + status = "disabled";
> + };
>
> - scifb0: serial@e6c20000 {
> - compatible = "renesas,scifb-r8a7790",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> - status = "disabled";
> - };
> + scifb2: serial@e6ce0000 {
> + compatible = "renesas,scifb-r8a7790",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 216>;
> + status = "disabled";
> + };
>
> - scifb1: serial@e6c30000 {
> - compatible = "renesas,scifb-r8a7790",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> - status = "disabled";
> - };
> + scif0: serial@e6e60000 {
> + compatible = "renesas,scif-r8a7790",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 721>;
> + status = "disabled";
> + };
>
> - scifb2: serial@e6ce0000 {
> - compatible = "renesas,scifb-r8a7790",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> - status = "disabled";
> - };
> + scif1: serial@e6e68000 {
> + compatible = "renesas,scif-r8a7790",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 720>;
> + status = "disabled";
> + };
>
> - scif0: serial@e6e60000 {
> - compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> - status = "disabled";
> - };
> + scif2: serial@e6e56000 {
> + compatible = "renesas,scif-r8a7790",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e56000 0 64>;
> + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 310>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 310>;
> + status = "disabled";
> + };
>
> - scif1: serial@e6e68000 {
> - compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> - status = "disabled";
> - };
> + hscif0: serial@e62c0000 {
> + compatible = "renesas,hscif-r8a7790",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 717>;
> + status = "disabled";
> + };
>
> - scif2: serial@e6e56000 {
> - compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e56000 0 64>;
> - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 310>;
> - status = "disabled";
> - };
> + hscif1: serial@e62c8000 {
> + compatible = "renesas,hscif-r8a7790",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 716>;
> + status = "disabled";
> + };
>
> - hscif0: serial@e62c0000 {
> - compatible = "renesas,hscif-r8a7790",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> + icram0: sram@e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
>
> - hscif1: serial@e62c8000 {
> - compatible = "renesas,hscif-r8a7790",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> + icram1: sram@e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
>
> - icram0: sram@e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> + smp-sram@0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> + };
>
> - icram1: sram@e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> + ether: ethernet@ee700000 {
> + compatible = "renesas,ether-r8a7790",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - smp-sram@0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> + avb: ethernet@e6800000 {
> + compatible = "renesas,etheravb-r8a7790",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> };
> - };
>
> - ether: ethernet@ee700000 {
> - compatible = "renesas,ether-r8a7790",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + sata0: sata@ee300000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee300000 0 0x2000>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 815>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 815>;
> + status = "disabled";
> + };
>
> - avb: ethernet@e6800000 {
> - compatible = "renesas,etheravb-r8a7790",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + sata1: sata@ee500000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee500000 0 0x2000>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 814>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 814>;
> + status = "disabled";
> + };
>
> - sata0: sata@ee300000 {
> - compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
> - reg = <0 0xee300000 0 0x2000>;
> - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 815>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 815>;
> - status = "disabled";
> - };
> + hsusb: usb@e6590000 {
> + compatible = "renesas,usbhs-r8a7790",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> + dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> + <&usb_dmac1 0>, <&usb_dmac1 1>;
> + dma-names = "ch0", "ch1", "ch2", "ch3";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> + phy-names = "usb";
> + status = "disabled";
> + };
>
> - sata1: sata@ee500000 {
> - compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
> - reg = <0 0xee500000 0 0x2000>;
> - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 814>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 814>;
> - status = "disabled";
> - };
> + usbphy: usb-phy@e6590100 {
> + compatible = "renesas,usb-phy-r8a7790",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + status = "disabled";
>
> - hsusb: usb@e6590000 {
> - compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> - <&usb_dmac1 0>, <&usb_dmac1 1>;
> - dma-names = "ch0", "ch1", "ch2", "ch3";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> - status = "disabled";
> - };
> + usb0: usb-channel@0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel@2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> + };
>
> - usbphy: usb-phy@e6590100 {
> - compatible = "renesas,usb-phy-r8a7790",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - status = "disabled";
> + vin0: video@e6ef0000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> + status = "disabled";
> + };
>
> - usb0: usb-channel@0 {
> - reg = <0>;
> - #phy-cells = <1>;
> + vin1: video@e6ef1000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> + status = "disabled";
> };
> - usb2: usb-channel@2 {
> - reg = <2>;
> - #phy-cells = <1>;
> +
> + vin2: video@e6ef2000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef2000 0 0x1000>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 809>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 809>;
> + status = "disabled";
> };
> - };
>
> - vin0: video@e6ef0000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> + vin3: video@e6ef3000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef3000 0 0x1000>;
> + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 808>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 808>;
> + status = "disabled";
> + };
>
> - vin1: video@e6ef1000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> + vsp@fe920000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe920000 0 0x8000>;
> + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 130>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 130>;
> + };
>
> - vin2: video@e6ef2000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef2000 0 0x1000>;
> - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 809>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 809>;
> - status = "disabled";
> - };
> + vsp@fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
>
> - vin3: video@e6ef3000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef3000 0 0x1000>;
> - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 808>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 808>;
> - status = "disabled";
> - };
> + vsp@fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
>
> - vsp@fe920000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe920000 0 0x8000>;
> - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 130>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 130>;
> - };
> + vsp@fe938000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe938000 0 0x8000>;
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 127>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 127>;
> + };
>
> - vsp@fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> - };
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7790";
> + reg = <0 0xfeb00000 0 0x70000>,
> + <0 0xfeb90000 0 0x1c>,
> + <0 0xfeb94000 0 0x1c>;
> + reg-names = "du", "lvds.0", "lvds.1";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> + <&cpg CPG_MOD 725>;
> + clock-names = "du.0", "du.1", "du.2", "lvds.0",
> + "lvds.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> + port@1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> + };
> + port@2 {
> + reg = <2>;
> + du_out_lvds1: endpoint {
> + };
> + };
> + };
> + };
>
> - vsp@fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> + can0: can@e6e80000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 916>;
> + status = "disabled";
> + };
>
> - vsp@fe938000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe938000 0 0x8000>;
> - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 127>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 127>;
> - };
> + can1: can@e6e88000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 915>;
> + status = "disabled";
> + };
>
> - du: display@feb00000 {
> - compatible = "renesas,du-r8a7790";
> - reg = <0 0xfeb00000 0 0x70000>,
> - <0 0xfeb90000 0 0x1c>,
> - <0 0xfeb94000 0 0x1c>;
> - reg-names = "du", "lvds.0", "lvds.1";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> - <&cpg CPG_MOD 725>;
> - clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
> - status = "disabled";
> -
> - ports {
> + jpu: jpeg-codec@fe980000 {
> + compatible = "renesas,jpu-r8a7790",
> + "renesas,rcar-gen2-jpu";
> + reg = <0 0xfe980000 0 0x10300>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 106>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 106>;
> + };
> +
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7790-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
> +
> + prr: chipid@ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + rst: reset-controller@e6160000 {
> + compatible = "renesas,r8a7790-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a7790-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + qspi: spi@e6b10000 {
> + compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> #address-cells = <1>;
> #size-cells = <0>;
> + status = "disabled";
> + };
>
> - port@0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> + msiof0: spi@e6e20000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e20000 0 0x0064>;
> + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0>;
> + dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> + <&dmac1 0x51>, <&dmac1 0x52>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + msiof1: spi@e6e10000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e10000 0 0x0064>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 208>;
> + dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> + <&dmac1 0x55>, <&dmac1 0x56>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 208>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + msiof2: spi@e6e00000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e00000 0 0x0064>;
> + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 205>;
> + dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> + <&dmac1 0x41>, <&dmac1 0x42>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 205>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + msiof3: spi@e6c90000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6c90000 0 0x0064>;
> + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 215>;
> + dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> + <&dmac1 0x45>, <&dmac1 0x46>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 215>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + xhci: usb@ee000000 {
> + compatible = "renesas,xhci-r8a7790",
> + "renesas,rcar-gen2-xhci";
> + reg = <0 0xee000000 0 0xc00>;
> + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 328>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 328>;
> + phys = <&usb2 1>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> + pci0: pci@ee090000 {
> + compatible = "renesas,pci-r8a7790",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee090000 0 0xc00>,
> + <0 0xee080000 0 0x1100>;
> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb@1,0 {
> + reg = <0x800 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> +
> + usb@2,0 {
> + reg = <0x1000 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + pci1: pci@ee0b0000 {
> + compatible = "renesas,pci-r8a7790",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee0b0000 0 0xc00>,
> + <0 0xee0a0000 0 0x1100>;
> + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <1 1>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pci2: pci@ee0d0000 {
> + compatible = "renesas,pci-r8a7790",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + reg = <0 0xee0d0000 0 0xc00>,
> + <0 0xee0c0000 0 0x1100>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> +
> + bus-range = <2 2>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb@1,0 {
> + reg = <0x20800 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> +
> + usb@2,0 {
> + reg = <0x21000 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + pciec: pcie@fe000000 {
> + compatible = "renesas,pcie-r8a7790",
> + "renesas,pcie-rcar-gen2";
> + reg = <0 0xfe000000 0 0x80000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> + /* Map all possible DDR as inbound ranges */
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
> + 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
> + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 0>;
> + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
> + clock-names = "pcie", "pcie_bus";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 319>;
> + status = "disabled";
> + };
> +
> + rcar_sound: sound@ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7790",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> + <&cpg CPG_CORE R8A7790_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "ctu.0", "ctu.1",
> + "mix.0", "mix.1",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
> +
> + status = "disabled";
> +
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma1 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma1 0xbe>;
> + dma-names = "tx";
> };
> };
> - port@1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> +
> + rcar_sound,mix {
> + mix0: mix-0 { };
> + mix1: mix-1 { };
> + };
> +
> + rcar_sound,ctu {
> + ctu00: ctu-0 { };
> + ctu01: ctu-1 { };
> + ctu02: ctu-2 { };
> + ctu03: ctu-3 { };
> + ctu10: ctu-4 { };
> + ctu11: ctu-5 { };
> + ctu12: ctu-6 { };
> + ctu13: ctu-7 { };
> + };
> +
> + rcar_sound,src {
> + src0: src-0 {
> + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x85>, <&audma1 0x9a>;
> + dma-names = "rx", "tx";
> + };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma1 0x9c>;
> + dma-names = "rx", "tx";
> + };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma1 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma1 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + src7: src-7 {
> + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x93>, <&audma1 0xb6>;
> + dma-names = "rx", "tx";
> + };
> + src8: src-8 {
> + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x95>, <&audma1 0xb8>;
> + dma-names = "rx", "tx";
> + };
> + src9: src-9 {
> + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x97>, <&audma1 0xba>;
> + dma-names = "rx", "tx";
> };
> };
> - port@2 {
> - reg = <2>;
> - du_out_lvds1: endpoint {
> +
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma1 0x02>,
> + <&audma0 0x15>, <&audma1 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma1 0x04>,
> + <&audma0 0x49>, <&audma1 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma1 0x06>,
> + <&audma0 0x63>, <&audma1 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma1 0x08>,
> + <&audma0 0x6f>, <&audma1 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma1 0x0a>,
> + <&audma0 0x71>, <&audma1 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> + <&audma0 0x73>, <&audma1 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> + <&audma0 0x75>, <&audma1 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma1 0x10>,
> + <&audma0 0x79>, <&audma1 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma1 0x12>,
> + <&audma0 0x7b>, <&audma1 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma1 0x14>,
> + <&audma0 0x7d>, <&audma1 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> };
> };
> };
> - };
>
> - can0: can@e6e80000 {
> - compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> + ipmmu_sy0: mmu@e6280000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_sy1: mmu@e6290000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_ds: mmu@e6740000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu@ec680000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu@fe951000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu@ffc80000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> };
>
> - can1: can@e6e88000 {
> - compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&thermal>;
> +
> + trips {
> + cpu-crit {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + };
> + };
> };
>
> - jpu: jpeg-codec@fe980000 {
> - compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
> - reg = <0 0xfe980000 0 0x10300>;
> - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 106>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 106>;
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> /* External root clock */
> @@ -1194,476 +1736,4 @@
> /* This value must be overridden by the board. */
> clock-frequency = <0>;
> };
> -
> - cpg: clock-controller@e6150000 {
> - compatible = "renesas,r8a7790-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - prr: chipid@ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - rst: reset-controller@e6160000 {
> - compatible = "renesas,r8a7790-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - sysc: system-controller@e6180000 {
> - compatible = "renesas,r8a7790-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - qspi: spi@e6b10000 {
> - compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof0: spi@e6e20000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e20000 0 0x0064>;
> - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 0>;
> - dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> - <&dmac1 0x51>, <&dmac1 0x52>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof1: spi@e6e10000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e10000 0 0x0064>;
> - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 208>;
> - dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> - <&dmac1 0x55>, <&dmac1 0x56>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 208>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof2: spi@e6e00000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e00000 0 0x0064>;
> - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 205>;
> - dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> - <&dmac1 0x41>, <&dmac1 0x42>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 205>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof3: spi@e6c90000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6c90000 0 0x0064>;
> - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 215>;
> - dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> - <&dmac1 0x45>, <&dmac1 0x46>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 215>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - xhci: usb@ee000000 {
> - compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
> - reg = <0 0xee000000 0 0xc00>;
> - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 328>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 328>;
> - phys = <&usb2 1>;
> - phy-names = "usb";
> - status = "disabled";
> - };
> -
> - pci0: pci@ee090000 {
> - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee090000 0 0xc00>,
> - <0 0xee080000 0 0x1100>;
> - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <0 0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb@1,0 {
> - reg = <0x800 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> -
> - usb@2,0 {
> - reg = <0x1000 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> - };
> -
> - pci1: pci@ee0b0000 {
> - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee0b0000 0 0xc00>,
> - <0 0xee0a0000 0 0x1100>;
> - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <1 1>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> - };
> -
> - pci2: pci@ee0d0000 {
> - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - reg = <0 0xee0d0000 0 0xc00>,
> - <0 0xee0c0000 0 0x1100>;
> - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> - status = "disabled";
> -
> - bus-range = <2 2>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb@1,0 {
> - reg = <0x20800 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> -
> - usb@2,0 {
> - reg = <0x21000 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> - };
> -
> - pciec: pcie@fe000000 {
> - compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
> - reg = <0 0xfe000000 0 0x80000>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - bus-range = <0x00 0xff>;
> - device_type = "pci";
> - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> - /* Map all possible DDR as inbound ranges */
> - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
> - 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
> - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0 0 0 0>;
> - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
> - clock-names = "pcie", "pcie_bus";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 319>;
> - status = "disabled";
> - };
> -
> - rcar_sound: sound@ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7790",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> -
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> - <&cpg CPG_CORE R8A7790_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6", "src.5",
> - "src.4", "src.3", "src.2", "src.1", "src.0",
> - "ctu.0", "ctu.1",
> - "mix.0", "mix.1",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
> -
> - status = "disabled";
> -
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma1 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma1 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,mix {
> - mix0: mix-0 { };
> - mix1: mix-1 { };
> - };
> -
> - rcar_sound,ctu {
> - ctu00: ctu-0 { };
> - ctu01: ctu-1 { };
> - ctu02: ctu-2 { };
> - ctu03: ctu-3 { };
> - ctu10: ctu-4 { };
> - ctu11: ctu-5 { };
> - ctu12: ctu-6 { };
> - ctu13: ctu-7 { };
> - };
> -
> - rcar_sound,src {
> - src0: src-0 {
> - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x85>, <&audma1 0x9a>;
> - dma-names = "rx", "tx";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma1 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma1 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma1 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - src7: src-7 {
> - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x93>, <&audma1 0xb6>;
> - dma-names = "rx", "tx";
> - };
> - src8: src-8 {
> - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x95>, <&audma1 0xb8>;
> - dma-names = "rx", "tx";
> - };
> - src9: src-9 {
> - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x97>, <&audma1 0xba>;
> - dma-names = "rx", "tx";
> - };
> - };
> -
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - };
> - };
> -
> - ipmmu_sy0: mmu@e6280000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu@e6290000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu@e6740000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu@ec680000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu@fe951000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_rt: mmu@ffc80000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
@ 2018-01-18 0:24 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:24 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:03 +0100, Simon Horman wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The 'ranges' property in the soc node is new. I checked the
documentation and as far as I can make out this is how it should be. But
I'm not certain why :-)
Other then that adding of the soc node and fixing-up the line lengths do
not change anything.
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * No change
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 2794 ++++++++++++++++++++--------------------
> 1 file changed, 1432 insertions(+), 1362 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index b4306f7c1bbb..1f4b3a4ed287 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -17,7 +17,6 @@
>
> / {
> compatible = "renesas,r8a7790";
> - interrupt-parent = <&gic>;
> #address-cells = <2>;
> #size-cells = <2>;
>
> @@ -159,981 +158,1524 @@
> };
> };
>
> - thermal-zones {
> - cpu_thermal: cpu-thermal {
> - polling-delay-passive = <0>;
> - polling-delay = <0>;
> + soc {
> + compatible = "simple-bus";
> + interrupt-parent = <&gic>;
>
> - thermal-sensors = <&thermal>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> - trips {
> - cpu-crit {
> - temperature = <95000>;
> - hysteresis = <0>;
> - type = "critical";
> - };
> - };
> - cooling-maps {
> - };
> + apmu at e6151000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> };
> - };
>
> - apmu at e6151000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> - };
> + apmu at e6152000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> + };
>
> - apmu at e6152000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> - };
> + gic: interrupt-controller at f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
>
> - gic: interrupt-controller at f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> + gpio0: gpio at e6050000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6050000 0 0x50>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 0 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 912>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 912>;
> + };
>
> - gpio0: gpio at e6050000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6050000 0 0x50>;
> - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 0 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 912>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 912>;
> - };
> + gpio1: gpio at e6051000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6051000 0 0x50>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 32 30>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 911>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 911>;
> + };
>
> - gpio1: gpio at e6051000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6051000 0 0x50>;
> - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 32 30>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 911>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 911>;
> - };
> + gpio2: gpio at e6052000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6052000 0 0x50>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 64 30>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 910>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 910>;
> + };
>
> - gpio2: gpio at e6052000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6052000 0 0x50>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 64 30>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 910>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 910>;
> - };
> + gpio3: gpio at e6053000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6053000 0 0x50>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 96 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 909>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 909>;
> + };
>
> - gpio3: gpio at e6053000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6053000 0 0x50>;
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 96 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 909>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 909>;
> - };
> + gpio4: gpio at e6054000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6054000 0 0x50>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 128 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 908>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 908>;
> + };
>
> - gpio4: gpio at e6054000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6054000 0 0x50>;
> - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 128 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 908>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 908>;
> - };
> + gpio5: gpio at e6055000 {
> + compatible = "renesas,gpio-r8a7790",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055000 0 0x50>;
> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 160 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 907>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 907>;
> + };
>
> - gpio5: gpio at e6055000 {
> - compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055000 0 0x50>;
> - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 160 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 907>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 907>;
> - };
> + thermal: thermal at e61f0000 {
> + compatible = "renesas,thermal-r8a7790",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> + };
>
> - thermal: thermal at e61f0000 {
> - compatible = "renesas,thermal-r8a7790",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> - };
> + cmt0: timer at ffca0000 {
> + compatible = "renesas,r8a7790-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
>
> - timer {
> - compatible = "arm,armv7-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> - };
> + cmt1: timer at e6130000 {
> + compatible = "renesas,r8a7790-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
>
> - cmt0: timer at ffca0000 {
> - compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> -
> - status = "disabled";
> - };
> + irqc0: interrupt-controller at e61c0000 {
> + compatible = "renesas,irqc-r8a7790", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
>
> - cmt1: timer at e6130000 {
> - compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> -
> - status = "disabled";
> - };
> + dmac0: dma-controller at e6700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - irqc0: interrupt-controller at e61c0000 {
> - compatible = "renesas,irqc-r8a7790", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> + dmac1: dma-controller at e6720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - dmac0: dma-controller at e6700000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma0: dma-controller at ec700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - dmac1: dma-controller at e6720000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma1: dma-controller at ec720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - audma0: dma-controller at ec700000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + usb_dmac0: dma-controller at e65a0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65a0000 0 0x100>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 330>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 330>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> + };
>
> - audma1: dma-controller at ec720000 {
> - compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + usb_dmac1: dma-controller at e65b0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65b0000 0 0x100>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 331>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 331>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> + };
>
> - usb_dmac0: dma-controller at e65a0000 {
> - compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
> - reg = <0 0xe65a0000 0 0x100>;
> - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 330>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 330>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> - };
> + i2c0: i2c at e6508000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
>
> - usb_dmac1: dma-controller at e65b0000 {
> - compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
> - reg = <0 0xe65b0000 0 0x100>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 331>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 331>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> - };
> + i2c1: i2c at e6518000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c0: i2c at e6508000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - i2c-scl-internal-delay-ns = <110>;
> - status = "disabled";
> - };
> + i2c2: i2c at e6530000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c1: i2c at e6518000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c3: i2c at e6540000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7790",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
>
> - i2c2: i2c at e6530000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + iic0: i2c at e6500000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 318>;
> + status = "disabled";
> + };
>
> - i2c3: i2c at e6540000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - i2c-scl-internal-delay-ns = <110>;
> - status = "disabled";
> - };
> + iic1: i2c at e6510000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 323>;
> + status = "disabled";
> + };
>
> - iic0: i2c at e6500000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - status = "disabled";
> - };
> + iic2: i2c at e6520000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6520000 0 0x425>;
> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 300>;
> + dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
> + <&dmac1 0x69>, <&dmac1 0x6a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 300>;
> + status = "disabled";
> + };
>
> - iic1: i2c at e6510000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - status = "disabled";
> - };
> + iic3: i2c at e60b0000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7790",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe60b0000 0 0x425>;
> + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 926>;
> + dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> + <&dmac1 0x77>, <&dmac1 0x78>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 926>;
> + status = "disabled";
> + };
>
> - iic2: i2c at e6520000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6520000 0 0x425>;
> - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 300>;
> - dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
> - <&dmac1 0x69>, <&dmac1 0x6a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 300>;
> - status = "disabled";
> - };
> + mmcif0: mmc at ee200000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
>
> - iic3: i2c at e60b0000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe60b0000 0 0x425>;
> - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 926>;
> - dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> - <&dmac1 0x77>, <&dmac1 0x78>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 926>;
> - status = "disabled";
> - };
> + mmcif1: mmc at ee220000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee220000 0 0x80>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 305>;
> + dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> + <&dmac1 0xe1>, <&dmac1 0xe2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 305>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
>
> - mmcif0: mmc at ee200000 {
> - compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> - status = "disabled";
> - max-frequency = <97500000>;
> - };
> + pfc: pin-controller at e6060000 {
> + compatible = "renesas,pfc-r8a7790";
> + reg = <0 0xe6060000 0 0x250>;
> + };
>
> - mmcif1: mmc at ee220000 {
> - compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
> - reg = <0 0xee220000 0 0x80>;
> - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 305>;
> - dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> - <&dmac1 0xe1>, <&dmac1 0xe2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 305>;
> - reg-io-width = <4>;
> - status = "disabled";
> - max-frequency = <97500000>;
> - };
> + sdhi0: sd at ee100000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
>
> - pfc: pin-controller at e6060000 {
> - compatible = "renesas,pfc-r8a7790";
> - reg = <0 0xe6060000 0 0x250>;
> - };
> + sdhi1: sd at ee120000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee120000 0 0x328>;
> + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 313>;
> + dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> + <&dmac1 0xc9>, <&dmac1 0xca>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 313>;
> + status = "disabled";
> + };
>
> - sdhi0: sd at ee100000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> + sdhi2: sd at ee140000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
>
> - sdhi1: sd at ee120000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee120000 0 0x328>;
> - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 313>;
> - dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> - <&dmac1 0xc9>, <&dmac1 0xca>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 313>;
> - status = "disabled";
> - };
> + sdhi3: sd at ee160000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
>
> - sdhi2: sd at ee140000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> - };
> + scifa0: serial at e6c40000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 204>;
> + status = "disabled";
> + };
>
> - sdhi3: sd at ee160000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> - };
> + scifa1: serial at e6c50000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 203>;
> + status = "disabled";
> + };
>
> - scifa0: serial at e6c40000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> - status = "disabled";
> - };
> + scifa2: serial at e6c60000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 202>;
> + status = "disabled";
> + };
>
> - scifa1: serial at e6c50000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> - status = "disabled";
> - };
> + scifb0: serial at e6c20000 {
> + compatible = "renesas,scifb-r8a7790",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 206>;
> + status = "disabled";
> + };
>
> - scifa2: serial at e6c60000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> - };
> + scifb1: serial at e6c30000 {
> + compatible = "renesas,scifb-r8a7790",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 207>;
> + status = "disabled";
> + };
>
> - scifb0: serial at e6c20000 {
> - compatible = "renesas,scifb-r8a7790",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> - status = "disabled";
> - };
> + scifb2: serial at e6ce0000 {
> + compatible = "renesas,scifb-r8a7790",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 216>;
> + status = "disabled";
> + };
>
> - scifb1: serial at e6c30000 {
> - compatible = "renesas,scifb-r8a7790",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> - status = "disabled";
> - };
> + scif0: serial at e6e60000 {
> + compatible = "renesas,scif-r8a7790",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 721>;
> + status = "disabled";
> + };
>
> - scifb2: serial at e6ce0000 {
> - compatible = "renesas,scifb-r8a7790",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> - status = "disabled";
> - };
> + scif1: serial at e6e68000 {
> + compatible = "renesas,scif-r8a7790",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 720>;
> + status = "disabled";
> + };
>
> - scif0: serial at e6e60000 {
> - compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> - status = "disabled";
> - };
> + scif2: serial at e6e56000 {
> + compatible = "renesas,scif-r8a7790",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e56000 0 64>;
> + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 310>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 310>;
> + status = "disabled";
> + };
>
> - scif1: serial at e6e68000 {
> - compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> - status = "disabled";
> - };
> + hscif0: serial at e62c0000 {
> + compatible = "renesas,hscif-r8a7790",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 717>;
> + status = "disabled";
> + };
>
> - scif2: serial at e6e56000 {
> - compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e56000 0 64>;
> - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 310>;
> - status = "disabled";
> - };
> + hscif1: serial at e62c8000 {
> + compatible = "renesas,hscif-r8a7790",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>,
> + <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 716>;
> + status = "disabled";
> + };
>
> - hscif0: serial at e62c0000 {
> - compatible = "renesas,hscif-r8a7790",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> + icram0: sram at e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
>
> - hscif1: serial at e62c8000 {
> - compatible = "renesas,hscif-r8a7790",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> + icram1: sram at e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
>
> - icram0: sram at e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> + smp-sram at 0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> + };
>
> - icram1: sram at e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> + ether: ethernet at ee700000 {
> + compatible = "renesas,ether-r8a7790",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - smp-sram at 0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> + avb: ethernet at e6800000 {
> + compatible = "renesas,etheravb-r8a7790",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> };
> - };
>
> - ether: ethernet at ee700000 {
> - compatible = "renesas,ether-r8a7790",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + sata0: sata at ee300000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee300000 0 0x2000>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 815>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 815>;
> + status = "disabled";
> + };
>
> - avb: ethernet at e6800000 {
> - compatible = "renesas,etheravb-r8a7790",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + sata1: sata at ee500000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee500000 0 0x2000>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 814>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 814>;
> + status = "disabled";
> + };
>
> - sata0: sata at ee300000 {
> - compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
> - reg = <0 0xee300000 0 0x2000>;
> - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 815>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 815>;
> - status = "disabled";
> - };
> + hsusb: usb at e6590000 {
> + compatible = "renesas,usbhs-r8a7790",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> + dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> + <&usb_dmac1 0>, <&usb_dmac1 1>;
> + dma-names = "ch0", "ch1", "ch2", "ch3";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> + phy-names = "usb";
> + status = "disabled";
> + };
>
> - sata1: sata at ee500000 {
> - compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
> - reg = <0 0xee500000 0 0x2000>;
> - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 814>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 814>;
> - status = "disabled";
> - };
> + usbphy: usb-phy at e6590100 {
> + compatible = "renesas,usb-phy-r8a7790",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + status = "disabled";
>
> - hsusb: usb at e6590000 {
> - compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> - <&usb_dmac1 0>, <&usb_dmac1 1>;
> - dma-names = "ch0", "ch1", "ch2", "ch3";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> - status = "disabled";
> - };
> + usb0: usb-channel at 0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel at 2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> + };
>
> - usbphy: usb-phy at e6590100 {
> - compatible = "renesas,usb-phy-r8a7790",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - status = "disabled";
> + vin0: video at e6ef0000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> + status = "disabled";
> + };
>
> - usb0: usb-channel at 0 {
> - reg = <0>;
> - #phy-cells = <1>;
> + vin1: video at e6ef1000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> + status = "disabled";
> };
> - usb2: usb-channel at 2 {
> - reg = <2>;
> - #phy-cells = <1>;
> +
> + vin2: video at e6ef2000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef2000 0 0x1000>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 809>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 809>;
> + status = "disabled";
> };
> - };
>
> - vin0: video at e6ef0000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> + vin3: video at e6ef3000 {
> + compatible = "renesas,vin-r8a7790",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef3000 0 0x1000>;
> + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 808>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 808>;
> + status = "disabled";
> + };
>
> - vin1: video at e6ef1000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> + vsp at fe920000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe920000 0 0x8000>;
> + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 130>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 130>;
> + };
>
> - vin2: video at e6ef2000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef2000 0 0x1000>;
> - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 809>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 809>;
> - status = "disabled";
> - };
> + vsp at fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
>
> - vin3: video at e6ef3000 {
> - compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef3000 0 0x1000>;
> - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 808>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 808>;
> - status = "disabled";
> - };
> + vsp at fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
>
> - vsp at fe920000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe920000 0 0x8000>;
> - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 130>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 130>;
> - };
> + vsp at fe938000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe938000 0 0x8000>;
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 127>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 127>;
> + };
>
> - vsp at fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> - };
> + du: display at feb00000 {
> + compatible = "renesas,du-r8a7790";
> + reg = <0 0xfeb00000 0 0x70000>,
> + <0 0xfeb90000 0 0x1c>,
> + <0 0xfeb94000 0 0x1c>;
> + reg-names = "du", "lvds.0", "lvds.1";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> + <&cpg CPG_MOD 725>;
> + clock-names = "du.0", "du.1", "du.2", "lvds.0",
> + "lvds.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> + port at 1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> + };
> + port at 2 {
> + reg = <2>;
> + du_out_lvds1: endpoint {
> + };
> + };
> + };
> + };
>
> - vsp at fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> + can0: can at e6e80000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 916>;
> + status = "disabled";
> + };
>
> - vsp at fe938000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe938000 0 0x8000>;
> - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 127>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 127>;
> - };
> + can1: can at e6e88000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 915>;
> + status = "disabled";
> + };
>
> - du: display at feb00000 {
> - compatible = "renesas,du-r8a7790";
> - reg = <0 0xfeb00000 0 0x70000>,
> - <0 0xfeb90000 0 0x1c>,
> - <0 0xfeb94000 0 0x1c>;
> - reg-names = "du", "lvds.0", "lvds.1";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> - <&cpg CPG_MOD 725>;
> - clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
> - status = "disabled";
> -
> - ports {
> + jpu: jpeg-codec at fe980000 {
> + compatible = "renesas,jpu-r8a7790",
> + "renesas,rcar-gen2-jpu";
> + reg = <0 0xfe980000 0 0x10300>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 106>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 106>;
> + };
> +
> + cpg: clock-controller at e6150000 {
> + compatible = "renesas,r8a7790-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
> +
> + prr: chipid at ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + rst: reset-controller at e6160000 {
> + compatible = "renesas,r8a7790-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7790-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + qspi: spi at e6b10000 {
> + compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> #address-cells = <1>;
> #size-cells = <0>;
> + status = "disabled";
> + };
>
> - port at 0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> + msiof0: spi at e6e20000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e20000 0 0x0064>;
> + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0>;
> + dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> + <&dmac1 0x51>, <&dmac1 0x52>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + msiof1: spi at e6e10000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e10000 0 0x0064>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 208>;
> + dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> + <&dmac1 0x55>, <&dmac1 0x56>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 208>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + msiof2: spi at e6e00000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e00000 0 0x0064>;
> + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 205>;
> + dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> + <&dmac1 0x41>, <&dmac1 0x42>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 205>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + msiof3: spi at e6c90000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6c90000 0 0x0064>;
> + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 215>;
> + dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> + <&dmac1 0x45>, <&dmac1 0x46>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 215>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + xhci: usb at ee000000 {
> + compatible = "renesas,xhci-r8a7790",
> + "renesas,rcar-gen2-xhci";
> + reg = <0 0xee000000 0 0xc00>;
> + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 328>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 328>;
> + phys = <&usb2 1>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> + pci0: pci at ee090000 {
> + compatible = "renesas,pci-r8a7790",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee090000 0 0xc00>,
> + <0 0xee080000 0 0x1100>;
> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb at 1,0 {
> + reg = <0x800 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> +
> + usb at 2,0 {
> + reg = <0x1000 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + pci1: pci at ee0b0000 {
> + compatible = "renesas,pci-r8a7790",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee0b0000 0 0xc00>,
> + <0 0xee0a0000 0 0x1100>;
> + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <1 1>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pci2: pci at ee0d0000 {
> + compatible = "renesas,pci-r8a7790",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + reg = <0 0xee0d0000 0 0xc00>,
> + <0 0xee0c0000 0 0x1100>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> +
> + bus-range = <2 2>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb at 1,0 {
> + reg = <0x20800 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> +
> + usb at 2,0 {
> + reg = <0x21000 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + pciec: pcie at fe000000 {
> + compatible = "renesas,pcie-r8a7790",
> + "renesas,pcie-rcar-gen2";
> + reg = <0 0xfe000000 0 0x80000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> + /* Map all possible DDR as inbound ranges */
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
> + 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
> + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 0>;
> + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
> + clock-names = "pcie", "pcie_bus";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 319>;
> + status = "disabled";
> + };
> +
> + rcar_sound: sound at ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7790",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> + <&cpg CPG_CORE R8A7790_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "ctu.0", "ctu.1",
> + "mix.0", "mix.1",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
> +
> + status = "disabled";
> +
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma1 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma1 0xbe>;
> + dma-names = "tx";
> };
> };
> - port at 1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> +
> + rcar_sound,mix {
> + mix0: mix-0 { };
> + mix1: mix-1 { };
> + };
> +
> + rcar_sound,ctu {
> + ctu00: ctu-0 { };
> + ctu01: ctu-1 { };
> + ctu02: ctu-2 { };
> + ctu03: ctu-3 { };
> + ctu10: ctu-4 { };
> + ctu11: ctu-5 { };
> + ctu12: ctu-6 { };
> + ctu13: ctu-7 { };
> + };
> +
> + rcar_sound,src {
> + src0: src-0 {
> + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x85>, <&audma1 0x9a>;
> + dma-names = "rx", "tx";
> + };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma1 0x9c>;
> + dma-names = "rx", "tx";
> + };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma1 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma1 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + src7: src-7 {
> + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x93>, <&audma1 0xb6>;
> + dma-names = "rx", "tx";
> + };
> + src8: src-8 {
> + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x95>, <&audma1 0xb8>;
> + dma-names = "rx", "tx";
> + };
> + src9: src-9 {
> + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x97>, <&audma1 0xba>;
> + dma-names = "rx", "tx";
> };
> };
> - port at 2 {
> - reg = <2>;
> - du_out_lvds1: endpoint {
> +
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma1 0x02>,
> + <&audma0 0x15>, <&audma1 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma1 0x04>,
> + <&audma0 0x49>, <&audma1 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma1 0x06>,
> + <&audma0 0x63>, <&audma1 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma1 0x08>,
> + <&audma0 0x6f>, <&audma1 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma1 0x0a>,
> + <&audma0 0x71>, <&audma1 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> + <&audma0 0x73>, <&audma1 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> + <&audma0 0x75>, <&audma1 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma1 0x10>,
> + <&audma0 0x79>, <&audma1 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma1 0x12>,
> + <&audma0 0x7b>, <&audma1 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma1 0x14>,
> + <&audma0 0x7d>, <&audma1 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> };
> };
> };
> - };
>
> - can0: can at e6e80000 {
> - compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> + ipmmu_sy0: mmu at e6280000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_sy1: mmu at e6290000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_ds: mmu at e6740000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu at ec680000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu at fe951000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu at ffc80000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> };
>
> - can1: can at e6e88000 {
> - compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&thermal>;
> +
> + trips {
> + cpu-crit {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + };
> + };
> };
>
> - jpu: jpeg-codec at fe980000 {
> - compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
> - reg = <0 0xfe980000 0 0x10300>;
> - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 106>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 106>;
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> /* External root clock */
> @@ -1194,476 +1736,4 @@
> /* This value must be overridden by the board. */
> clock-frequency = <0>;
> };
> -
> - cpg: clock-controller at e6150000 {
> - compatible = "renesas,r8a7790-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - prr: chipid at ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - rst: reset-controller at e6160000 {
> - compatible = "renesas,r8a7790-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - sysc: system-controller at e6180000 {
> - compatible = "renesas,r8a7790-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - qspi: spi at e6b10000 {
> - compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof0: spi at e6e20000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e20000 0 0x0064>;
> - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 0>;
> - dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> - <&dmac1 0x51>, <&dmac1 0x52>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof1: spi at e6e10000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e10000 0 0x0064>;
> - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 208>;
> - dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> - <&dmac1 0x55>, <&dmac1 0x56>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 208>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof2: spi at e6e00000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e00000 0 0x0064>;
> - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 205>;
> - dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> - <&dmac1 0x41>, <&dmac1 0x42>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 205>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof3: spi at e6c90000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6c90000 0 0x0064>;
> - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 215>;
> - dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> - <&dmac1 0x45>, <&dmac1 0x46>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 215>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - xhci: usb at ee000000 {
> - compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
> - reg = <0 0xee000000 0 0xc00>;
> - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 328>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 328>;
> - phys = <&usb2 1>;
> - phy-names = "usb";
> - status = "disabled";
> - };
> -
> - pci0: pci at ee090000 {
> - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee090000 0 0xc00>,
> - <0 0xee080000 0 0x1100>;
> - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <0 0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb at 1,0 {
> - reg = <0x800 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> -
> - usb at 2,0 {
> - reg = <0x1000 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> - };
> -
> - pci1: pci at ee0b0000 {
> - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee0b0000 0 0xc00>,
> - <0 0xee0a0000 0 0x1100>;
> - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <1 1>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> - };
> -
> - pci2: pci at ee0d0000 {
> - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - reg = <0 0xee0d0000 0 0xc00>,
> - <0 0xee0c0000 0 0x1100>;
> - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> - status = "disabled";
> -
> - bus-range = <2 2>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb at 1,0 {
> - reg = <0x20800 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> -
> - usb at 2,0 {
> - reg = <0x21000 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> - };
> -
> - pciec: pcie at fe000000 {
> - compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
> - reg = <0 0xfe000000 0 0x80000>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - bus-range = <0x00 0xff>;
> - device_type = "pci";
> - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> - /* Map all possible DDR as inbound ranges */
> - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
> - 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
> - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0 0 0 0>;
> - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
> - clock-names = "pcie", "pcie_bus";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 319>;
> - status = "disabled";
> - };
> -
> - rcar_sound: sound at ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7790",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> -
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> - <&cpg CPG_CORE R8A7790_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6", "src.5",
> - "src.4", "src.3", "src.2", "src.1", "src.0",
> - "ctu.0", "ctu.1",
> - "mix.0", "mix.1",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
> -
> - status = "disabled";
> -
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma1 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma1 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,mix {
> - mix0: mix-0 { };
> - mix1: mix-1 { };
> - };
> -
> - rcar_sound,ctu {
> - ctu00: ctu-0 { };
> - ctu01: ctu-1 { };
> - ctu02: ctu-2 { };
> - ctu03: ctu-3 { };
> - ctu10: ctu-4 { };
> - ctu11: ctu-5 { };
> - ctu12: ctu-6 { };
> - ctu13: ctu-7 { };
> - };
> -
> - rcar_sound,src {
> - src0: src-0 {
> - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x85>, <&audma1 0x9a>;
> - dma-names = "rx", "tx";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma1 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma1 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma1 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - src7: src-7 {
> - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x93>, <&audma1 0xb6>;
> - dma-names = "rx", "tx";
> - };
> - src8: src-8 {
> - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x95>, <&audma1 0xb8>;
> - dma-names = "rx", "tx";
> - };
> - src9: src-9 {
> - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x97>, <&audma1 0xba>;
> - dma-names = "rx", "tx";
> - };
> - };
> -
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - };
> - };
> -
> - ipmmu_sy0: mmu at e6280000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu at e6290000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu at e6740000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu at ec680000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu at fe951000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_rt: mmu at ffc80000 {
> - compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 0:29 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:29 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:04 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the addresss on the bus with instances of the same
> IP block grouped together.
Sorting of cmt0 and cmt1 diverge from this, but I agree it's better to
sort cmt0 before cmt1 :-)
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * Correct order of: qspi, msiof*, can*, and vin* nodes.
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 1592 ++++++++++++++++++++--------------------
> 1 file changed, 796 insertions(+), 796 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 1f4b3a4ed287..54c5a2d7ea89 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -166,32 +166,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu@e6151000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> - };
> -
> - apmu@e6152000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> - };
> -
> - gic: interrupt-controller@f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> gpio0: gpio@e6050000 {
> compatible = "renesas,gpio-r8a7790",
> "renesas,rcar-gen2-gpio";
> @@ -282,50 +256,42 @@
> resets = <&cpg 907>;
> };
>
> - thermal: thermal@e61f0000 {
> - compatible = "renesas,thermal-r8a7790",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7790";
> + reg = <0 0xe6060000 0 0x250>;
> };
>
> - cmt0: timer@ffca0000 {
> - compatible = "renesas,r8a7790-cmt0",
> - "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7790-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
>
> - status = "disabled";
> + apmu@e6151000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> };
>
> - cmt1: timer@e6130000 {
> - compatible = "renesas,r8a7790-cmt1",
> - "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> + apmu@e6152000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> + };
>
> - status = "disabled";
> + rst: reset-controller@e6160000 {
> + compatible = "renesas,r8a7790-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a7790-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> };
>
> irqc0: interrupt-controller@e61c0000 {
> @@ -342,160 +308,91 @@
> resets = <&cpg 407>;
> };
>
> - dmac0: dma-controller@e6700000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> + thermal: thermal@e61f0000 {
> + compatible = "renesas,thermal-r8a7790",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> };
>
> - dmac1: dma-controller@e6720000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_sy0: mmu@e6280000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma0: dma-controller@ec700000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_sy1: mmu@e6290000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma1: dma-controller@ec720000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_ds: mmu@e6740000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - usb_dmac0: dma-controller@e65a0000 {
> - compatible = "renesas,r8a7790-usb-dmac",
> - "renesas,usb-dmac";
> - reg = <0 0xe65a0000 0 0x100>;
> - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 330>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 330>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> + ipmmu_mp: mmu@ec680000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - usb_dmac1: dma-controller@e65b0000 {
> - compatible = "renesas,r8a7790-usb-dmac",
> - "renesas,usb-dmac";
> - reg = <0 0xe65b0000 0 0x100>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 331>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 331>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> + ipmmu_mx: mmu@fe951000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu@ffc80000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + icram0: sram@e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
> +
> + icram1: sram@e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram@0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
>
> i2c0: i2c@e6508000 {
> @@ -622,107 +519,172 @@
> status = "disabled";
> };
>
> - mmcif0: mmc@ee200000 {
> - compatible = "renesas,mmcif-r8a7790",
> - "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> + hsusb: usb@e6590000 {
> + compatible = "renesas,usbhs-r8a7790",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> + dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> + <&usb_dmac1 0>, <&usb_dmac1 1>;
> + dma-names = "ch0", "ch1", "ch2", "ch3";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> + phy-names = "usb";
> status = "disabled";
> - max-frequency = <97500000>;
> };
>
> - mmcif1: mmc@ee220000 {
> - compatible = "renesas,mmcif-r8a7790",
> - "renesas,sh-mmcif";
> - reg = <0 0xee220000 0 0x80>;
> - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 305>;
> - dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> - <&dmac1 0xe1>, <&dmac1 0xe2>;
> - dma-names = "tx", "rx", "tx", "rx";
> + usbphy: usb-phy@e6590100 {
> + compatible = "renesas,usb-phy-r8a7790",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 305>;
> - reg-io-width = <4>;
> + resets = <&cpg 704>;
> status = "disabled";
> - max-frequency = <97500000>;
> +
> + usb0: usb-channel@0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel@2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> };
>
> - pfc: pin-controller@e6060000 {
> - compatible = "renesas,pfc-r8a7790";
> - reg = <0 0xe6060000 0 0x250>;
> + usb_dmac0: dma-controller@e65a0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65a0000 0 0x100>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 330>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 330>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> };
>
> - sdhi0: sd@ee100000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> + usb_dmac1: dma-controller@e65b0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65b0000 0 0x100>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 331>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> + resets = <&cpg 331>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> };
>
> - sdhi1: sd@ee120000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee120000 0 0x328>;
> - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 313>;
> - dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> - <&dmac1 0xc9>, <&dmac1 0xca>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> + dmac0: dma-controller@e6700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 313>;
> - status = "disabled";
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - sdhi2: sd@ee140000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + dmac1: dma-controller@e6720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - sdhi3: sd@ee160000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + avb: ethernet@e6800000 {
> + compatible = "renesas,etheravb-r8a7790",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - scifa0: serial@e6c40000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> + qspi: spi@e6b10000 {
> + compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + scifa0: serial@e6c40000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 204>;
> clock-names = "fck";
> @@ -892,110 +854,94 @@
> status = "disabled";
> };
>
> - icram0: sram@e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram@e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram@0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> - };
> -
> - ether: ethernet@ee700000 {
> - compatible = "renesas,ether-r8a7790",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> + msiof0: spi@e6e20000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e20000 0 0x0064>;
> + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0>;
> + dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> + <&dmac1 0x51>, <&dmac1 0x52>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> + resets = <&cpg 0>;
> #address-cells = <1>;
> #size-cells = <0>;
> status = "disabled";
> };
>
> - avb: ethernet@e6800000 {
> - compatible = "renesas,etheravb-r8a7790",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> + msiof1: spi@e6e10000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e10000 0 0x0064>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 208>;
> + dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> + <&dmac1 0x55>, <&dmac1 0x56>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> + resets = <&cpg 208>;
> #address-cells = <1>;
> #size-cells = <0>;
> status = "disabled";
> };
>
> - sata0: sata@ee300000 {
> - compatible = "renesas,sata-r8a7790",
> - "renesas,rcar-gen2-sata";
> - reg = <0 0xee300000 0 0x2000>;
> - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 815>;
> + msiof2: spi@e6e00000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e00000 0 0x0064>;
> + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 205>;
> + dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> + <&dmac1 0x41>, <&dmac1 0x42>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 815>;
> + resets = <&cpg 205>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - sata1: sata@ee500000 {
> - compatible = "renesas,sata-r8a7790",
> - "renesas,rcar-gen2-sata";
> - reg = <0 0xee500000 0 0x2000>;
> - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 814>;
> + msiof3: spi@e6c90000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6c90000 0 0x0064>;
> + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 215>;
> + dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> + <&dmac1 0x45>, <&dmac1 0x46>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 814>;
> + resets = <&cpg 215>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - hsusb: usb@e6590000 {
> - compatible = "renesas,usbhs-r8a7790",
> - "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> - <&usb_dmac1 0>, <&usb_dmac1 1>;
> - dma-names = "ch0", "ch1", "ch2", "ch3";
> + can0: can@e6e80000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> + resets = <&cpg 916>;
> status = "disabled";
> };
>
> - usbphy: usb-phy@e6590100 {
> - compatible = "renesas,usb-phy-r8a7790",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> + can1: can@e6e88000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> + resets = <&cpg 915>;
> status = "disabled";
> -
> - usb0: usb-channel@0 {
> - reg = <0>;
> - #phy-cells = <1>;
> - };
> - usb2: usb-channel@2 {
> - reg = <2>;
> - #phy-cells = <1>;
> - };
> };
>
> vin0: video@e6ef0000 {
> @@ -1042,220 +988,267 @@
> status = "disabled";
> };
>
> - vsp@fe920000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe920000 0 0x8000>;
> - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 130>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 130>;
> - };
> + rcar_sound: sound@ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7790",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> - vsp@fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> + <&cpg CPG_CORE R8A7790_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "ctu.0", "ctu.1",
> + "mix.0", "mix.1",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> - };
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
>
> - vsp@fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> + status = "disabled";
>
> - vsp@fe938000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe938000 0 0x8000>;
> - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 127>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 127>;
> - };
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma1 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma1 0xbe>;
> + dma-names = "tx";
> + };
> + };
>
> - du: display@feb00000 {
> - compatible = "renesas,du-r8a7790";
> - reg = <0 0xfeb00000 0 0x70000>,
> - <0 0xfeb90000 0 0x1c>,
> - <0 0xfeb94000 0 0x1c>;
> - reg-names = "du", "lvds.0", "lvds.1";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> - <&cpg CPG_MOD 725>;
> - clock-names = "du.0", "du.1", "du.2", "lvds.0",
> - "lvds.1";
> - status = "disabled";
> + rcar_sound,mix {
> + mix0: mix-0 { };
> + mix1: mix-1 { };
> + };
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> + rcar_sound,ctu {
> + ctu00: ctu-0 { };
> + ctu01: ctu-1 { };
> + ctu02: ctu-2 { };
> + ctu03: ctu-3 { };
> + ctu10: ctu-4 { };
> + ctu11: ctu-5 { };
> + ctu12: ctu-6 { };
> + ctu13: ctu-7 { };
> + };
>
> - port@0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> - };
> + rcar_sound,src {
> + src0: src-0 {
> + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x85>, <&audma1 0x9a>;
> + dma-names = "rx", "tx";
> };
> - port@1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> - };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma1 0x9c>;
> + dma-names = "rx", "tx";
> };
> - port@2 {
> - reg = <2>;
> - du_out_lvds1: endpoint {
> - };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma1 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma1 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + src7: src-7 {
> + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x93>, <&audma1 0xb6>;
> + dma-names = "rx", "tx";
> + };
> + src8: src-8 {
> + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x95>, <&audma1 0xb8>;
> + dma-names = "rx", "tx";
> + };
> + src9: src-9 {
> + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x97>, <&audma1 0xba>;
> + dma-names = "rx", "tx";
> };
> };
> - };
> -
> - can0: can@e6e80000 {
> - compatible = "renesas,can-r8a7790",
> - "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>,
> - <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> - };
> -
> - can1: can@e6e88000 {
> - compatible = "renesas,can-r8a7790",
> - "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>,
> - <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> - };
> -
> - jpu: jpeg-codec@fe980000 {
> - compatible = "renesas,jpu-r8a7790",
> - "renesas,rcar-gen2-jpu";
> - reg = <0 0xfe980000 0 0x10300>;
> - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 106>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 106>;
> - };
> -
> - cpg: clock-controller@e6150000 {
> - compatible = "renesas,r8a7790-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - prr: chipid@ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - rst: reset-controller@e6160000 {
> - compatible = "renesas,r8a7790-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - sysc: system-controller@e6180000 {
> - compatible = "renesas,r8a7790-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - qspi: spi@e6b10000 {
> - compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
>
> - msiof0: spi@e6e20000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e20000 0 0x0064>;
> - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 0>;
> - dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> - <&dmac1 0x51>, <&dmac1 0x52>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof1: spi@e6e10000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e10000 0 0x0064>;
> - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 208>;
> - dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> - <&dmac1 0x55>, <&dmac1 0x56>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 208>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma1 0x02>,
> + <&audma0 0x15>, <&audma1 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma1 0x04>,
> + <&audma0 0x49>, <&audma1 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma1 0x06>,
> + <&audma0 0x63>, <&audma1 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma1 0x08>,
> + <&audma0 0x6f>, <&audma1 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma1 0x0a>,
> + <&audma0 0x71>, <&audma1 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> + <&audma0 0x73>, <&audma1 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> + <&audma0 0x75>, <&audma1 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma1 0x10>,
> + <&audma0 0x79>, <&audma1 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma1 0x12>,
> + <&audma0 0x7b>, <&audma1 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma1 0x14>,
> + <&audma0 0x7d>, <&audma1 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + };
> };
>
> - msiof2: spi@e6e00000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e00000 0 0x0064>;
> - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 205>;
> - dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> - <&dmac1 0x41>, <&dmac1 0x42>;
> - dma-names = "tx", "rx", "tx", "rx";
> + audma0: dma-controller@ec700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 205>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> };
> -
> - msiof3: spi@e6c90000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6c90000 0 0x0064>;
> - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 215>;
> - dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> - <&dmac1 0x45>, <&dmac1 0x46>;
> - dma-names = "tx", "rx", "tx", "rx";
> +
> + audma1: dma-controller@ec720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 215>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> };
>
> xhci: usb@ee000000 {
> @@ -1364,6 +1357,148 @@
> };
> };
>
> + sdhi0: sd@ee100000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + sdhi1: sd@ee120000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee120000 0 0x328>;
> + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 313>;
> + dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> + <&dmac1 0xc9>, <&dmac1 0xca>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 313>;
> + status = "disabled";
> + };
> +
> + sdhi2: sd@ee140000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
> +
> + sdhi3: sd@ee160000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
> +
> + mmcif0: mmc@ee200000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
> +
> + mmcif1: mmc@ee220000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee220000 0 0x80>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 305>;
> + dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> + <&dmac1 0xe1>, <&dmac1 0xe2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 305>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
> +
> + sata0: sata@ee300000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee300000 0 0x2000>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 815>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 815>;
> + status = "disabled";
> + };
> +
> + sata1: sata@ee500000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee500000 0 0x2000>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 814>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 814>;
> + status = "disabled";
> + };
> +
> + ether: ethernet@ee700000 {
> + compatible = "renesas,ether-r8a7790",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller@f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> pciec: pcie@fe000000 {
> compatible = "renesas,pcie-r8a7790",
> "renesas,pcie-rcar-gen2";
> @@ -1392,261 +1527,126 @@
> status = "disabled";
> };
>
> - rcar_sound: sound@ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7790",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> + vsp@fe920000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe920000 0 0x8000>;
> + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 130>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 130>;
> + };
>
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> - <&cpg CPG_CORE R8A7790_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> - "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> - "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6",
> - "src.5", "src.4", "src.3", "src.2",
> - "src.1", "src.0",
> - "ctu.0", "ctu.1",
> - "mix.0", "mix.1",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> + vsp@fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
> +
> + vsp@fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
> +
> + vsp@fe938000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe938000 0 0x8000>;
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 127>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 127>;
> + };
> +
> + jpu: jpeg-codec@fe980000 {
> + compatible = "renesas,jpu-r8a7790",
> + "renesas,rcar-gen2-jpu";
> + reg = <0 0xfe980000 0 0x10300>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 106>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>,
> - <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>,
> - <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> - "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> - "ssi.1", "ssi.0";
> + resets = <&cpg 106>;
> + };
>
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7790";
> + reg = <0 0xfeb00000 0 0x70000>,
> + <0 0xfeb90000 0 0x1c>,
> + <0 0xfeb94000 0 0x1c>;
> + reg-names = "du", "lvds.0", "lvds.1";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> + <&cpg CPG_MOD 725>;
> + clock-names = "du.0", "du.1", "du.2", "lvds.0",
> + "lvds.1";
> status = "disabled";
>
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma1 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma1 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,mix {
> - mix0: mix-0 { };
> - mix1: mix-1 { };
> - };
> -
> - rcar_sound,ctu {
> - ctu00: ctu-0 { };
> - ctu01: ctu-1 { };
> - ctu02: ctu-2 { };
> - ctu03: ctu-3 { };
> - ctu10: ctu-4 { };
> - ctu11: ctu-5 { };
> - ctu12: ctu-6 { };
> - ctu13: ctu-7 { };
> - };
> -
> - rcar_sound,src {
> - src0: src-0 {
> - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x85>, <&audma1 0x9a>;
> - dma-names = "rx", "tx";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma1 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma1 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma1 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - src7: src-7 {
> - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x93>, <&audma1 0xb6>;
> - dma-names = "rx", "tx";
> - };
> - src8: src-8 {
> - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x95>, <&audma1 0xb8>;
> - dma-names = "rx", "tx";
> - };
> - src9: src-9 {
> - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x97>, <&audma1 0xba>;
> - dma-names = "rx", "tx";
> - };
> - };
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
>
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma1 0x02>,
> - <&audma0 0x15>, <&audma1 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma1 0x04>,
> - <&audma0 0x49>, <&audma1 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma1 0x06>,
> - <&audma0 0x63>, <&audma1 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma1 0x08>,
> - <&audma0 0x6f>, <&audma1 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma1 0x0a>,
> - <&audma0 0x71>, <&audma1 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> - <&audma0 0x73>, <&audma1 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> - <&audma0 0x75>, <&audma1 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma1 0x10>,
> - <&audma0 0x79>, <&audma1 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> + port@0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma1 0x12>,
> - <&audma0 0x7b>, <&audma1 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> + port@1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma1 0x14>,
> - <&audma0 0x7d>, <&audma1 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> + port@2 {
> + reg = <2>;
> + du_out_lvds1: endpoint {
> + };
> };
> };
> };
>
> - ipmmu_sy0: mmu@e6280000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu@e6290000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> + prr: chipid@ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> };
>
> - ipmmu_ds: mmu@e6740000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + cmt0: timer@ffca0000 {
> + compatible = "renesas,r8a7790-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
>
> - ipmmu_mp: mmu@ec680000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> status = "disabled";
> };
>
> - ipmmu_mx: mmu@fe951000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + cmt1: timer@e6130000 {
> + compatible = "renesas,r8a7790-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
>
> - ipmmu_rt: mmu@ffc80000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> status = "disabled";
> };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
@ 2018-01-18 0:29 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:04 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the addresss on the bus with instances of the same
> IP block grouped together.
Sorting of cmt0 and cmt1 diverge from this, but I agree it's better to
sort cmt0 before cmt1 :-)
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * Correct order of: qspi, msiof*, can*, and vin* nodes.
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 1592 ++++++++++++++++++++--------------------
> 1 file changed, 796 insertions(+), 796 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 1f4b3a4ed287..54c5a2d7ea89 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -166,32 +166,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu at e6151000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> - };
> -
> - apmu at e6152000 {
> - compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> - };
> -
> - gic: interrupt-controller at f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> gpio0: gpio at e6050000 {
> compatible = "renesas,gpio-r8a7790",
> "renesas,rcar-gen2-gpio";
> @@ -282,50 +256,42 @@
> resets = <&cpg 907>;
> };
>
> - thermal: thermal at e61f0000 {
> - compatible = "renesas,thermal-r8a7790",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> + pfc: pin-controller at e6060000 {
> + compatible = "renesas,pfc-r8a7790";
> + reg = <0 0xe6060000 0 0x250>;
> };
>
> - cmt0: timer at ffca0000 {
> - compatible = "renesas,r8a7790-cmt0",
> - "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> + cpg: clock-controller at e6150000 {
> + compatible = "renesas,r8a7790-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
>
> - status = "disabled";
> + apmu at e6151000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
> };
>
> - cmt1: timer at e6130000 {
> - compatible = "renesas,r8a7790-cmt1",
> - "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> + apmu at e6152000 {
> + compatible = "renesas,r8a7790-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
> + };
>
> - status = "disabled";
> + rst: reset-controller at e6160000 {
> + compatible = "renesas,r8a7790-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7790-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> };
>
> irqc0: interrupt-controller at e61c0000 {
> @@ -342,160 +308,91 @@
> resets = <&cpg 407>;
> };
>
> - dmac0: dma-controller at e6700000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> + thermal: thermal at e61f0000 {
> + compatible = "renesas,thermal-r8a7790",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> };
>
> - dmac1: dma-controller at e6720000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_sy0: mmu at e6280000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma0: dma-controller at ec700000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_sy1: mmu at e6290000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma1: dma-controller at ec720000 {
> - compatible = "renesas,dmac-r8a7790",
> - "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_ds: mmu at e6740000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - usb_dmac0: dma-controller at e65a0000 {
> - compatible = "renesas,r8a7790-usb-dmac",
> - "renesas,usb-dmac";
> - reg = <0 0xe65a0000 0 0x100>;
> - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 330>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 330>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> + ipmmu_mp: mmu at ec680000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - usb_dmac1: dma-controller at e65b0000 {
> - compatible = "renesas,r8a7790-usb-dmac",
> - "renesas,usb-dmac";
> - reg = <0 0xe65b0000 0 0x100>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "ch0", "ch1";
> - clocks = <&cpg CPG_MOD 331>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 331>;
> - #dma-cells = <1>;
> - dma-channels = <2>;
> + ipmmu_mx: mmu at fe951000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu at ffc80000 {
> + compatible = "renesas,ipmmu-r8a7790",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + icram0: sram at e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
> +
> + icram1: sram at e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram at 0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
>
> i2c0: i2c at e6508000 {
> @@ -622,107 +519,172 @@
> status = "disabled";
> };
>
> - mmcif0: mmc at ee200000 {
> - compatible = "renesas,mmcif-r8a7790",
> - "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> + hsusb: usb at e6590000 {
> + compatible = "renesas,usbhs-r8a7790",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> + dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> + <&usb_dmac1 0>, <&usb_dmac1 1>;
> + dma-names = "ch0", "ch1", "ch2", "ch3";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> + phy-names = "usb";
> status = "disabled";
> - max-frequency = <97500000>;
> };
>
> - mmcif1: mmc at ee220000 {
> - compatible = "renesas,mmcif-r8a7790",
> - "renesas,sh-mmcif";
> - reg = <0 0xee220000 0 0x80>;
> - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 305>;
> - dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> - <&dmac1 0xe1>, <&dmac1 0xe2>;
> - dma-names = "tx", "rx", "tx", "rx";
> + usbphy: usb-phy at e6590100 {
> + compatible = "renesas,usb-phy-r8a7790",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 305>;
> - reg-io-width = <4>;
> + resets = <&cpg 704>;
> status = "disabled";
> - max-frequency = <97500000>;
> +
> + usb0: usb-channel at 0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel at 2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> };
>
> - pfc: pin-controller at e6060000 {
> - compatible = "renesas,pfc-r8a7790";
> - reg = <0 0xe6060000 0 0x250>;
> + usb_dmac0: dma-controller at e65a0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65a0000 0 0x100>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 330>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 330>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> };
>
> - sdhi0: sd at ee100000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> + usb_dmac1: dma-controller at e65b0000 {
> + compatible = "renesas,r8a7790-usb-dmac",
> + "renesas,usb-dmac";
> + reg = <0 0xe65b0000 0 0x100>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ch0", "ch1";
> + clocks = <&cpg CPG_MOD 331>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> + resets = <&cpg 331>;
> + #dma-cells = <1>;
> + dma-channels = <2>;
> };
>
> - sdhi1: sd at ee120000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee120000 0 0x328>;
> - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 313>;
> - dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> - <&dmac1 0xc9>, <&dmac1 0xca>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> + dmac0: dma-controller at e6700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 313>;
> - status = "disabled";
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - sdhi2: sd at ee140000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + dmac1: dma-controller at e6720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - sdhi3: sd at ee160000 {
> - compatible = "renesas,sdhi-r8a7790",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + avb: ethernet at e6800000 {
> + compatible = "renesas,etheravb-r8a7790",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - scifa0: serial at e6c40000 {
> - compatible = "renesas,scifa-r8a7790",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> + qspi: spi at e6b10000 {
> + compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + scifa0: serial at e6c40000 {
> + compatible = "renesas,scifa-r8a7790",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 204>;
> clock-names = "fck";
> @@ -892,110 +854,94 @@
> status = "disabled";
> };
>
> - icram0: sram at e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram at e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram at 0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> - };
> -
> - ether: ethernet at ee700000 {
> - compatible = "renesas,ether-r8a7790",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> + msiof0: spi at e6e20000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e20000 0 0x0064>;
> + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0>;
> + dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> + <&dmac1 0x51>, <&dmac1 0x52>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> + resets = <&cpg 0>;
> #address-cells = <1>;
> #size-cells = <0>;
> status = "disabled";
> };
>
> - avb: ethernet at e6800000 {
> - compatible = "renesas,etheravb-r8a7790",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> + msiof1: spi at e6e10000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e10000 0 0x0064>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 208>;
> + dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> + <&dmac1 0x55>, <&dmac1 0x56>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> + resets = <&cpg 208>;
> #address-cells = <1>;
> #size-cells = <0>;
> status = "disabled";
> };
>
> - sata0: sata at ee300000 {
> - compatible = "renesas,sata-r8a7790",
> - "renesas,rcar-gen2-sata";
> - reg = <0 0xee300000 0 0x2000>;
> - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 815>;
> + msiof2: spi at e6e00000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6e00000 0 0x0064>;
> + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 205>;
> + dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> + <&dmac1 0x41>, <&dmac1 0x42>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 815>;
> + resets = <&cpg 205>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - sata1: sata at ee500000 {
> - compatible = "renesas,sata-r8a7790",
> - "renesas,rcar-gen2-sata";
> - reg = <0 0xee500000 0 0x2000>;
> - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 814>;
> + msiof3: spi at e6c90000 {
> + compatible = "renesas,msiof-r8a7790",
> + "renesas,rcar-gen2-msiof";
> + reg = <0 0xe6c90000 0 0x0064>;
> + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 215>;
> + dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> + <&dmac1 0x45>, <&dmac1 0x46>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 814>;
> + resets = <&cpg 215>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - hsusb: usb at e6590000 {
> - compatible = "renesas,usbhs-r8a7790",
> - "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> - <&usb_dmac1 0>, <&usb_dmac1 1>;
> - dma-names = "ch0", "ch1", "ch2", "ch3";
> + can0: can at e6e80000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> + resets = <&cpg 916>;
> status = "disabled";
> };
>
> - usbphy: usb-phy at e6590100 {
> - compatible = "renesas,usb-phy-r8a7790",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> + can1: can at e6e88000 {
> + compatible = "renesas,can-r8a7790",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>,
> + <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> + resets = <&cpg 915>;
> status = "disabled";
> -
> - usb0: usb-channel at 0 {
> - reg = <0>;
> - #phy-cells = <1>;
> - };
> - usb2: usb-channel at 2 {
> - reg = <2>;
> - #phy-cells = <1>;
> - };
> };
>
> vin0: video at e6ef0000 {
> @@ -1042,220 +988,267 @@
> status = "disabled";
> };
>
> - vsp at fe920000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe920000 0 0x8000>;
> - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 130>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 130>;
> - };
> + rcar_sound: sound at ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7790",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> - vsp at fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> + <&cpg CPG_CORE R8A7790_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "ctu.0", "ctu.1",
> + "mix.0", "mix.1",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> - };
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
>
> - vsp at fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> + status = "disabled";
>
> - vsp at fe938000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe938000 0 0x8000>;
> - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 127>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 127>;
> - };
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma1 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma1 0xbe>;
> + dma-names = "tx";
> + };
> + };
>
> - du: display at feb00000 {
> - compatible = "renesas,du-r8a7790";
> - reg = <0 0xfeb00000 0 0x70000>,
> - <0 0xfeb90000 0 0x1c>,
> - <0 0xfeb94000 0 0x1c>;
> - reg-names = "du", "lvds.0", "lvds.1";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> - <&cpg CPG_MOD 725>;
> - clock-names = "du.0", "du.1", "du.2", "lvds.0",
> - "lvds.1";
> - status = "disabled";
> + rcar_sound,mix {
> + mix0: mix-0 { };
> + mix1: mix-1 { };
> + };
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> + rcar_sound,ctu {
> + ctu00: ctu-0 { };
> + ctu01: ctu-1 { };
> + ctu02: ctu-2 { };
> + ctu03: ctu-3 { };
> + ctu10: ctu-4 { };
> + ctu11: ctu-5 { };
> + ctu12: ctu-6 { };
> + ctu13: ctu-7 { };
> + };
>
> - port at 0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> - };
> + rcar_sound,src {
> + src0: src-0 {
> + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x85>, <&audma1 0x9a>;
> + dma-names = "rx", "tx";
> };
> - port at 1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> - };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma1 0x9c>;
> + dma-names = "rx", "tx";
> };
> - port at 2 {
> - reg = <2>;
> - du_out_lvds1: endpoint {
> - };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma1 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma1 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + src7: src-7 {
> + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x93>, <&audma1 0xb6>;
> + dma-names = "rx", "tx";
> + };
> + src8: src-8 {
> + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x95>, <&audma1 0xb8>;
> + dma-names = "rx", "tx";
> + };
> + src9: src-9 {
> + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x97>, <&audma1 0xba>;
> + dma-names = "rx", "tx";
> };
> };
> - };
> -
> - can0: can at e6e80000 {
> - compatible = "renesas,can-r8a7790",
> - "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>,
> - <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> - };
> -
> - can1: can at e6e88000 {
> - compatible = "renesas,can-r8a7790",
> - "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>,
> - <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> - };
> -
> - jpu: jpeg-codec at fe980000 {
> - compatible = "renesas,jpu-r8a7790",
> - "renesas,rcar-gen2-jpu";
> - reg = <0 0xfe980000 0 0x10300>;
> - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 106>;
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 106>;
> - };
> -
> - cpg: clock-controller at e6150000 {
> - compatible = "renesas,r8a7790-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - prr: chipid at ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - rst: reset-controller at e6160000 {
> - compatible = "renesas,r8a7790-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - sysc: system-controller at e6180000 {
> - compatible = "renesas,r8a7790-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - qspi: spi at e6b10000 {
> - compatible = "renesas,qspi-r8a7790", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
>
> - msiof0: spi at e6e20000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e20000 0 0x0064>;
> - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 0>;
> - dmas = <&dmac0 0x51>, <&dmac0 0x52>,
> - <&dmac1 0x51>, <&dmac1 0x52>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - msiof1: spi at e6e10000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e10000 0 0x0064>;
> - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 208>;
> - dmas = <&dmac0 0x55>, <&dmac0 0x56>,
> - <&dmac1 0x55>, <&dmac1 0x56>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 208>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma1 0x02>,
> + <&audma0 0x15>, <&audma1 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma1 0x04>,
> + <&audma0 0x49>, <&audma1 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma1 0x06>,
> + <&audma0 0x63>, <&audma1 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma1 0x08>,
> + <&audma0 0x6f>, <&audma1 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma1 0x0a>,
> + <&audma0 0x71>, <&audma1 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> + <&audma0 0x73>, <&audma1 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> + <&audma0 0x75>, <&audma1 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma1 0x10>,
> + <&audma0 0x79>, <&audma1 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma1 0x12>,
> + <&audma0 0x7b>, <&audma1 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma1 0x14>,
> + <&audma0 0x7d>, <&audma1 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + };
> };
>
> - msiof2: spi at e6e00000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6e00000 0 0x0064>;
> - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 205>;
> - dmas = <&dmac0 0x41>, <&dmac0 0x42>,
> - <&dmac1 0x41>, <&dmac1 0x42>;
> - dma-names = "tx", "rx", "tx", "rx";
> + audma0: dma-controller at ec700000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 205>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> };
> -
> - msiof3: spi at e6c90000 {
> - compatible = "renesas,msiof-r8a7790",
> - "renesas,rcar-gen2-msiof";
> - reg = <0 0xe6c90000 0 0x0064>;
> - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 215>;
> - dmas = <&dmac0 0x45>, <&dmac0 0x46>,
> - <&dmac1 0x45>, <&dmac1 0x46>;
> - dma-names = "tx", "rx", "tx", "rx";
> +
> + audma1: dma-controller at ec720000 {
> + compatible = "renesas,dmac-r8a7790",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 215>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> };
>
> xhci: usb at ee000000 {
> @@ -1364,6 +1357,148 @@
> };
> };
>
> + sdhi0: sd at ee100000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + sdhi1: sd at ee120000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee120000 0 0x328>;
> + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 313>;
> + dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
> + <&dmac1 0xc9>, <&dmac1 0xca>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 313>;
> + status = "disabled";
> + };
> +
> + sdhi2: sd at ee140000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
> +
> + sdhi3: sd at ee160000 {
> + compatible = "renesas,sdhi-r8a7790",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
> +
> + mmcif0: mmc at ee200000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
> +
> + mmcif1: mmc at ee220000 {
> + compatible = "renesas,mmcif-r8a7790",
> + "renesas,sh-mmcif";
> + reg = <0 0xee220000 0 0x80>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 305>;
> + dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
> + <&dmac1 0xe1>, <&dmac1 0xe2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 305>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
> +
> + sata0: sata at ee300000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee300000 0 0x2000>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 815>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 815>;
> + status = "disabled";
> + };
> +
> + sata1: sata at ee500000 {
> + compatible = "renesas,sata-r8a7790",
> + "renesas,rcar-gen2-sata";
> + reg = <0 0xee500000 0 0x2000>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 814>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 814>;
> + status = "disabled";
> + };
> +
> + ether: ethernet at ee700000 {
> + compatible = "renesas,ether-r8a7790",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller at f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> pciec: pcie at fe000000 {
> compatible = "renesas,pcie-r8a7790",
> "renesas,pcie-rcar-gen2";
> @@ -1392,261 +1527,126 @@
> status = "disabled";
> };
>
> - rcar_sound: sound at ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7790",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> + vsp at fe920000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe920000 0 0x8000>;
> + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 130>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 130>;
> + };
>
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> - <&cpg CPG_CORE R8A7790_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> - "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> - "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6",
> - "src.5", "src.4", "src.3", "src.2",
> - "src.1", "src.0",
> - "ctu.0", "ctu.1",
> - "mix.0", "mix.1",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> + vsp at fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
> +
> + vsp at fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
> +
> + vsp at fe938000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe938000 0 0x8000>;
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 127>;
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 127>;
> + };
> +
> + jpu: jpeg-codec at fe980000 {
> + compatible = "renesas,jpu-r8a7790",
> + "renesas,rcar-gen2-jpu";
> + reg = <0 0xfe980000 0 0x10300>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 106>;
> power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>,
> - <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>,
> - <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> - "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> - "ssi.1", "ssi.0";
> + resets = <&cpg 106>;
> + };
>
> + du: display at feb00000 {
> + compatible = "renesas,du-r8a7790";
> + reg = <0 0xfeb00000 0 0x70000>,
> + <0 0xfeb90000 0 0x1c>,
> + <0 0xfeb94000 0 0x1c>;
> + reg-names = "du", "lvds.0", "lvds.1";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
> + <&cpg CPG_MOD 725>;
> + clock-names = "du.0", "du.1", "du.2", "lvds.0",
> + "lvds.1";
> status = "disabled";
>
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma1 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma1 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,mix {
> - mix0: mix-0 { };
> - mix1: mix-1 { };
> - };
> -
> - rcar_sound,ctu {
> - ctu00: ctu-0 { };
> - ctu01: ctu-1 { };
> - ctu02: ctu-2 { };
> - ctu03: ctu-3 { };
> - ctu10: ctu-4 { };
> - ctu11: ctu-5 { };
> - ctu12: ctu-6 { };
> - ctu13: ctu-7 { };
> - };
> -
> - rcar_sound,src {
> - src0: src-0 {
> - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x85>, <&audma1 0x9a>;
> - dma-names = "rx", "tx";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma1 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma1 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma1 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - src7: src-7 {
> - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x93>, <&audma1 0xb6>;
> - dma-names = "rx", "tx";
> - };
> - src8: src-8 {
> - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x95>, <&audma1 0xb8>;
> - dma-names = "rx", "tx";
> - };
> - src9: src-9 {
> - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x97>, <&audma1 0xba>;
> - dma-names = "rx", "tx";
> - };
> - };
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
>
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma1 0x02>,
> - <&audma0 0x15>, <&audma1 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma1 0x04>,
> - <&audma0 0x49>, <&audma1 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma1 0x06>,
> - <&audma0 0x63>, <&audma1 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma1 0x08>,
> - <&audma0 0x6f>, <&audma1 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma1 0x0a>,
> - <&audma0 0x71>, <&audma1 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> - <&audma0 0x73>, <&audma1 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> - <&audma0 0x75>, <&audma1 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma1 0x10>,
> - <&audma0 0x79>, <&audma1 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> + port at 0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma1 0x12>,
> - <&audma0 0x7b>, <&audma1 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> + port at 1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma1 0x14>,
> - <&audma0 0x7d>, <&audma1 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> + port at 2 {
> + reg = <2>;
> + du_out_lvds1: endpoint {
> + };
> };
> };
> };
>
> - ipmmu_sy0: mmu at e6280000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu at e6290000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> + prr: chipid at ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> };
>
> - ipmmu_ds: mmu at e6740000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + cmt0: timer at ffca0000 {
> + compatible = "renesas,r8a7790-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
>
> - ipmmu_mp: mmu at ec680000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> status = "disabled";
> };
>
> - ipmmu_mx: mmu at fe951000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + cmt1: timer at e6130000 {
> + compatible = "renesas,r8a7790-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
>
> - ipmmu_rt: mmu at ffc80000 {
> - compatible = "renesas,ipmmu-r8a7790",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> status = "disabled";
> };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 04/16] ARM: dts: r8a7790: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 0:30 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:30 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:05 +0100, Simon Horman wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 104 ++++++++++++++++++++---------------------
> 1 file changed, 52 insertions(+), 52 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 54c5a2d7ea89..3bbcc0b93f1c 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -40,6 +40,35 @@
> vin3 = &vin3;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clk_a: audio_clk_a {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_b: audio_clk_b {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_c: audio_clk_c {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -158,6 +187,29 @@
> };
> };
>
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> + /* External PCIe clock - can be overridden by the board */
> + pcie_bus_clk: pcie_bus {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> interrupt-parent = <&gic>;
> @@ -1678,62 +1730,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /* External PCIe clock - can be overridden by the board */
> - pcie_bus_clk: pcie_bus {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed frequency
> - * clocks by default.
> - * Boards that provide audio clocks should override them.
> - */
> - audio_clk_a: audio_clk_a {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_b: audio_clk_b {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_c: audio_clk_c {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 04/16] ARM: dts: r8a7790: sort subnodes of root node
@ 2018-01-18 0:30 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:30 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:05 +0100, Simon Horman wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 104 ++++++++++++++++++++---------------------
> 1 file changed, 52 insertions(+), 52 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 54c5a2d7ea89..3bbcc0b93f1c 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -40,6 +40,35 @@
> vin3 = &vin3;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clk_a: audio_clk_a {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_b: audio_clk_b {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_c: audio_clk_c {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -158,6 +187,29 @@
> };
> };
>
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> + /* External PCIe clock - can be overridden by the board */
> + pcie_bus_clk: pcie_bus {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> interrupt-parent = <&gic>;
> @@ -1678,62 +1730,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /* External PCIe clock - can be overridden by the board */
> - pcie_bus_clk: pcie_bus {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed frequency
> - * clocks by default.
> - * Boards that provide audio clocks should override them.
> - */
> - audio_clk_a: audio_clk_a {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_b: audio_clk_b {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_c: audio_clk_c {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 05/16] ARM: dts: r8a7791: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 0:31 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:31 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:06 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7791.dtsi | 75 +++++++++++++++++++++---------------------
> 1 file changed, 38 insertions(+), 37 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 8266a9b7cafd..38a9b8cb736d 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -237,9 +237,9 @@
> };
>
> thermal: thermal@e61f0000 {
> - compatible = "renesas,thermal-r8a7791",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> + compatible = "renesas,thermal-r8a7791",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 522>;
> @@ -375,20 +375,20 @@
> audma0: dma-controller@ec700000 {
> compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
> reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -405,20 +405,20 @@
> audma1: dma-controller@ec720000 {
> compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
> reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -1487,12 +1487,13 @@
> * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> */
> - compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + compatible = "renesas,rcar_sound-r8a7791",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 05/16] ARM: dts: r8a7791: consistently use single space after =
@ 2018-01-18 0:31 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 0:31 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:06 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7791.dtsi | 75 +++++++++++++++++++++---------------------
> 1 file changed, 38 insertions(+), 37 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 8266a9b7cafd..38a9b8cb736d 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -237,9 +237,9 @@
> };
>
> thermal: thermal at e61f0000 {
> - compatible = "renesas,thermal-r8a7791",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> + compatible = "renesas,thermal-r8a7791",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 522>;
> @@ -375,20 +375,20 @@
> audma0: dma-controller at ec700000 {
> compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
> reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -405,20 +405,20 @@
> audma1: dma-controller at ec720000 {
> compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
> reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3",
> "ch4", "ch5", "ch6", "ch7",
> @@ -1487,12 +1487,13 @@
> * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> */
> - compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + compatible = "renesas,rcar_sound-r8a7791",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 07/16] ARM: dts: r8a7791: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 1:06 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:06 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:08 +0100, Simon Horman wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7791.dtsi | 134 ++++++++++++++++++++---------------------
> 1 file changed, 67 insertions(+), 67 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index de2af2199731..dc659351472f 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -39,6 +39,35 @@
> vin2 = &vin2;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clk_a: audio_clk_a {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_b: audio_clk_b {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_c: audio_clk_c {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -82,23 +111,27 @@
> };
> };
>
> - thermal-zones {
> - cpu_thermal: cpu-thermal {
> - polling-delay-passive = <0>;
> - polling-delay = <0>;
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
>
> - thermal-sensors = <&thermal>;
> + /* External PCIe clock - can be overridden by the board */
> + pcie_bus_clk: pcie_bus {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
>
> - trips {
> - cpu-crit {
> - temperature = <95000>;
> - hysteresis = <0>;
> - type = "critical";
> - };
> - };
> - cooling-maps {
> - };
> - };
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> };
>
> soc {
> @@ -1668,6 +1701,25 @@
> };
> };
>
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&thermal>;
> +
> + trips {
> + cpu-crit {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + };
> + };
> + };
> +
> timer {
> compatible = "arm,armv7-timer";
> interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> @@ -1676,62 +1728,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed frequency
> - * clocks by default.
> - * Boards that provide audio clocks should override them.
> - */
> - audio_clk_a: audio_clk_a {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_b: audio_clk_b {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_c: audio_clk_c {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /* External PCIe clock - can be overridden by the board */
> - pcie_bus_clk: pcie_bus {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 07/16] ARM: dts: r8a7791: sort subnodes of root node
@ 2018-01-18 1:06 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:06 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:08 +0100, Simon Horman wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7791.dtsi | 134 ++++++++++++++++++++---------------------
> 1 file changed, 67 insertions(+), 67 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index de2af2199731..dc659351472f 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -39,6 +39,35 @@
> vin2 = &vin2;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clk_a: audio_clk_a {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_b: audio_clk_b {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_c: audio_clk_c {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -82,23 +111,27 @@
> };
> };
>
> - thermal-zones {
> - cpu_thermal: cpu-thermal {
> - polling-delay-passive = <0>;
> - polling-delay = <0>;
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
>
> - thermal-sensors = <&thermal>;
> + /* External PCIe clock - can be overridden by the board */
> + pcie_bus_clk: pcie_bus {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
>
> - trips {
> - cpu-crit {
> - temperature = <95000>;
> - hysteresis = <0>;
> - type = "critical";
> - };
> - };
> - cooling-maps {
> - };
> - };
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> };
>
> soc {
> @@ -1668,6 +1701,25 @@
> };
> };
>
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&thermal>;
> +
> + trips {
> + cpu-crit {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + };
> + };
> + };
> +
> timer {
> compatible = "arm,armv7-timer";
> interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> @@ -1676,62 +1728,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed frequency
> - * clocks by default.
> - * Boards that provide audio clocks should override them.
> - */
> - audio_clk_a: audio_clk_a {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_b: audio_clk_b {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_c: audio_clk_c {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /* External PCIe clock - can be overridden by the board */
> - pcie_bus_clk: pcie_bus {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 08/16] ARM: dts: r8a7792: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 1:15 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:15 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:09 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7792.dtsi | 498 ++++++++++++++++++++---------------------
> 1 file changed, 249 insertions(+), 249 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 3be15a158bad..268987ff0201 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -101,63 +101,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu@e6152000 {
> - compatible = "renesas,r8a7792-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> -
> - gic: interrupt-controller@f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> - IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> - irqc: interrupt-controller@e61c0000 {
> - compatible = "renesas,irqc-r8a7792", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> -
> - rst: reset-controller@e6160000 {
> - compatible = "renesas,r8a7792-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid@ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller@e6180000 {
> - compatible = "renesas,r8a7792-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - pfc: pin-controller@e6060000 {
> - compatible = "renesas,pfc-r8a7792";
> - reg = <0 0xe6060000 0 0x144>;
> - };
> -
> gpio0: gpio@e6050000 {
> compatible = "renesas,gpio-r8a7792",
> "renesas,rcar-gen2-gpio";
> @@ -338,6 +281,155 @@
> resets = <&cpg 913>;
> };
>
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7792";
> + reg = <0 0xe6060000 0 0x144>;
> + };
> +
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7792-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>;
> + clock-names = "extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
> +
> + apmu@e6152000 {
> + compatible = "renesas,r8a7792-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
> +
> + rst: reset-controller@e6160000 {
> + compatible = "renesas,r8a7792-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a7792-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + irqc: interrupt-controller@e61c0000 {
> + compatible = "renesas,irqc-r8a7792", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
> +
> + icram0: sram@e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
> +
> + icram1: sram@e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram@0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> + };
> +
> + /* I2C doesn't need pinmux */
> + i2c0: i2c@e6508000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c@e6518000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c2: i2c@e6530000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c3: i2c@e6540000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c4: i2c@e6520000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 927>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c5: i2c@e6528000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 925>;
> + i2c-scl-internal-delay-ns = <110>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> dmac0: dma-controller@e6700000 {
> compatible = "renesas,dmac-r8a7792",
> "renesas,rcar-dmac";
> @@ -404,6 +496,35 @@
> dma-channels = <15>;
> };
>
> + avb: ethernet@e6800000 {
> + compatible = "renesas,etheravb-r8a7792",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + qspi: spi@e6b10000 {
> + compatible = "renesas,qspi-r8a7792", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> scif0: serial@e6e60000 {
> compatible = "renesas,scif-r8a7792",
> "renesas,rcar-gen2-scif", "renesas,scif";
> @@ -500,162 +621,6 @@
> status = "disabled";
> };
>
> - icram0: sram@e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram@e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram@0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> - };
> -
> - sdhi0: sd@ee100000 {
> - compatible = "renesas,sdhi-r8a7792",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - clocks = <&cpg CPG_MOD 314>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> -
> - jpu: jpeg-codec@fe980000 {
> - compatible = "renesas,jpu-r8a7792",
> - "renesas,rcar-gen2-jpu";
> - reg = <0 0xfe980000 0 0x10300>;
> - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 106>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 106>;
> - };
> -
> - avb: ethernet@e6800000 {
> - compatible = "renesas,etheravb-r8a7792",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - /* I2C doesn't need pinmux */
> - i2c0: i2c@e6508000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c1: i2c@e6518000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c2: i2c@e6530000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c3: i2c@e6540000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c4: i2c@e6520000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c5: i2c@e6528000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - i2c-scl-internal-delay-ns = <110>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - qspi: spi@e6b10000 {
> - compatible = "renesas,qspi-r8a7792", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> msiof0: spi@e6e20000 {
> compatible = "renesas,msiof-r8a7792",
> "renesas,rcar-gen2-msiof";
> @@ -688,34 +653,6 @@
> status = "disabled";
> };
>
> - du: display@feb00000 {
> - compatible = "renesas,du-r8a7792";
> - reg = <0 0xfeb00000 0 0x40000>;
> - reg-names = "du";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> - clock-names = "du.0", "du.1";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - du_out_rgb0: endpoint {
> - };
> - };
> - port@1 {
> - reg = <1>;
> - du_out_rgb1: endpoint {
> - };
> - };
> - };
> - };
> -
> can0: can@e6e80000 {
> compatible = "renesas,can-r8a7792",
> "renesas,rcar-gen2-can";
> @@ -808,6 +745,36 @@
> status = "disabled";
> };
>
> + sdhi0: sd@ee100000 {
> + compatible = "renesas,sdhi-r8a7792",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + clocks = <&cpg CPG_MOD 314>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller@f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> + IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> vsp@fe928000 {
> compatible = "renesas,vsp1";
> reg = <0 0xfe928000 0 0x8000>;
> @@ -835,14 +802,47 @@
> resets = <&cpg 127>;
> };
>
> - cpg: clock-controller@e6150000 {
> - compatible = "renesas,r8a7792-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>;
> - clock-names = "extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> + jpu: jpeg-codec@fe980000 {
> + compatible = "renesas,jpu-r8a7792",
> + "renesas,rcar-gen2-jpu";
> + reg = <0 0xfe980000 0 0x10300>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 106>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 106>;
> + };
> +
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7792";
> + reg = <0 0xfeb00000 0 0x40000>;
> + reg-names = "du";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>;
> + clock-names = "du.0", "du.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb0: endpoint {
> + };
> + };
> + port@1 {
> + reg = <1>;
> + du_out_rgb1: endpoint {
> + };
> + };
> + };
> + };
> +
> + prr: chipid@ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> };
> };
>
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 08/16] ARM: dts: r8a7792: sort subnodes of soc node
@ 2018-01-18 1:15 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:09 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7792.dtsi | 498 ++++++++++++++++++++---------------------
> 1 file changed, 249 insertions(+), 249 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 3be15a158bad..268987ff0201 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -101,63 +101,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu at e6152000 {
> - compatible = "renesas,r8a7792-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> -
> - gic: interrupt-controller at f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> - IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> - irqc: interrupt-controller at e61c0000 {
> - compatible = "renesas,irqc-r8a7792", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> -
> - rst: reset-controller at e6160000 {
> - compatible = "renesas,r8a7792-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid at ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller at e6180000 {
> - compatible = "renesas,r8a7792-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - pfc: pin-controller at e6060000 {
> - compatible = "renesas,pfc-r8a7792";
> - reg = <0 0xe6060000 0 0x144>;
> - };
> -
> gpio0: gpio at e6050000 {
> compatible = "renesas,gpio-r8a7792",
> "renesas,rcar-gen2-gpio";
> @@ -338,6 +281,155 @@
> resets = <&cpg 913>;
> };
>
> + pfc: pin-controller at e6060000 {
> + compatible = "renesas,pfc-r8a7792";
> + reg = <0 0xe6060000 0 0x144>;
> + };
> +
> + cpg: clock-controller at e6150000 {
> + compatible = "renesas,r8a7792-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>;
> + clock-names = "extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
> +
> + apmu at e6152000 {
> + compatible = "renesas,r8a7792-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
> +
> + rst: reset-controller at e6160000 {
> + compatible = "renesas,r8a7792-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7792-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + irqc: interrupt-controller at e61c0000 {
> + compatible = "renesas,irqc-r8a7792", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
> +
> + icram0: sram at e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
> +
> + icram1: sram at e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram at 0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> + };
> +
> + /* I2C doesn't need pinmux */
> + i2c0: i2c at e6508000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c at e6518000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c2: i2c at e6530000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c3: i2c at e6540000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c4: i2c at e6520000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 927>;
> + i2c-scl-internal-delay-ns = <6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c5: i2c at e6528000 {
> + compatible = "renesas,i2c-r8a7792",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 925>;
> + i2c-scl-internal-delay-ns = <110>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> dmac0: dma-controller at e6700000 {
> compatible = "renesas,dmac-r8a7792",
> "renesas,rcar-dmac";
> @@ -404,6 +496,35 @@
> dma-channels = <15>;
> };
>
> + avb: ethernet at e6800000 {
> + compatible = "renesas,etheravb-r8a7792",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + qspi: spi at e6b10000 {
> + compatible = "renesas,qspi-r8a7792", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> scif0: serial at e6e60000 {
> compatible = "renesas,scif-r8a7792",
> "renesas,rcar-gen2-scif", "renesas,scif";
> @@ -500,162 +621,6 @@
> status = "disabled";
> };
>
> - icram0: sram at e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram at e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram at 0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> - };
> -
> - sdhi0: sd at ee100000 {
> - compatible = "renesas,sdhi-r8a7792",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - clocks = <&cpg CPG_MOD 314>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> -
> - jpu: jpeg-codec at fe980000 {
> - compatible = "renesas,jpu-r8a7792",
> - "renesas,rcar-gen2-jpu";
> - reg = <0 0xfe980000 0 0x10300>;
> - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 106>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 106>;
> - };
> -
> - avb: ethernet at e6800000 {
> - compatible = "renesas,etheravb-r8a7792",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - /* I2C doesn't need pinmux */
> - i2c0: i2c at e6508000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c1: i2c at e6518000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c2: i2c at e6530000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c3: i2c at e6540000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c4: i2c at e6520000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - i2c-scl-internal-delay-ns = <6>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - i2c5: i2c at e6528000 {
> - compatible = "renesas,i2c-r8a7792",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - i2c-scl-internal-delay-ns = <110>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - qspi: spi at e6b10000 {
> - compatible = "renesas,qspi-r8a7792", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> msiof0: spi at e6e20000 {
> compatible = "renesas,msiof-r8a7792",
> "renesas,rcar-gen2-msiof";
> @@ -688,34 +653,6 @@
> status = "disabled";
> };
>
> - du: display at feb00000 {
> - compatible = "renesas,du-r8a7792";
> - reg = <0 0xfeb00000 0 0x40000>;
> - reg-names = "du";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> - clock-names = "du.0", "du.1";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port at 0 {
> - reg = <0>;
> - du_out_rgb0: endpoint {
> - };
> - };
> - port at 1 {
> - reg = <1>;
> - du_out_rgb1: endpoint {
> - };
> - };
> - };
> - };
> -
> can0: can at e6e80000 {
> compatible = "renesas,can-r8a7792",
> "renesas,rcar-gen2-can";
> @@ -808,6 +745,36 @@
> status = "disabled";
> };
>
> + sdhi0: sd at ee100000 {
> + compatible = "renesas,sdhi-r8a7792",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + clocks = <&cpg CPG_MOD 314>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller at f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> + IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> vsp at fe928000 {
> compatible = "renesas,vsp1";
> reg = <0 0xfe928000 0 0x8000>;
> @@ -835,14 +802,47 @@
> resets = <&cpg 127>;
> };
>
> - cpg: clock-controller at e6150000 {
> - compatible = "renesas,r8a7792-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>;
> - clock-names = "extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> + jpu: jpeg-codec at fe980000 {
> + compatible = "renesas,jpu-r8a7792",
> + "renesas,rcar-gen2-jpu";
> + reg = <0 0xfe980000 0 0x10300>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 106>;
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 106>;
> + };
> +
> + du: display at feb00000 {
> + compatible = "renesas,du-r8a7792";
> + reg = <0 0xfeb00000 0 0x40000>;
> + reg-names = "du";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>;
> + clock-names = "du.0", "du.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + du_out_rgb0: endpoint {
> + };
> + };
> + port at 1 {
> + reg = <1>;
> + du_out_rgb1: endpoint {
> + };
> + };
> + };
> + };
> +
> + prr: chipid at ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> };
> };
>
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 09/16] ARM: dts: r8a7793: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 1:16 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:16 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
thanks for your work.
On 2018-01-17 17:17:10 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead. It also avoids
> running over 80 columns in width in one of the lines where whitespace is
> updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 19 ++++++++++---------
> 1 file changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index e95f4fb44dc4..ea4bc06c8e8a 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -228,9 +228,9 @@
> };
>
> thermal: thermal@e61f0000 {
> - compatible = "renesas,thermal-r8a7793",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> + compatible = "renesas,thermal-r8a7793",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 522>;
> @@ -1174,12 +1174,13 @@
> * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> */
> - compatible = "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + compatible = "renesas,rcar_sound-r8a7793",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 09/16] ARM: dts: r8a7793: consistently use single space after =
@ 2018-01-18 1:16 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
thanks for your work.
On 2018-01-17 17:17:10 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead. It also avoids
> running over 80 columns in width in one of the lines where whitespace is
> updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 19 ++++++++++---------
> 1 file changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index e95f4fb44dc4..ea4bc06c8e8a 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -228,9 +228,9 @@
> };
>
> thermal: thermal at e61f0000 {
> - compatible = "renesas,thermal-r8a7793",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> + compatible = "renesas,thermal-r8a7793",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 522>;
> @@ -1174,12 +1174,13 @@
> * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> */
> - compatible = "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + compatible = "renesas,rcar_sound-r8a7793",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 10/16] ARM: dts: r8a7793: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 1:29 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:29 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:11 +0100, Simon Horman wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Same comment as 02/16.
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 2325 +++++++++++++++++++++-------------------
> 1 file changed, 1193 insertions(+), 1132 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index ea4bc06c8e8a..d18a65c647bb 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -15,7 +15,6 @@
>
> / {
> compatible = "renesas,r8a7793";
> - interrupt-parent = <&gic>;
> #address-cells = <2>;
> #size-cells = <2>;
>
> @@ -74,958 +73,1273 @@
> };
> };
>
> - apmu@e6152000 {
> - compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> + soc {
> + compatible = "simple-bus";
> + interrupt-parent = <&gic>;
>
> - thermal-zones {
> - cpu_thermal: cpu-thermal {
> - polling-delay-passive = <0>;
> - polling-delay = <0>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> - thermal-sensors = <&thermal>;
> + apmu@e6152000 {
> + compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
>
> - trips {
> - cpu-crit {
> - temperature = <95000>;
> - hysteresis = <0>;
> - type = "critical";
> - };
> - };
> - cooling-maps {
> - };
> + gic: interrupt-controller@f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> };
> - };
>
> - gic: interrupt-controller@f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> + gpio0: gpio@e6050000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6050000 0 0x50>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 0 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 912>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 912>;
> + };
>
> - gpio0: gpio@e6050000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6050000 0 0x50>;
> - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 0 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 912>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 912>;
> - };
> + gpio1: gpio@e6051000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6051000 0 0x50>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 32 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 911>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 911>;
> + };
>
> - gpio1: gpio@e6051000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6051000 0 0x50>;
> - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 32 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 911>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 911>;
> - };
> + gpio2: gpio@e6052000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6052000 0 0x50>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 64 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 910>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 910>;
> + };
>
> - gpio2: gpio@e6052000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6052000 0 0x50>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 64 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 910>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 910>;
> - };
> + gpio3: gpio@e6053000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6053000 0 0x50>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 96 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 909>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 909>;
> + };
>
> - gpio3: gpio@e6053000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6053000 0 0x50>;
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 96 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 909>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 909>;
> - };
> + gpio4: gpio@e6054000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6054000 0 0x50>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 128 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 908>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 908>;
> + };
>
> - gpio4: gpio@e6054000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6054000 0 0x50>;
> - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 128 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 908>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 908>;
> - };
> + gpio5: gpio@e6055000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055000 0 0x50>;
> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 160 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 907>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 907>;
> + };
>
> - gpio5: gpio@e6055000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055000 0 0x50>;
> - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 160 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 907>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 907>;
> - };
> + gpio6: gpio@e6055400 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055400 0 0x50>;
> + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 192 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 905>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 905>;
> + };
>
> - gpio6: gpio@e6055400 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055400 0 0x50>;
> - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 192 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 905>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 905>;
> - };
> + gpio7: gpio@e6055800 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055800 0 0x50>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 224 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 904>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 904>;
> + };
>
> - gpio7: gpio@e6055800 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055800 0 0x50>;
> - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 224 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 904>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 904>;
> - };
> + thermal: thermal@e61f0000 {
> + compatible = "renesas,thermal-r8a7793",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> + };
>
> - thermal: thermal@e61f0000 {
> - compatible = "renesas,thermal-r8a7793",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> - };
> + cmt0: timer@ffca0000 {
> + compatible = "renesas,r8a7793-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
>
> - timer {
> - compatible = "arm,armv7-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> - };
> + cmt1: timer@e6130000 {
> + compatible = "renesas,r8a7793-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
>
> - cmt0: timer@ffca0000 {
> - compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> -
> - status = "disabled";
> - };
> + irqc0: interrupt-controller@e61c0000 {
> + compatible = "renesas,irqc-r8a7793", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
>
> - cmt1: timer@e6130000 {
> - compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> -
> - status = "disabled";
> - };
> + dmac0: dma-controller@e6700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - irqc0: interrupt-controller@e61c0000 {
> - compatible = "renesas,irqc-r8a7793", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> + dmac1: dma-controller@e6720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - dmac0: dma-controller@e6700000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma0: dma-controller@ec700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - dmac1: dma-controller@e6720000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma1: dma-controller@ec720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - audma0: dma-controller@ec700000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + /* The memory map in the User's Manual maps the cores to
> + * bus numbers
> + */
> + i2c0: i2c@e6508000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - audma1: dma-controller@ec720000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + i2c1: i2c@e6518000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - /* The memory map in the User's Manual maps the cores to bus numbers */
> - i2c0: i2c@e6508000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c2: i2c@e6530000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c1: i2c@e6518000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c3: i2c@e6540000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c2: i2c@e6530000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c4: i2c@e6520000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 927>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c3: i2c@e6540000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c5: i2c@e6528000 {
> + /* doesn't need pinmux */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 925>;
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
>
> - i2c4: i2c@e6520000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c6: i2c@e60b0000 {
> + /* doesn't need pinmux */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7793",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe60b0000 0 0x425>;
> + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 926>;
> + dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> + <&dmac1 0x77>, <&dmac1 0x78>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 926>;
> + status = "disabled";
> + };
>
> - i2c5: i2c@e6528000 {
> - /* doesn't need pinmux */
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - i2c-scl-internal-delay-ns = <110>;
> - status = "disabled";
> - };
> + i2c7: i2c@e6500000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7793",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 318>;
> + status = "disabled";
> + };
>
> - i2c6: i2c@e60b0000 {
> - /* doesn't need pinmux */
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe60b0000 0 0x425>;
> - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 926>;
> - dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> - <&dmac1 0x77>, <&dmac1 0x78>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 926>;
> - status = "disabled";
> - };
> + i2c8: i2c@e6510000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7793",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 323>;
> + status = "disabled";
> + };
>
> - i2c7: i2c@e6500000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - status = "disabled";
> - };
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7793";
> + reg = <0 0xe6060000 0 0x250>;
> + };
>
> - i2c8: i2c@e6510000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - status = "disabled";
> - };
> + sdhi0: sd@ee100000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
>
> - pfc: pin-controller@e6060000 {
> - compatible = "renesas,pfc-r8a7793";
> - reg = <0 0xe6060000 0 0x250>;
> - };
> + sdhi1: sd@ee140000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
>
> - sdhi0: sd@ee100000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> + sdhi2: sd@ee160000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
>
> - sdhi1: sd@ee140000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> - };
> + mmcif0: mmc@ee200000 {
> + compatible = "renesas,mmcif-r8a7793",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
>
> - sdhi2: sd@ee160000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> - };
> + scifa0: serial@e6c40000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 204>;
> + status = "disabled";
> + };
>
> - mmcif0: mmc@ee200000 {
> - compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> - status = "disabled";
> - max-frequency = <97500000>;
> - };
> + scifa1: serial@e6c50000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 203>;
> + status = "disabled";
> + };
>
> - scifa0: serial@e6c40000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> - status = "disabled";
> - };
> + scifa2: serial@e6c60000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 202>;
> + status = "disabled";
> + };
>
> - scifa1: serial@e6c50000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> - status = "disabled";
> - };
> + scifa3: serial@e6c70000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c70000 0 64>;
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1106>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> + <&dmac1 0x1b>, <&dmac1 0x1c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1106>;
> + status = "disabled";
> + };
>
> - scifa2: serial@e6c60000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> - };
> + scifa4: serial@e6c78000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c78000 0 64>;
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1107>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> + <&dmac1 0x1f>, <&dmac1 0x20>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1107>;
> + status = "disabled";
> + };
>
> - scifa3: serial@e6c70000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c70000 0 64>;
> - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1106>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> - <&dmac1 0x1b>, <&dmac1 0x1c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1106>;
> - status = "disabled";
> - };
> + scifa5: serial@e6c80000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c80000 0 64>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1108>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> + <&dmac1 0x23>, <&dmac1 0x24>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1108>;
> + status = "disabled";
> + };
>
> - scifa4: serial@e6c78000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c78000 0 64>;
> - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1107>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> - <&dmac1 0x1f>, <&dmac1 0x20>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1107>;
> - status = "disabled";
> - };
> + scifb0: serial@e6c20000 {
> + compatible = "renesas,scifb-r8a7793",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 206>;
> + status = "disabled";
> + };
>
> - scifa5: serial@e6c80000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c80000 0 64>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1108>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> - <&dmac1 0x23>, <&dmac1 0x24>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1108>;
> - status = "disabled";
> - };
> + scifb1: serial@e6c30000 {
> + compatible = "renesas,scifb-r8a7793",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 207>;
> + status = "disabled";
> + };
>
> - scifb0: serial@e6c20000 {
> - compatible = "renesas,scifb-r8a7793",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> - status = "disabled";
> - };
> + scifb2: serial@e6ce0000 {
> + compatible = "renesas,scifb-r8a7793",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 216>;
> + status = "disabled";
> + };
>
> - scifb1: serial@e6c30000 {
> - compatible = "renesas,scifb-r8a7793",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> - status = "disabled";
> - };
> + scif0: serial@e6e60000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 721>;
> + status = "disabled";
> + };
>
> - scifb2: serial@e6ce0000 {
> - compatible = "renesas,scifb-r8a7793",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> - status = "disabled";
> - };
> + scif1: serial@e6e68000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 720>;
> + status = "disabled";
> + };
>
> - scif0: serial@e6e60000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> - status = "disabled";
> - };
> + scif2: serial@e6e58000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e58000 0 64>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 719>;
> + status = "disabled";
> + };
>
> - scif1: serial@e6e68000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> - status = "disabled";
> - };
> + scif3: serial@e6ea8000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ea8000 0 64>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> + <&dmac1 0x2f>, <&dmac1 0x30>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 718>;
> + status = "disabled";
> + };
>
> - scif2: serial@e6e58000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e58000 0 64>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 719>;
> - status = "disabled";
> - };
> + scif4: serial@e6ee0000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee0000 0 64>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> + <&dmac1 0xfb>, <&dmac1 0xfc>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 715>;
> + status = "disabled";
> + };
>
> - scif3: serial@e6ea8000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ea8000 0 64>;
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> - <&dmac1 0x2f>, <&dmac1 0x30>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 718>;
> - status = "disabled";
> - };
> + scif5: serial@e6ee8000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee8000 0 64>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> + <&dmac1 0xfd>, <&dmac1 0xfe>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 714>;
> + status = "disabled";
> + };
>
> - scif4: serial@e6ee0000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee0000 0 64>;
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> - <&dmac1 0xfb>, <&dmac1 0xfc>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 715>;
> - status = "disabled";
> - };
> + hscif0: serial@e62c0000 {
> + compatible = "renesas,hscif-r8a7793",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 717>;
> + status = "disabled";
> + };
>
> - scif5: serial@e6ee8000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee8000 0 64>;
> - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> - <&dmac1 0xfd>, <&dmac1 0xfe>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 714>;
> - status = "disabled";
> - };
> + hscif1: serial@e62c8000 {
> + compatible = "renesas,hscif-r8a7793",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 716>;
> + status = "disabled";
> + };
>
> - hscif0: serial@e62c0000 {
> - compatible = "renesas,hscif-r8a7793",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> + hscif2: serial@e62d0000 {
> + compatible = "renesas,hscif-r8a7793",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62d0000 0 96>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> + <&dmac1 0x3b>, <&dmac1 0x3c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 713>;
> + status = "disabled";
> + };
>
> - hscif1: serial@e62c8000 {
> - compatible = "renesas,hscif-r8a7793",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> + icram0: sram@e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
>
> - hscif2: serial@e62d0000 {
> - compatible = "renesas,hscif-r8a7793",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62d0000 0 96>;
> - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> - <&dmac1 0x3b>, <&dmac1 0x3c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 713>;
> - status = "disabled";
> - };
> + icram1: sram@e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
>
> - icram0: sram@e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> + smp-sram@0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> + };
>
> - icram1: sram@e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> + ether: ethernet@ee700000 {
> + compatible = "renesas,ether-r8a7793",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - smp-sram@0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> + vin0: video@e6ef0000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> + status = "disabled";
> };
> - };
>
> - ether: ethernet@ee700000 {
> - compatible = "renesas,ether-r8a7793",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + vin1: video@e6ef1000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> + status = "disabled";
> + };
>
> - vin0: video@e6ef0000 {
> - compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> + vin2: video@e6ef2000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef2000 0 0x1000>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 809>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 809>;
> + status = "disabled";
> + };
>
> - vin1: video@e6ef1000 {
> - compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> + qspi: spi@e6b10000 {
> + compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - vin2: video@e6ef2000 {
> - compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef2000 0 0x1000>;
> - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 809>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 809>;
> - status = "disabled";
> - };
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7793";
> + reg = <0 0xfeb00000 0 0x40000>,
> + <0 0xfeb90000 0 0x1c>;
> + reg-names = "du", "lvds.0";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 726>;
> + clock-names = "du.0", "du.1", "lvds.0";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> + port@1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> + };
> + };
> + };
>
> - qspi: spi@e6b10000 {
> - compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + can0: can@e6e80000 {
> + compatible = "renesas,can-r8a7793",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 916>;
> + status = "disabled";
> + };
>
> - du: display@feb00000 {
> - compatible = "renesas,du-r8a7793";
> - reg = <0 0xfeb00000 0 0x40000>,
> - <0 0xfeb90000 0 0x1c>;
> - reg-names = "du", "lvds.0";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 726>;
> - clock-names = "du.0", "du.1", "lvds.0";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> + can1: can@e6e88000 {
> + compatible = "renesas,can-r8a7793",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 915>;
> + status = "disabled";
> + };
> +
> + rst: reset-controller@e6160000 {
> + compatible = "renesas,r8a7793-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + prr: chipid@ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a7793-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + ipmmu_sy0: mmu@e6280000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
>
> - port@0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> + ipmmu_sy1: mmu@e6290000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_ds: mmu@e6740000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu@ec680000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu@fe951000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu@ffc80000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_gp: mmu@e62a0000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + rcar_sound: sound@ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7793",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> + <&cpg CPG_CORE R8A7793_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
> +
> + status = "disabled";
> +
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma1 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma1 0xbe>;
> + dma-names = "tx";
> };
> };
> - port@1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> +
> + rcar_sound,src {
> + src0: src-0 {
> + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x85>, <&audma1 0x9a>;
> + dma-names = "rx", "tx";
> + };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma1 0x9c>;
> + dma-names = "rx", "tx";
> + };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma1 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma1 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + src7: src-7 {
> + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x93>, <&audma1 0xb6>;
> + dma-names = "rx", "tx";
> + };
> + src8: src-8 {
> + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x95>, <&audma1 0xb8>;
> + dma-names = "rx", "tx";
> + };
> + src9: src-9 {
> + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x97>, <&audma1 0xba>;
> + dma-names = "rx", "tx";
> + };
> + };
> +
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma1 0x02>,
> + <&audma0 0x15>, <&audma1 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma1 0x04>,
> + <&audma0 0x49>, <&audma1 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma1 0x06>,
> + <&audma0 0x63>, <&audma1 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma1 0x08>,
> + <&audma0 0x6f>, <&audma1 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma1 0x0a>,
> + <&audma0 0x71>, <&audma1 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> + <&audma0 0x73>, <&audma1 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> + <&audma0 0x75>, <&audma1 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma1 0x10>,
> + <&audma0 0x79>, <&audma1 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma1 0x12>,
> + <&audma0 0x7b>, <&audma1 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma1 0x14>,
> + <&audma0 0x7d>, <&audma1 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> };
> };
> };
> +
> + /* Special CPG clocks */
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7793-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
> };
>
> - can0: can@e6e80000 {
> - compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&thermal>;
> +
> + trips {
> + cpu-crit {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + };
> + };
> };
>
> - can1: can@e6e88000 {
> - compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> /* External root clock */
> @@ -1079,257 +1393,4 @@
> /* This value must be overridden by the board. */
> clock-frequency = <0>;
> };
> -
> - /* Special CPG clocks */
> - cpg: clock-controller@e6150000 {
> - compatible = "renesas,r8a7793-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - rst: reset-controller@e6160000 {
> - compatible = "renesas,r8a7793-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid@ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller@e6180000 {
> - compatible = "renesas,r8a7793-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu@e6280000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu@e6290000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu@e6740000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu@ec680000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu@fe951000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_rt: mmu@ffc80000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_gp: mmu@e62a0000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - rcar_sound: sound@ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7793",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> -
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> - <&cpg CPG_CORE R8A7793_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6", "src.5",
> - "src.4", "src.3", "src.2", "src.1", "src.0",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
> -
> - status = "disabled";
> -
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma1 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma1 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,src {
> - src0: src-0 {
> - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x85>, <&audma1 0x9a>;
> - dma-names = "rx", "tx";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma1 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma1 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma1 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - src7: src-7 {
> - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x93>, <&audma1 0xb6>;
> - dma-names = "rx", "tx";
> - };
> - src8: src-8 {
> - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x95>, <&audma1 0xb8>;
> - dma-names = "rx", "tx";
> - };
> - src9: src-9 {
> - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x97>, <&audma1 0xba>;
> - dma-names = "rx", "tx";
> - };
> - };
> -
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - };
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 10/16] ARM: dts: r8a7793: add soc node
@ 2018-01-18 1:29 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:11 +0100, Simon Horman wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Same comment as 02/16.
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 2325 +++++++++++++++++++++-------------------
> 1 file changed, 1193 insertions(+), 1132 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index ea4bc06c8e8a..d18a65c647bb 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -15,7 +15,6 @@
>
> / {
> compatible = "renesas,r8a7793";
> - interrupt-parent = <&gic>;
> #address-cells = <2>;
> #size-cells = <2>;
>
> @@ -74,958 +73,1273 @@
> };
> };
>
> - apmu at e6152000 {
> - compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> + soc {
> + compatible = "simple-bus";
> + interrupt-parent = <&gic>;
>
> - thermal-zones {
> - cpu_thermal: cpu-thermal {
> - polling-delay-passive = <0>;
> - polling-delay = <0>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> - thermal-sensors = <&thermal>;
> + apmu at e6152000 {
> + compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
>
> - trips {
> - cpu-crit {
> - temperature = <95000>;
> - hysteresis = <0>;
> - type = "critical";
> - };
> - };
> - cooling-maps {
> - };
> + gic: interrupt-controller at f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> };
> - };
>
> - gic: interrupt-controller at f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> + gpio0: gpio at e6050000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6050000 0 0x50>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 0 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 912>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 912>;
> + };
>
> - gpio0: gpio at e6050000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6050000 0 0x50>;
> - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 0 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 912>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 912>;
> - };
> + gpio1: gpio at e6051000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6051000 0 0x50>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 32 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 911>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 911>;
> + };
>
> - gpio1: gpio at e6051000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6051000 0 0x50>;
> - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 32 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 911>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 911>;
> - };
> + gpio2: gpio at e6052000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6052000 0 0x50>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 64 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 910>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 910>;
> + };
>
> - gpio2: gpio at e6052000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6052000 0 0x50>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 64 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 910>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 910>;
> - };
> + gpio3: gpio at e6053000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6053000 0 0x50>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 96 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 909>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 909>;
> + };
>
> - gpio3: gpio at e6053000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6053000 0 0x50>;
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 96 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 909>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 909>;
> - };
> + gpio4: gpio at e6054000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6054000 0 0x50>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 128 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 908>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 908>;
> + };
>
> - gpio4: gpio at e6054000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6054000 0 0x50>;
> - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 128 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 908>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 908>;
> - };
> + gpio5: gpio at e6055000 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055000 0 0x50>;
> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 160 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 907>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 907>;
> + };
>
> - gpio5: gpio at e6055000 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055000 0 0x50>;
> - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 160 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 907>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 907>;
> - };
> + gpio6: gpio at e6055400 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055400 0 0x50>;
> + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 192 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 905>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 905>;
> + };
>
> - gpio6: gpio at e6055400 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055400 0 0x50>;
> - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 192 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 905>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 905>;
> - };
> + gpio7: gpio at e6055800 {
> + compatible = "renesas,gpio-r8a7793",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055800 0 0x50>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 224 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 904>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 904>;
> + };
>
> - gpio7: gpio at e6055800 {
> - compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055800 0 0x50>;
> - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 224 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 904>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 904>;
> - };
> + thermal: thermal at e61f0000 {
> + compatible = "renesas,thermal-r8a7793",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> + };
>
> - thermal: thermal at e61f0000 {
> - compatible = "renesas,thermal-r8a7793",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> - };
> + cmt0: timer at ffca0000 {
> + compatible = "renesas,r8a7793-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
>
> - timer {
> - compatible = "arm,armv7-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> - };
> + cmt1: timer at e6130000 {
> + compatible = "renesas,r8a7793-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
>
> - cmt0: timer at ffca0000 {
> - compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> -
> - status = "disabled";
> - };
> + irqc0: interrupt-controller at e61c0000 {
> + compatible = "renesas,irqc-r8a7793", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
>
> - cmt1: timer at e6130000 {
> - compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> -
> - status = "disabled";
> - };
> + dmac0: dma-controller at e6700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - irqc0: interrupt-controller at e61c0000 {
> - compatible = "renesas,irqc-r8a7793", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> + dmac1: dma-controller at e6720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - dmac0: dma-controller at e6700000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma0: dma-controller at ec700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - dmac1: dma-controller at e6720000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + audma1: dma-controller at ec720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - audma0: dma-controller at ec700000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + /* The memory map in the User's Manual maps the cores to
> + * bus numbers
> + */
> + i2c0: i2c at e6508000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - audma1: dma-controller at ec720000 {
> - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + i2c1: i2c at e6518000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - /* The memory map in the User's Manual maps the cores to bus numbers */
> - i2c0: i2c at e6508000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c2: i2c at e6530000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c1: i2c at e6518000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c3: i2c at e6540000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c2: i2c at e6530000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c4: i2c at e6520000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 927>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c3: i2c at e6540000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c5: i2c at e6528000 {
> + /* doesn't need pinmux */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a7793",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 925>;
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
>
> - i2c4: i2c at e6520000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c6: i2c at e60b0000 {
> + /* doesn't need pinmux */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7793",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe60b0000 0 0x425>;
> + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 926>;
> + dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> + <&dmac1 0x77>, <&dmac1 0x78>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 926>;
> + status = "disabled";
> + };
>
> - i2c5: i2c at e6528000 {
> - /* doesn't need pinmux */
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - i2c-scl-internal-delay-ns = <110>;
> - status = "disabled";
> - };
> + i2c7: i2c at e6500000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7793",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 318>;
> + status = "disabled";
> + };
>
> - i2c6: i2c at e60b0000 {
> - /* doesn't need pinmux */
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe60b0000 0 0x425>;
> - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 926>;
> - dmas = <&dmac0 0x77>, <&dmac0 0x78>,
> - <&dmac1 0x77>, <&dmac1 0x78>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 926>;
> - status = "disabled";
> - };
> + i2c8: i2c at e6510000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,iic-r8a7793",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 323>;
> + status = "disabled";
> + };
>
> - i2c7: i2c at e6500000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - status = "disabled";
> - };
> + pfc: pin-controller at e6060000 {
> + compatible = "renesas,pfc-r8a7793";
> + reg = <0 0xe6060000 0 0x250>;
> + };
>
> - i2c8: i2c at e6510000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - status = "disabled";
> - };
> + sdhi0: sd at ee100000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
>
> - pfc: pin-controller at e6060000 {
> - compatible = "renesas,pfc-r8a7793";
> - reg = <0 0xe6060000 0 0x250>;
> - };
> + sdhi1: sd at ee140000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
>
> - sdhi0: sd at ee100000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> + sdhi2: sd at ee160000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
>
> - sdhi1: sd at ee140000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> - };
> + mmcif0: mmc at ee200000 {
> + compatible = "renesas,mmcif-r8a7793",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
>
> - sdhi2: sd at ee160000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> - };
> + scifa0: serial at e6c40000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 204>;
> + status = "disabled";
> + };
>
> - mmcif0: mmc at ee200000 {
> - compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> - status = "disabled";
> - max-frequency = <97500000>;
> - };
> + scifa1: serial at e6c50000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 203>;
> + status = "disabled";
> + };
>
> - scifa0: serial at e6c40000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> - status = "disabled";
> - };
> + scifa2: serial at e6c60000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 202>;
> + status = "disabled";
> + };
>
> - scifa1: serial at e6c50000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> - status = "disabled";
> - };
> + scifa3: serial at e6c70000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c70000 0 64>;
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1106>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> + <&dmac1 0x1b>, <&dmac1 0x1c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1106>;
> + status = "disabled";
> + };
>
> - scifa2: serial at e6c60000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> - };
> + scifa4: serial at e6c78000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c78000 0 64>;
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1107>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> + <&dmac1 0x1f>, <&dmac1 0x20>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1107>;
> + status = "disabled";
> + };
>
> - scifa3: serial at e6c70000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c70000 0 64>;
> - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1106>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> - <&dmac1 0x1b>, <&dmac1 0x1c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1106>;
> - status = "disabled";
> - };
> + scifa5: serial at e6c80000 {
> + compatible = "renesas,scifa-r8a7793",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c80000 0 64>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1108>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> + <&dmac1 0x23>, <&dmac1 0x24>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1108>;
> + status = "disabled";
> + };
>
> - scifa4: serial at e6c78000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c78000 0 64>;
> - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1107>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> - <&dmac1 0x1f>, <&dmac1 0x20>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1107>;
> - status = "disabled";
> - };
> + scifb0: serial at e6c20000 {
> + compatible = "renesas,scifb-r8a7793",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 206>;
> + status = "disabled";
> + };
>
> - scifa5: serial at e6c80000 {
> - compatible = "renesas,scifa-r8a7793",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c80000 0 64>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1108>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> - <&dmac1 0x23>, <&dmac1 0x24>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1108>;
> - status = "disabled";
> - };
> + scifb1: serial at e6c30000 {
> + compatible = "renesas,scifb-r8a7793",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 207>;
> + status = "disabled";
> + };
>
> - scifb0: serial at e6c20000 {
> - compatible = "renesas,scifb-r8a7793",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> - status = "disabled";
> - };
> + scifb2: serial at e6ce0000 {
> + compatible = "renesas,scifb-r8a7793",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 216>;
> + status = "disabled";
> + };
>
> - scifb1: serial at e6c30000 {
> - compatible = "renesas,scifb-r8a7793",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> - status = "disabled";
> - };
> + scif0: serial at e6e60000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 721>;
> + status = "disabled";
> + };
>
> - scifb2: serial at e6ce0000 {
> - compatible = "renesas,scifb-r8a7793",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> - status = "disabled";
> - };
> + scif1: serial at e6e68000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 720>;
> + status = "disabled";
> + };
>
> - scif0: serial at e6e60000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> - status = "disabled";
> - };
> + scif2: serial at e6e58000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e58000 0 64>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 719>;
> + status = "disabled";
> + };
>
> - scif1: serial at e6e68000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> - status = "disabled";
> - };
> + scif3: serial at e6ea8000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ea8000 0 64>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> + <&dmac1 0x2f>, <&dmac1 0x30>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 718>;
> + status = "disabled";
> + };
>
> - scif2: serial at e6e58000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e58000 0 64>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 719>;
> - status = "disabled";
> - };
> + scif4: serial at e6ee0000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee0000 0 64>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> + <&dmac1 0xfb>, <&dmac1 0xfc>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 715>;
> + status = "disabled";
> + };
>
> - scif3: serial at e6ea8000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ea8000 0 64>;
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> - <&dmac1 0x2f>, <&dmac1 0x30>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 718>;
> - status = "disabled";
> - };
> + scif5: serial at e6ee8000 {
> + compatible = "renesas,scif-r8a7793",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee8000 0 64>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> + <&dmac1 0xfd>, <&dmac1 0xfe>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 714>;
> + status = "disabled";
> + };
>
> - scif4: serial at e6ee0000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee0000 0 64>;
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> - <&dmac1 0xfb>, <&dmac1 0xfc>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 715>;
> - status = "disabled";
> - };
> + hscif0: serial at e62c0000 {
> + compatible = "renesas,hscif-r8a7793",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 717>;
> + status = "disabled";
> + };
>
> - scif5: serial at e6ee8000 {
> - compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee8000 0 64>;
> - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> - <&dmac1 0xfd>, <&dmac1 0xfe>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 714>;
> - status = "disabled";
> - };
> + hscif1: serial at e62c8000 {
> + compatible = "renesas,hscif-r8a7793",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 716>;
> + status = "disabled";
> + };
>
> - hscif0: serial at e62c0000 {
> - compatible = "renesas,hscif-r8a7793",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> + hscif2: serial at e62d0000 {
> + compatible = "renesas,hscif-r8a7793",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62d0000 0 96>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> + <&dmac1 0x3b>, <&dmac1 0x3c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 713>;
> + status = "disabled";
> + };
>
> - hscif1: serial at e62c8000 {
> - compatible = "renesas,hscif-r8a7793",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> + icram0: sram at e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
>
> - hscif2: serial at e62d0000 {
> - compatible = "renesas,hscif-r8a7793",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62d0000 0 96>;
> - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> - <&dmac1 0x3b>, <&dmac1 0x3c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 713>;
> - status = "disabled";
> - };
> + icram1: sram at e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
>
> - icram0: sram at e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> + smp-sram at 0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> + };
>
> - icram1: sram at e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> + ether: ethernet at ee700000 {
> + compatible = "renesas,ether-r8a7793",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - smp-sram at 0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> + vin0: video at e6ef0000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> + status = "disabled";
> };
> - };
>
> - ether: ethernet at ee700000 {
> - compatible = "renesas,ether-r8a7793",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + vin1: video at e6ef1000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> + status = "disabled";
> + };
>
> - vin0: video at e6ef0000 {
> - compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> + vin2: video at e6ef2000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef2000 0 0x1000>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 809>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 809>;
> + status = "disabled";
> + };
>
> - vin1: video at e6ef1000 {
> - compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> + qspi: spi at e6b10000 {
> + compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - vin2: video at e6ef2000 {
> - compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef2000 0 0x1000>;
> - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 809>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 809>;
> - status = "disabled";
> - };
> + du: display at feb00000 {
> + compatible = "renesas,du-r8a7793";
> + reg = <0 0xfeb00000 0 0x40000>,
> + <0 0xfeb90000 0 0x1c>;
> + reg-names = "du", "lvds.0";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 726>;
> + clock-names = "du.0", "du.1", "lvds.0";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> + port at 1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> + };
> + };
> + };
>
> - qspi: spi at e6b10000 {
> - compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + can0: can at e6e80000 {
> + compatible = "renesas,can-r8a7793",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 916>;
> + status = "disabled";
> + };
>
> - du: display at feb00000 {
> - compatible = "renesas,du-r8a7793";
> - reg = <0 0xfeb00000 0 0x40000>,
> - <0 0xfeb90000 0 0x1c>;
> - reg-names = "du", "lvds.0";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 726>;
> - clock-names = "du.0", "du.1", "lvds.0";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> + can1: can at e6e88000 {
> + compatible = "renesas,can-r8a7793",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 915>;
> + status = "disabled";
> + };
> +
> + rst: reset-controller at e6160000 {
> + compatible = "renesas,r8a7793-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + prr: chipid at ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7793-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + ipmmu_sy0: mmu at e6280000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
>
> - port at 0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> + ipmmu_sy1: mmu at e6290000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_ds: mmu at e6740000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu at ec680000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu at fe951000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu at ffc80000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_gp: mmu at e62a0000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + rcar_sound: sound at ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7793",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> + <&cpg CPG_CORE R8A7793_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
> +
> + status = "disabled";
> +
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma1 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma1 0xbe>;
> + dma-names = "tx";
> };
> };
> - port at 1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> +
> + rcar_sound,src {
> + src0: src-0 {
> + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x85>, <&audma1 0x9a>;
> + dma-names = "rx", "tx";
> + };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma1 0x9c>;
> + dma-names = "rx", "tx";
> + };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma1 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma1 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + src7: src-7 {
> + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x93>, <&audma1 0xb6>;
> + dma-names = "rx", "tx";
> + };
> + src8: src-8 {
> + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x95>, <&audma1 0xb8>;
> + dma-names = "rx", "tx";
> + };
> + src9: src-9 {
> + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x97>, <&audma1 0xba>;
> + dma-names = "rx", "tx";
> + };
> + };
> +
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma1 0x02>,
> + <&audma0 0x15>, <&audma1 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma1 0x04>,
> + <&audma0 0x49>, <&audma1 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma1 0x06>,
> + <&audma0 0x63>, <&audma1 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma1 0x08>,
> + <&audma0 0x6f>, <&audma1 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma1 0x0a>,
> + <&audma0 0x71>, <&audma1 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma1 0x0c>,
> + <&audma0 0x73>, <&audma1 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma1 0x0e>,
> + <&audma0 0x75>, <&audma1 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma1 0x10>,
> + <&audma0 0x79>, <&audma1 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma1 0x12>,
> + <&audma0 0x7b>, <&audma1 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma1 0x14>,
> + <&audma0 0x7d>, <&audma1 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> };
> };
> };
> +
> + /* Special CPG clocks */
> + cpg: clock-controller at e6150000 {
> + compatible = "renesas,r8a7793-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
> };
>
> - can0: can at e6e80000 {
> - compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&thermal>;
> +
> + trips {
> + cpu-crit {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + };
> + };
> };
>
> - can1: can at e6e88000 {
> - compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> /* External root clock */
> @@ -1079,257 +1393,4 @@
> /* This value must be overridden by the board. */
> clock-frequency = <0>;
> };
> -
> - /* Special CPG clocks */
> - cpg: clock-controller at e6150000 {
> - compatible = "renesas,r8a7793-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - rst: reset-controller at e6160000 {
> - compatible = "renesas,r8a7793-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid at ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller at e6180000 {
> - compatible = "renesas,r8a7793-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu at e6280000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu at e6290000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu at e6740000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu at ec680000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu at fe951000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_rt: mmu at ffc80000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_gp: mmu at e62a0000 {
> - compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - rcar_sound: sound at ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7793",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> -
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
> - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
> - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
> - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
> - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> - <&cpg CPG_CORE R8A7793_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6", "src.5",
> - "src.4", "src.3", "src.2", "src.1", "src.0",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
> -
> - status = "disabled";
> -
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma1 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma1 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,src {
> - src0: src-0 {
> - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x85>, <&audma1 0x9a>;
> - dma-names = "rx", "tx";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma1 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma1 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma1 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma1 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma1 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma1 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - src7: src-7 {
> - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x93>, <&audma1 0xb6>;
> - dma-names = "rx", "tx";
> - };
> - src8: src-8 {
> - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x95>, <&audma1 0xb8>;
> - dma-names = "rx", "tx";
> - };
> - src9: src-9 {
> - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x97>, <&audma1 0xba>;
> - dma-names = "rx", "tx";
> - };
> - };
> -
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - };
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 11/16] ARM: dts: r8a7793: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 1:43 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:43 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:12 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 872 ++++++++++++++++++++---------------------
> 1 file changed, 436 insertions(+), 436 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index d18a65c647bb..f2b58a28cee9 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -81,28 +81,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu@e6152000 {
> - compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> -
> - gic: interrupt-controller@f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> gpio0: gpio@e6050000 {
> compatible = "renesas,gpio-r8a7793",
> "renesas,rcar-gen2-gpio";
> @@ -223,50 +201,37 @@
> resets = <&cpg 904>;
> };
>
> - thermal: thermal@e61f0000 {
> - compatible = "renesas,thermal-r8a7793",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7793";
> + reg = <0 0xe6060000 0 0x250>;
> };
>
> - cmt0: timer@ffca0000 {
> - compatible = "renesas,r8a7793-cmt0",
> - "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> + /* Special CPG clocks */
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7793-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
>
> - status = "disabled";
> + apmu@e6152000 {
> + compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> };
>
> - cmt1: timer@e6130000 {
> - compatible = "renesas,r8a7793-cmt1",
> - "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> + rst: reset-controller@e6160000 {
> + compatible = "renesas,r8a7793-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
>
> - status = "disabled";
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a7793-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> };
>
> irqc0: interrupt-controller@e61c0000 {
> @@ -289,132 +254,101 @@
> resets = <&cpg 407>;
> };
>
> - dmac0: dma-controller@e6700000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> + thermal: thermal@e61f0000 {
> + compatible = "renesas,thermal-r8a7793",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> };
>
> - dmac1: dma-controller@e6720000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_sy0: mmu@e6280000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma0: dma-controller@ec700000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_sy1: mmu@e6290000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma1: dma-controller@ec720000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_ds: mmu@e6740000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu@ec680000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu@fe951000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu@ffc80000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_gp: mmu@e62a0000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + icram0: sram@e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
> +
> + icram1: sram@e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram@0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
>
> /* The memory map in the User's Manual maps the cores to
> @@ -557,70 +491,86 @@
> status = "disabled";
> };
>
> - pfc: pin-controller@e6060000 {
> - compatible = "renesas,pfc-r8a7793";
> - reg = <0 0xe6060000 0 0x250>;
> - };
> -
> - sdhi0: sd@ee100000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> -
> - sdhi1: sd@ee140000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + dmac0: dma-controller@e6700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - sdhi2: sd@ee160000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + dmac1: dma-controller@e6720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - mmcif0: mmc@ee200000 {
> - compatible = "renesas,mmcif-r8a7793",
> - "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> + qspi: spi@e6b10000 {
> + compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> - max-frequency = <97500000>;
> };
>
> scifa0: serial@e6c40000 {
> @@ -902,117 +852,6 @@
> status = "disabled";
> };
>
> - icram0: sram@e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram@e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram@0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> - };
> -
> - ether: ethernet@ee700000 {
> - compatible = "renesas,ether-r8a7793",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - vin0: video@e6ef0000 {
> - compatible = "renesas,vin-r8a7793",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> -
> - vin1: video@e6ef1000 {
> - compatible = "renesas,vin-r8a7793",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> -
> - vin2: video@e6ef2000 {
> - compatible = "renesas,vin-r8a7793",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef2000 0 0x1000>;
> - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 809>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 809>;
> - status = "disabled";
> - };
> -
> - qspi: spi@e6b10000 {
> - compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - du: display@feb00000 {
> - compatible = "renesas,du-r8a7793";
> - reg = <0 0xfeb00000 0 0x40000>,
> - <0 0xfeb90000 0 0x1c>;
> - reg-names = "du", "lvds.0";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 726>;
> - clock-names = "du.0", "du.1", "lvds.0";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> - };
> - };
> - port@1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> - };
> - };
> - };
> - };
> -
> can0: can@e6e80000 {
> compatible = "renesas,can-r8a7793",
> "renesas,rcar-gen2-can";
> @@ -1039,86 +878,36 @@
> status = "disabled";
> };
>
> - rst: reset-controller@e6160000 {
> - compatible = "renesas,r8a7793-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid@ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller@e6180000 {
> - compatible = "renesas,r8a7793-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu@e6280000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu@e6290000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu@e6740000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu@ec680000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu@fe951000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin0: video@e6ef0000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> status = "disabled";
> };
>
> - ipmmu_rt: mmu@ffc80000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin1: video@e6ef1000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> status = "disabled";
> };
>
> - ipmmu_gp: mmu@e62a0000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin2: video@e6ef2000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef2000 0 0x1000>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 809>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 809>;
> status = "disabled";
> };
>
> @@ -1153,14 +942,14 @@
> <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> <&cpg CPG_CORE R8A7793_CLK_M2>;
> clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> - "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> - "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6",
> - "src.5", "src.4", "src.3", "src.2",
> - "src.1", "src.0",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> resets = <&cpg 1005>,
> <&cpg 1006>, <&cpg 1007>,
> @@ -1303,15 +1092,226 @@
> };
> };
>
> - /* Special CPG clocks */
> - cpg: clock-controller@e6150000 {
> - compatible = "renesas,r8a7793-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> + audma0: dma-controller@ec700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
> +
> + audma1: dma-controller@ec720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
> +
> + sdhi0: sd@ee100000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + sdhi1: sd@ee140000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
> +
> + sdhi2: sd@ee160000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
> +
> + mmcif0: mmc@ee200000 {
> + compatible = "renesas,mmcif-r8a7793",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
> +
> + ether: ethernet@ee700000 {
> + compatible = "renesas,ether-r8a7793",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller@f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7793";
> + reg = <0 0xfeb00000 0 0x40000>,
> + <0 0xfeb90000 0 0x1c>;
> + reg-names = "du", "lvds.0";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 726>;
> + clock-names = "du.0", "du.1", "lvds.0";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> + port@1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> + };
> + };
> + };
> +
> + prr: chipid@ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + cmt0: timer@ffca0000 {
> + compatible = "renesas,r8a7793-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
> +
> + cmt1: timer@e6130000 {
> + compatible = "renesas,r8a7793-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> };
> };
>
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 11/16] ARM: dts: r8a7793: sort subnodes of soc node
@ 2018-01-18 1:43 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:12 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 872 ++++++++++++++++++++---------------------
> 1 file changed, 436 insertions(+), 436 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index d18a65c647bb..f2b58a28cee9 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -81,28 +81,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu at e6152000 {
> - compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> - reg = <0 0xe6152000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> -
> - gic: interrupt-controller at f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> gpio0: gpio at e6050000 {
> compatible = "renesas,gpio-r8a7793",
> "renesas,rcar-gen2-gpio";
> @@ -223,50 +201,37 @@
> resets = <&cpg 904>;
> };
>
> - thermal: thermal at e61f0000 {
> - compatible = "renesas,thermal-r8a7793",
> - "renesas,rcar-gen2-thermal",
> - "renesas,rcar-thermal";
> - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 522>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 522>;
> - #thermal-sensor-cells = <0>;
> + pfc: pin-controller at e6060000 {
> + compatible = "renesas,pfc-r8a7793";
> + reg = <0 0xe6060000 0 0x250>;
> };
>
> - cmt0: timer at ffca0000 {
> - compatible = "renesas,r8a7793-cmt0",
> - "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> + /* Special CPG clocks */
> + cpg: clock-controller at e6150000 {
> + compatible = "renesas,r8a7793-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
>
> - status = "disabled";
> + apmu at e6152000 {
> + compatible = "renesas,r8a7793-apmu", "renesas,apmu";
> + reg = <0 0xe6152000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> };
>
> - cmt1: timer at e6130000 {
> - compatible = "renesas,r8a7793-cmt1",
> - "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> + rst: reset-controller at e6160000 {
> + compatible = "renesas,r8a7793-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
>
> - status = "disabled";
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7793-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> };
>
> irqc0: interrupt-controller at e61c0000 {
> @@ -289,132 +254,101 @@
> resets = <&cpg 407>;
> };
>
> - dmac0: dma-controller at e6700000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> + thermal: thermal at e61f0000 {
> + compatible = "renesas,thermal-r8a7793",
> + "renesas,rcar-gen2-thermal",
> + "renesas,rcar-thermal";
> + reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 522>;
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + resets = <&cpg 522>;
> + #thermal-sensor-cells = <0>;
> };
>
> - dmac1: dma-controller at e6720000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_sy0: mmu at e6280000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma0: dma-controller at ec700000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_sy1: mmu at e6290000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma1: dma-controller at ec720000 {
> - compatible = "renesas,dmac-r8a7793",
> - "renesas,rcar-dmac";
> - reg = <0 0xec720000 0 0x10000>;
> - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 501>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 501>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_ds: mmu at e6740000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu at ec680000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu at fe951000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_rt: mmu at ffc80000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xffc80000 0 0x1000>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_gp: mmu at e62a0000 {
> + compatible = "renesas,ipmmu-r8a7793",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + icram0: sram at e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
> +
> + icram1: sram at e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram at 0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
>
> /* The memory map in the User's Manual maps the cores to
> @@ -557,70 +491,86 @@
> status = "disabled";
> };
>
> - pfc: pin-controller at e6060000 {
> - compatible = "renesas,pfc-r8a7793";
> - reg = <0 0xe6060000 0 0x250>;
> - };
> -
> - sdhi0: sd at ee100000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> -
> - sdhi1: sd at ee140000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + dmac0: dma-controller at e6700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - sdhi2: sd at ee160000 {
> - compatible = "renesas,sdhi-r8a7793",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> + dmac1: dma-controller at e6720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - mmcif0: mmc at ee200000 {
> - compatible = "renesas,mmcif-r8a7793",
> - "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> + qspi: spi at e6b10000 {
> + compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> - max-frequency = <97500000>;
> };
>
> scifa0: serial at e6c40000 {
> @@ -902,117 +852,6 @@
> status = "disabled";
> };
>
> - icram0: sram at e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram at e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram at 0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> - };
> -
> - ether: ethernet at ee700000 {
> - compatible = "renesas,ether-r8a7793",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - vin0: video at e6ef0000 {
> - compatible = "renesas,vin-r8a7793",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> -
> - vin1: video at e6ef1000 {
> - compatible = "renesas,vin-r8a7793",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> -
> - vin2: video at e6ef2000 {
> - compatible = "renesas,vin-r8a7793",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef2000 0 0x1000>;
> - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 809>;
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 809>;
> - status = "disabled";
> - };
> -
> - qspi: spi at e6b10000 {
> - compatible = "renesas,qspi-r8a7793", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> -
> - du: display at feb00000 {
> - compatible = "renesas,du-r8a7793";
> - reg = <0 0xfeb00000 0 0x40000>,
> - <0 0xfeb90000 0 0x1c>;
> - reg-names = "du", "lvds.0";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 726>;
> - clock-names = "du.0", "du.1", "lvds.0";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port at 0 {
> - reg = <0>;
> - du_out_rgb: endpoint {
> - };
> - };
> - port at 1 {
> - reg = <1>;
> - du_out_lvds0: endpoint {
> - };
> - };
> - };
> - };
> -
> can0: can at e6e80000 {
> compatible = "renesas,can-r8a7793",
> "renesas,rcar-gen2-can";
> @@ -1039,86 +878,36 @@
> status = "disabled";
> };
>
> - rst: reset-controller at e6160000 {
> - compatible = "renesas,r8a7793-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid at ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller at e6180000 {
> - compatible = "renesas,r8a7793-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu at e6280000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu at e6290000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu at e6740000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu at ec680000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu at fe951000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin0: video at e6ef0000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> status = "disabled";
> };
>
> - ipmmu_rt: mmu at ffc80000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xffc80000 0 0x1000>;
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin1: video at e6ef1000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> status = "disabled";
> };
>
> - ipmmu_gp: mmu at e62a0000 {
> - compatible = "renesas,ipmmu-r8a7793",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin2: video at e6ef2000 {
> + compatible = "renesas,vin-r8a7793",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef2000 0 0x1000>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 809>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 809>;
> status = "disabled";
> };
>
> @@ -1153,14 +942,14 @@
> <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
> <&cpg CPG_CORE R8A7793_CLK_M2>;
> clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> - "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> - "ssi.1", "ssi.0",
> - "src.9", "src.8", "src.7", "src.6",
> - "src.5", "src.4", "src.3", "src.2",
> - "src.1", "src.0",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.9", "src.8", "src.7", "src.6",
> + "src.5", "src.4", "src.3", "src.2",
> + "src.1", "src.0",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> resets = <&cpg 1005>,
> <&cpg 1006>, <&cpg 1007>,
> @@ -1303,15 +1092,226 @@
> };
> };
>
> - /* Special CPG clocks */
> - cpg: clock-controller at e6150000 {
> - compatible = "renesas,r8a7793-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> + audma0: dma-controller at ec700000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
> +
> + audma1: dma-controller at ec720000 {
> + compatible = "renesas,dmac-r8a7793",
> + "renesas,rcar-dmac";
> + reg = <0 0xec720000 0 0x10000>;
> + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 501>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 501>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
> +
> + sdhi0: sd at ee100000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + sdhi1: sd at ee140000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
> +
> + sdhi2: sd at ee160000 {
> + compatible = "renesas,sdhi-r8a7793",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
> +
> + mmcif0: mmc at ee200000 {
> + compatible = "renesas,mmcif-r8a7793",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + max-frequency = <97500000>;
> + };
> +
> + ether: ethernet at ee700000 {
> + compatible = "renesas,ether-r8a7793",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller at f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> + du: display at feb00000 {
> + compatible = "renesas,du-r8a7793";
> + reg = <0 0xfeb00000 0 0x40000>,
> + <0 0xfeb90000 0 0x1c>;
> + reg-names = "du", "lvds.0";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 726>;
> + clock-names = "du.0", "du.1", "lvds.0";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> + port at 1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> + };
> + };
> + };
> +
> + prr: chipid at ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + cmt0: timer at ffca0000 {
> + compatible = "renesas,r8a7793-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
> +
> + cmt1: timer at e6130000 {
> + compatible = "renesas,r8a7793-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> };
> };
>
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 12/16] ARM: dts: r8a7793: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 1:45 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:45 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:13 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 90 +++++++++++++++++++++---------------------
> 1 file changed, 45 insertions(+), 45 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index f2b58a28cee9..aa7d7792fb13 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -31,6 +31,35 @@
> spi0 = &qspi;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clk_a: audio_clk_a {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_b: audio_clk_b {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_c: audio_clk_c {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -73,6 +102,22 @@
> };
> };
>
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> interrupt-parent = <&gic>;
> @@ -1342,55 +1387,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed frequency
> - * clocks by default.
> - * Boards that provide audio clocks should override them.
> - */
> - audio_clk_a: audio_clk_a {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_b: audio_clk_b {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_c: audio_clk_c {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 12/16] ARM: dts: r8a7793: sort subnodes of root node
@ 2018-01-18 1:45 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:45 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:13 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 90 +++++++++++++++++++++---------------------
> 1 file changed, 45 insertions(+), 45 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index f2b58a28cee9..aa7d7792fb13 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -31,6 +31,35 @@
> spi0 = &qspi;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clk_a: audio_clk_a {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_b: audio_clk_b {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clk_c: audio_clk_c {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -73,6 +102,22 @@
> };
> };
>
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> interrupt-parent = <&gic>;
> @@ -1342,55 +1387,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed frequency
> - * clocks by default.
> - * Boards that provide audio clocks should override them.
> - */
> - audio_clk_a: audio_clk_a {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_b: audio_clk_b {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clk_c: audio_clk_c {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 13/16] ARM: dts: r8a7794: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 1:46 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:46 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:14 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 38 +++++++++++++++++++-------------------
> 1 file changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 106b4e1649ff..79263377ded3 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -319,20 +319,20 @@
> audma0: dma-controller@ec700000 {
> compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
> "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
> @@ -1186,11 +1186,11 @@
> */
> compatible = "renesas,rcar_sound-r8a7794",
> "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 13/16] ARM: dts: r8a7794: consistently use single space after =
@ 2018-01-18 1:46 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 1:46 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:14 +0100, Simon Horman wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 38 +++++++++++++++++++-------------------
> 1 file changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 106b4e1649ff..79263377ded3 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -319,20 +319,20 @@
> audma0: dma-controller at ec700000 {
> compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "error",
> "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
> "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
> @@ -1186,11 +1186,11 @@
> */
> compatible = "renesas,rcar_sound-r8a7794",
> "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>
> clocks = <&cpg CPG_MOD 1005>,
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 14/16] ARM: dts: r8a7794: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 2:00 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 2:00 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:15 +0100, Simon Horman wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Same comment as to 02/16.
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 2358 ++++++++++++++++++++--------------------
> 1 file changed, 1205 insertions(+), 1153 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 79263377ded3..0d65069b1a89 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -16,7 +16,6 @@
>
> / {
> compatible = "renesas,r8a7794";
> - interrupt-parent = <&gic>;
> #address-cells = <2>;
> #size-cells = <2>;
>
> @@ -67,985 +66,1293 @@
> };
> };
>
> - apmu@e6151000 {
> - compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> + soc {
> + compatible = "simple-bus";
> + interrupt-parent = <&gic>;
>
> - gic: interrupt-controller@f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> - gpio0: gpio@e6050000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6050000 0 0x50>;
> - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 0 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 912>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 912>;
> - };
> + apmu@e6151000 {
> + compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
>
> - gpio1: gpio@e6051000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6051000 0 0x50>;
> - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 32 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 911>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 911>;
> - };
> + gic: interrupt-controller@f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
>
> - gpio2: gpio@e6052000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6052000 0 0x50>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 64 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 910>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 910>;
> - };
> + gpio0: gpio@e6050000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6050000 0 0x50>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 0 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 912>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 912>;
> + };
>
> - gpio3: gpio@e6053000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6053000 0 0x50>;
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 96 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 909>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 909>;
> - };
> + gpio1: gpio@e6051000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6051000 0 0x50>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 32 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 911>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 911>;
> + };
>
> - gpio4: gpio@e6054000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6054000 0 0x50>;
> - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 128 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 908>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 908>;
> - };
> + gpio2: gpio@e6052000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6052000 0 0x50>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 64 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 910>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 910>;
> + };
>
> - gpio5: gpio@e6055000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055000 0 0x50>;
> - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 160 28>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 907>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 907>;
> - };
> + gpio3: gpio@e6053000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6053000 0 0x50>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 96 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 909>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 909>;
> + };
>
> - gpio6: gpio@e6055400 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055400 0 0x50>;
> - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 192 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 905>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 905>;
> - };
> + gpio4: gpio@e6054000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6054000 0 0x50>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 128 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 908>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 908>;
> + };
>
> - cmt0: timer@ffca0000 {
> - compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> -
> - status = "disabled";
> - };
> + gpio5: gpio@e6055000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055000 0 0x50>;
> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 160 28>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 907>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 907>;
> + };
>
> - cmt1: timer@e6130000 {
> - compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> -
> - status = "disabled";
> - };
> + gpio6: gpio@e6055400 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055400 0 0x50>;
> + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 192 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 905>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 905>;
> + };
>
> - timer {
> - compatible = "arm,armv7-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> - };
> + cmt0: timer@ffca0000 {
> + compatible = "renesas,r8a7794-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
>
> - irqc0: interrupt-controller@e61c0000 {
> - compatible = "renesas,irqc-r8a7794", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> + cmt1: timer@e6130000 {
> + compatible = "renesas,r8a7794-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
>
> - pfc: pin-controller@e6060000 {
> - compatible = "renesas,pfc-r8a7794";
> - reg = <0 0xe6060000 0 0x11c>;
> - };
> + irqc0: interrupt-controller@e61c0000 {
> + compatible = "renesas,irqc-r8a7794", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
>
> - dmac0: dma-controller@e6700000 {
> - compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7794";
> + reg = <0 0xe6060000 0 0x11c>;
> + };
>
> - dmac1: dma-controller@e6720000 {
> - compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + dmac0: dma-controller@e6700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - audma0: dma-controller@ec700000 {
> - compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
> - "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + dmac1: dma-controller@e6720000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - scifa0: serial@e6c40000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> - status = "disabled";
> - };
> + audma0: dma-controller@ec700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3", "ch4",
> + "ch5", "ch6", "ch7", "ch8", "ch9",
> + "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - scifa1: serial@e6c50000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> - status = "disabled";
> - };
> + scifa0: serial@e6c40000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 204>;
> + status = "disabled";
> + };
>
> - scifa2: serial@e6c60000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> - };
> + scifa1: serial@e6c50000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 203>;
> + status = "disabled";
> + };
>
> - scifa3: serial@e6c70000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c70000 0 64>;
> - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1106>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> - <&dmac1 0x1b>, <&dmac1 0x1c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1106>;
> - status = "disabled";
> - };
> + scifa2: serial@e6c60000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 202>;
> + status = "disabled";
> + };
>
> - scifa4: serial@e6c78000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c78000 0 64>;
> - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1107>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> - <&dmac1 0x1f>, <&dmac1 0x20>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1107>;
> - status = "disabled";
> - };
> + scifa3: serial@e6c70000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c70000 0 64>;
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1106>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> + <&dmac1 0x1b>, <&dmac1 0x1c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1106>;
> + status = "disabled";
> + };
>
> - scifa5: serial@e6c80000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c80000 0 64>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1108>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> - <&dmac1 0x23>, <&dmac1 0x24>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1108>;
> - status = "disabled";
> - };
> + scifa4: serial@e6c78000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c78000 0 64>;
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1107>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> + <&dmac1 0x1f>, <&dmac1 0x20>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1107>;
> + status = "disabled";
> + };
>
> - scifb0: serial@e6c20000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> - status = "disabled";
> - };
> + scifa5: serial@e6c80000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c80000 0 64>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1108>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> + <&dmac1 0x23>, <&dmac1 0x24>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1108>;
> + status = "disabled";
> + };
>
> - scifb1: serial@e6c30000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> - status = "disabled";
> - };
> + scifb0: serial@e6c20000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 206>;
> + status = "disabled";
> + };
>
> - scifb2: serial@e6ce0000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> - status = "disabled";
> - };
> + scifb1: serial@e6c30000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 207>;
> + status = "disabled";
> + };
>
> - scif0: serial@e6e60000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> - status = "disabled";
> - };
> + scifb2: serial@e6ce0000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 216>;
> + status = "disabled";
> + };
>
> - scif1: serial@e6e68000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> - status = "disabled";
> - };
> + scif0: serial@e6e60000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 721>;
> + status = "disabled";
> + };
>
> - scif2: serial@e6e58000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e58000 0 64>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 719>;
> - status = "disabled";
> - };
> + scif1: serial@e6e68000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 720>;
> + status = "disabled";
> + };
>
> - scif3: serial@e6ea8000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ea8000 0 64>;
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> - <&dmac1 0x2f>, <&dmac1 0x30>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 718>;
> - status = "disabled";
> - };
> + scif2: serial@e6e58000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e58000 0 64>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 719>;
> + status = "disabled";
> + };
>
> - scif4: serial@e6ee0000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee0000 0 64>;
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> - <&dmac1 0xfb>, <&dmac1 0xfc>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 715>;
> - status = "disabled";
> - };
> + scif3: serial@e6ea8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ea8000 0 64>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> + <&dmac1 0x2f>, <&dmac1 0x30>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 718>;
> + status = "disabled";
> + };
>
> - scif5: serial@e6ee8000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee8000 0 64>;
> - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> - <&dmac1 0xfd>, <&dmac1 0xfe>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 714>;
> - status = "disabled";
> - };
> + scif4: serial@e6ee0000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee0000 0 64>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> + <&dmac1 0xfb>, <&dmac1 0xfc>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 715>;
> + status = "disabled";
> + };
>
> - hscif0: serial@e62c0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> + scif5: serial@e6ee8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee8000 0 64>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> + <&dmac1 0xfd>, <&dmac1 0xfe>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 714>;
> + status = "disabled";
> + };
>
> - hscif1: serial@e62c8000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> + hscif0: serial@e62c0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 717>;
> + status = "disabled";
> + };
>
> - hscif2: serial@e62d0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62d0000 0 96>;
> - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> - <&dmac1 0x3b>, <&dmac1 0x3c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 713>;
> - status = "disabled";
> - };
> + hscif1: serial@e62c8000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 716>;
> + status = "disabled";
> + };
>
> - icram0: sram@e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> + hscif2: serial@e62d0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62d0000 0 96>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> + <&dmac1 0x3b>, <&dmac1 0x3c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 713>;
> + status = "disabled";
> + };
>
> - icram1: sram@e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> + icram0: sram@e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
>
> - smp-sram@0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> + icram1: sram@e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram@0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
> - };
>
> - ether: ethernet@ee700000 {
> - compatible = "renesas,ether-r8a7794",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + ether: ethernet@ee700000 {
> + compatible = "renesas,ether-r8a7794",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - avb: ethernet@e6800000 {
> - compatible = "renesas,etheravb-r8a7794",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + avb: ethernet@e6800000 {
> + compatible = "renesas,etheravb-r8a7794",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - /* The memory map in the User's Manual maps the cores to bus numbers */
> - i2c0: i2c@e6508000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + /* The memory map in the User's Manual maps the cores to
> + * bus numbers
> + */
> + i2c0: i2c@e6508000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c1: i2c@e6518000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c1: i2c@e6518000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c2: i2c@e6530000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c2: i2c@e6530000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c3: i2c@e6540000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c3: i2c@e6540000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c4: i2c@e6520000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c4: i2c@e6520000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 927>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c5: i2c@e6528000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c5: i2c@e6528000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 925>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c6: i2c@e6500000 {
> - compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + i2c6: i2c@e6500000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 318>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - i2c7: i2c@e6510000 {
> - compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + i2c7: i2c@e6510000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 323>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - mmcif0: mmc@ee200000 {
> - compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> + mmcif0: mmc@ee200000 {
> + compatible = "renesas,mmcif-r8a7794",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
>
> - sdhi0: sd@ee100000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> + sdhi0: sd@ee100000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
>
> - sdhi1: sd@ee140000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> - };
> + sdhi1: sd@ee140000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
>
> - sdhi2: sd@ee160000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> - };
> + sdhi2: sd@ee160000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
>
> - qspi: spi@e6b10000 {
> - compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + qspi: spi@e6b10000 {
> + compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - vin0: video@e6ef0000 {
> - compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> + vin0: video@e6ef0000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> + status = "disabled";
> + };
>
> - vin1: video@e6ef1000 {
> - compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> + vin1: video@e6ef1000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> + status = "disabled";
> + };
>
> - pci0: pci@ee090000 {
> - compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee090000 0 0xc00>,
> - <0 0xee080000 0 0x1100>;
> - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <0 0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb@1,0 {
> - reg = <0x800 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> + pci0: pci@ee090000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee090000 0 0xc00>,
> + <0 0xee080000 0 0x1100>;
> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb@1,0 {
> + reg = <0x800 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> +
> + usb@2,0 {
> + reg = <0x1000 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> };
>
> - usb@2,0 {
> - reg = <0x1000 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> + pci1: pci@ee0d0000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee0d0000 0 0xc00>,
> + <0 0xee0c0000 0 0x1100>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <1 1>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb@1,0 {
> + reg = <0x10800 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> +
> + usb@2,0 {
> + reg = <0x11000 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> };
> - };
>
> - pci1: pci@ee0d0000 {
> - compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee0d0000 0 0xc00>,
> - <0 0xee0c0000 0 0x1100>;
> - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <1 1>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb@1,0 {
> - reg = <0x10800 0 0 0 0>;
> - phys = <&usb2 0>;
> + hsusb: usb@e6590000 {
> + compatible = "renesas,usbhs-r8a7794",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> phy-names = "usb";
> + status = "disabled";
> };
>
> - usb@2,0 {
> - reg = <0x11000 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> + usbphy: usb-phy@e6590100 {
> + compatible = "renesas,usb-phy-r8a7794",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + status = "disabled";
> +
> + usb0: usb-channel@0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel@2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> };
> - };
>
> - hsusb: usb@e6590000 {
> - compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> - status = "disabled";
> - };
> + vsp@fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
>
> - usbphy: usb-phy@e6590100 {
> - compatible = "renesas,usb-phy-r8a7794",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - status = "disabled";
> + vsp@fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
>
> - usb0: usb-channel@0 {
> - reg = <0>;
> - #phy-cells = <1>;
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7794";
> + reg = <0 0xfeb00000 0 0x40000>;
> + reg-names = "du";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> + clock-names = "du.0", "du.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb0: endpoint {
> + };
> + };
> + port@1 {
> + reg = <1>;
> + du_out_rgb1: endpoint {
> + };
> + };
> + };
> };
> - usb2: usb-channel@2 {
> - reg = <2>;
> - #phy-cells = <1>;
> +
> + can0: can@e6e80000 {
> + compatible = "renesas,can-r8a7794",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 916>;
> + status = "disabled";
> };
> - };
>
> - vsp@fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> - };
> + can1: can@e6e88000 {
> + compatible = "renesas,can-r8a7794",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 915>;
> + status = "disabled";
> + };
>
> - vsp@fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7794-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
>
> - du: display@feb00000 {
> - compatible = "renesas,du-r8a7794";
> - reg = <0 0xfeb00000 0 0x40000>;
> - reg-names = "du";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> - clock-names = "du.0", "du.1";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> + rst: reset-controller@e6160000 {
> + compatible = "renesas,r8a7794-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
>
> - port@0 {
> - reg = <0>;
> - du_out_rgb0: endpoint {
> + prr: chipid@ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a7794-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + ipmmu_sy0: mmu@e6280000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_sy1: mmu@e6290000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_ds: mmu@e6740000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu@ec680000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu@fe951000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_gp: mmu@e62a0000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + rcar_sound: sound@ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7794",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
> + <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
> + <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
> + <&cpg CPG_CORE R8A7794_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.6", "src.5", "src.4", "src.3",
> + "src.2", "src.1",
> + "ctu.0", "ctu.1",
> + "mix.0", "mix.1",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
> +
> + status = "disabled";
> +
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma0 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma0 0xbe>;
> + dma-names = "tx";
> };
> };
> - port@1 {
> - reg = <1>;
> - du_out_rgb1: endpoint {
> +
> + rcar_sound,mix {
> + mix0: mix-0 { };
> + mix1: mix-1 { };
> + };
> +
> + rcar_sound,ctu {
> + ctu00: ctu-0 { };
> + ctu01: ctu-1 { };
> + ctu02: ctu-2 { };
> + ctu03: ctu-3 { };
> + ctu10: ctu-4 { };
> + ctu11: ctu-5 { };
> + ctu12: ctu-6 { };
> + ctu13: ctu-7 { };
> + };
> +
> + rcar_sound,src {
> + src-0 {
> + status = "disabled";
> + };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma0 0x9c>;
> + dma-names = "rx", "tx";
> + };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma0 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma0 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma0 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma0 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma0 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + };
> +
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma0 0x02>,
> + <&audma0 0x15>, <&audma0 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma0 0x04>,
> + <&audma0 0x49>, <&audma0 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma0 0x06>,
> + <&audma0 0x63>, <&audma0 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma0 0x08>,
> + <&audma0 0x6f>, <&audma0 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma0 0x0a>,
> + <&audma0 0x71>, <&audma0 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma0 0x0c>,
> + <&audma0 0x73>, <&audma0 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma0 0x0e>,
> + <&audma0 0x75>, <&audma0 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma0 0x10>,
> + <&audma0 0x79>, <&audma0 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma0 0x12>,
> + <&audma0 0x7b>, <&audma0 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma0 0x14>,
> + <&audma0 0x7d>, <&audma0 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> };
> };
> };
> };
>
> - can0: can@e6e80000 {
> - compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - can1: can@e6e88000 {
> - compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> - };
>
> /* External root clock */
> extal_clk: extal {
> @@ -1098,259 +1405,4 @@
> #clock-cells = <0>;
> clock-frequency = <0>;
> };
> -
> - cpg: clock-controller@e6150000 {
> - compatible = "renesas,r8a7794-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - rst: reset-controller@e6160000 {
> - compatible = "renesas,r8a7794-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid@ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller@e6180000 {
> - compatible = "renesas,r8a7794-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu@e6280000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu@e6290000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu@e6740000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu@ec680000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu@fe951000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_gp: mmu@e62a0000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - rcar_sound: sound@ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7794",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> -
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
> - <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
> - <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
> - <&cpg CPG_CORE R8A7794_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> - "src.6", "src.5", "src.4", "src.3", "src.2",
> - "src.1",
> - "ctu.0", "ctu.1",
> - "mix.0", "mix.1",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
> -
> - status = "disabled";
> -
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma0 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma0 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,mix {
> - mix0: mix-0 { };
> - mix1: mix-1 { };
> - };
> -
> - rcar_sound,ctu {
> - ctu00: ctu-0 { };
> - ctu01: ctu-1 { };
> - ctu02: ctu-2 { };
> - ctu03: ctu-3 { };
> - ctu10: ctu-4 { };
> - ctu11: ctu-5 { };
> - ctu12: ctu-6 { };
> - ctu13: ctu-7 { };
> - };
> -
> - rcar_sound,src {
> - src-0 {
> - status = "disabled";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma0 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma0 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma0 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma0 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma0 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma0 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - };
> -
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma0 0x02>,
> - <&audma0 0x15>, <&audma0 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma0 0x04>,
> - <&audma0 0x49>, <&audma0 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma0 0x06>,
> - <&audma0 0x63>, <&audma0 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma0 0x08>,
> - <&audma0 0x6f>, <&audma0 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma0 0x0a>,
> - <&audma0 0x71>, <&audma0 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma0 0x0c>,
> - <&audma0 0x73>, <&audma0 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma0 0x0e>,
> - <&audma0 0x75>, <&audma0 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma0 0x10>,
> - <&audma0 0x79>, <&audma0 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma0 0x12>,
> - <&audma0 0x7b>, <&audma0 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma0 0x14>,
> - <&audma0 0x7d>, <&audma0 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - };
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 14/16] ARM: dts: r8a7794: add soc node
@ 2018-01-18 2:00 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 2:00 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:15 +0100, Simon Horman wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Same comment as to 02/16.
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 2358 ++++++++++++++++++++--------------------
> 1 file changed, 1205 insertions(+), 1153 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 79263377ded3..0d65069b1a89 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -16,7 +16,6 @@
>
> / {
> compatible = "renesas,r8a7794";
> - interrupt-parent = <&gic>;
> #address-cells = <2>;
> #size-cells = <2>;
>
> @@ -67,985 +66,1293 @@
> };
> };
>
> - apmu at e6151000 {
> - compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> + soc {
> + compatible = "simple-bus";
> + interrupt-parent = <&gic>;
>
> - gic: interrupt-controller at f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> - gpio0: gpio at e6050000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6050000 0 0x50>;
> - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 0 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 912>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 912>;
> - };
> + apmu at e6151000 {
> + compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
>
> - gpio1: gpio at e6051000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6051000 0 0x50>;
> - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 32 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 911>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 911>;
> - };
> + gic: interrupt-controller at f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
>
> - gpio2: gpio at e6052000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6052000 0 0x50>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 64 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 910>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 910>;
> - };
> + gpio0: gpio at e6050000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6050000 0 0x50>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 0 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 912>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 912>;
> + };
>
> - gpio3: gpio at e6053000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6053000 0 0x50>;
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 96 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 909>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 909>;
> - };
> + gpio1: gpio at e6051000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6051000 0 0x50>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 32 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 911>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 911>;
> + };
>
> - gpio4: gpio at e6054000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6054000 0 0x50>;
> - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 128 32>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 908>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 908>;
> - };
> + gpio2: gpio at e6052000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6052000 0 0x50>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 64 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 910>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 910>;
> + };
>
> - gpio5: gpio at e6055000 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055000 0 0x50>;
> - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 160 28>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 907>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 907>;
> - };
> + gpio3: gpio at e6053000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6053000 0 0x50>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 96 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 909>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 909>;
> + };
>
> - gpio6: gpio at e6055400 {
> - compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
> - reg = <0 0xe6055400 0 0x50>;
> - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - gpio-ranges = <&pfc 0 192 26>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - clocks = <&cpg CPG_MOD 905>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 905>;
> - };
> + gpio4: gpio at e6054000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6054000 0 0x50>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 128 32>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 908>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 908>;
> + };
>
> - cmt0: timer at ffca0000 {
> - compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> -
> - status = "disabled";
> - };
> + gpio5: gpio at e6055000 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055000 0 0x50>;
> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 160 28>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 907>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 907>;
> + };
>
> - cmt1: timer at e6130000 {
> - compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> -
> - status = "disabled";
> - };
> + gpio6: gpio at e6055400 {
> + compatible = "renesas,gpio-r8a7794",
> + "renesas,rcar-gen2-gpio";
> + reg = <0 0xe6055400 0 0x50>;
> + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-ranges = <&pfc 0 192 26>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + clocks = <&cpg CPG_MOD 905>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 905>;
> + };
>
> - timer {
> - compatible = "arm,armv7-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> - };
> + cmt0: timer at ffca0000 {
> + compatible = "renesas,r8a7794-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
>
> - irqc0: interrupt-controller at e61c0000 {
> - compatible = "renesas,irqc-r8a7794", "renesas,irqc";
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - reg = <0 0xe61c0000 0 0x200>;
> - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 407>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 407>;
> - };
> + cmt1: timer at e6130000 {
> + compatible = "renesas,r8a7794-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
>
> - pfc: pin-controller at e6060000 {
> - compatible = "renesas,pfc-r8a7794";
> - reg = <0 0xe6060000 0 0x11c>;
> - };
> + irqc0: interrupt-controller at e61c0000 {
> + compatible = "renesas,irqc-r8a7794", "renesas,irqc";
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <0 0xe61c0000 0 0x200>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 407>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 407>;
> + };
>
> - dmac0: dma-controller at e6700000 {
> - compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + pfc: pin-controller at e6060000 {
> + compatible = "renesas,pfc-r8a7794";
> + reg = <0 0xe6060000 0 0x11c>;
> + };
>
> - dmac1: dma-controller at e6720000 {
> - compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> - };
> + dmac0: dma-controller at e6700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - audma0: dma-controller at ec700000 {
> - compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
> - "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> - };
> + dmac1: dma-controller at e6720000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> + };
>
> - scifa0: serial at e6c40000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> - status = "disabled";
> - };
> + audma0: dma-controller at ec700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3", "ch4",
> + "ch5", "ch6", "ch7", "ch8", "ch9",
> + "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
>
> - scifa1: serial at e6c50000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> - status = "disabled";
> - };
> + scifa0: serial at e6c40000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 204>;
> + status = "disabled";
> + };
>
> - scifa2: serial at e6c60000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> - };
> + scifa1: serial at e6c50000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 203>;
> + status = "disabled";
> + };
>
> - scifa3: serial at e6c70000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c70000 0 64>;
> - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1106>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> - <&dmac1 0x1b>, <&dmac1 0x1c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1106>;
> - status = "disabled";
> - };
> + scifa2: serial at e6c60000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 202>;
> + status = "disabled";
> + };
>
> - scifa4: serial at e6c78000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c78000 0 64>;
> - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1107>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> - <&dmac1 0x1f>, <&dmac1 0x20>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1107>;
> - status = "disabled";
> - };
> + scifa3: serial at e6c70000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c70000 0 64>;
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1106>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> + <&dmac1 0x1b>, <&dmac1 0x1c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1106>;
> + status = "disabled";
> + };
>
> - scifa5: serial at e6c80000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c80000 0 64>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1108>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> - <&dmac1 0x23>, <&dmac1 0x24>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1108>;
> - status = "disabled";
> - };
> + scifa4: serial at e6c78000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c78000 0 64>;
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1107>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> + <&dmac1 0x1f>, <&dmac1 0x20>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1107>;
> + status = "disabled";
> + };
>
> - scifb0: serial at e6c20000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> - status = "disabled";
> - };
> + scifa5: serial at e6c80000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c80000 0 64>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1108>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> + <&dmac1 0x23>, <&dmac1 0x24>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1108>;
> + status = "disabled";
> + };
>
> - scifb1: serial at e6c30000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> - status = "disabled";
> - };
> + scifb0: serial at e6c20000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 206>;
> + status = "disabled";
> + };
>
> - scifb2: serial at e6ce0000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> - status = "disabled";
> - };
> + scifb1: serial at e6c30000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 207>;
> + status = "disabled";
> + };
>
> - scif0: serial at e6e60000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> - status = "disabled";
> - };
> + scifb2: serial at e6ce0000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 216>;
> + status = "disabled";
> + };
>
> - scif1: serial at e6e68000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> - status = "disabled";
> - };
> + scif0: serial at e6e60000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 721>;
> + status = "disabled";
> + };
>
> - scif2: serial at e6e58000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e58000 0 64>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 719>;
> - status = "disabled";
> - };
> + scif1: serial at e6e68000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 720>;
> + status = "disabled";
> + };
>
> - scif3: serial at e6ea8000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ea8000 0 64>;
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> - <&dmac1 0x2f>, <&dmac1 0x30>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 718>;
> - status = "disabled";
> - };
> + scif2: serial at e6e58000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e58000 0 64>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 719>;
> + status = "disabled";
> + };
>
> - scif4: serial at e6ee0000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee0000 0 64>;
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> - <&dmac1 0xfb>, <&dmac1 0xfc>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 715>;
> - status = "disabled";
> - };
> + scif3: serial at e6ea8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ea8000 0 64>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> + <&dmac1 0x2f>, <&dmac1 0x30>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 718>;
> + status = "disabled";
> + };
>
> - scif5: serial at e6ee8000 {
> - compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6ee8000 0 64>;
> - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> - <&dmac1 0xfd>, <&dmac1 0xfe>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 714>;
> - status = "disabled";
> - };
> + scif4: serial at e6ee0000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee0000 0 64>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> + <&dmac1 0xfb>, <&dmac1 0xfc>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 715>;
> + status = "disabled";
> + };
>
> - hscif0: serial at e62c0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> + scif5: serial at e6ee8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee8000 0 64>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> + <&dmac1 0xfd>, <&dmac1 0xfe>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 714>;
> + status = "disabled";
> + };
>
> - hscif1: serial at e62c8000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> + hscif0: serial at e62c0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 717>;
> + status = "disabled";
> + };
>
> - hscif2: serial at e62d0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62d0000 0 96>;
> - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> - <&dmac1 0x3b>, <&dmac1 0x3c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 713>;
> - status = "disabled";
> - };
> + hscif1: serial at e62c8000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 716>;
> + status = "disabled";
> + };
>
> - icram0: sram at e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> + hscif2: serial at e62d0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62d0000 0 96>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> + <&dmac1 0x3b>, <&dmac1 0x3c>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 713>;
> + status = "disabled";
> + };
>
> - icram1: sram at e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> + icram0: sram at e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> + };
>
> - smp-sram at 0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> + icram1: sram at e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram at 0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
> - };
>
> - ether: ethernet at ee700000 {
> - compatible = "renesas,ether-r8a7794",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + ether: ethernet at ee700000 {
> + compatible = "renesas,ether-r8a7794",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - avb: ethernet at e6800000 {
> - compatible = "renesas,etheravb-r8a7794",
> - "renesas,etheravb-rcar-gen2";
> - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 812>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 812>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + avb: ethernet at e6800000 {
> + compatible = "renesas,etheravb-r8a7794",
> + "renesas,etheravb-rcar-gen2";
> + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 812>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - /* The memory map in the User's Manual maps the cores to bus numbers */
> - i2c0: i2c at e6508000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + /* The memory map in the User's Manual maps the cores to
> + * bus numbers
> + */
> + i2c0: i2c at e6508000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c1: i2c at e6518000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c1: i2c at e6518000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c2: i2c at e6530000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c2: i2c at e6530000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c3: i2c at e6540000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c3: i2c at e6540000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c4: i2c at e6520000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c4: i2c at e6520000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 927>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c5: i2c at e6528000 {
> - compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> - status = "disabled";
> - };
> + i2c5: i2c at e6528000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 925>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
>
> - i2c6: i2c at e6500000 {
> - compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + i2c6: i2c at e6500000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 318>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - i2c7: i2c at e6510000 {
> - compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + i2c7: i2c at e6510000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 323>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - mmcif0: mmc at ee200000 {
> - compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> + mmcif0: mmc at ee200000 {
> + compatible = "renesas,mmcif-r8a7794",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
>
> - sdhi0: sd at ee100000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> - status = "disabled";
> - };
> + sdhi0: sd at ee100000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
>
> - sdhi1: sd at ee140000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> - status = "disabled";
> - };
> + sdhi1: sd at ee140000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
>
> - sdhi2: sd at ee160000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> - dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> - status = "disabled";
> - };
> + sdhi2: sd at ee160000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
>
> - qspi: spi at e6b10000 {
> - compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> + qspi: spi at e6b10000 {
> + compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
>
> - vin0: video at e6ef0000 {
> - compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> - status = "disabled";
> - };
> + vin0: video at e6ef0000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> + status = "disabled";
> + };
>
> - vin1: video at e6ef1000 {
> - compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> - status = "disabled";
> - };
> + vin1: video at e6ef1000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> + status = "disabled";
> + };
>
> - pci0: pci at ee090000 {
> - compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee090000 0 0xc00>,
> - <0 0xee080000 0 0x1100>;
> - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <0 0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb at 1,0 {
> - reg = <0x800 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> + pci0: pci at ee090000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee090000 0 0xc00>,
> + <0 0xee080000 0 0x1100>;
> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb at 1,0 {
> + reg = <0x800 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> +
> + usb at 2,0 {
> + reg = <0x1000 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> };
>
> - usb at 2,0 {
> - reg = <0x1000 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> + pci1: pci at ee0d0000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee0d0000 0 0xc00>,
> + <0 0xee0c0000 0 0x1100>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <1 1>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb at 1,0 {
> + reg = <0x10800 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> +
> + usb at 2,0 {
> + reg = <0x11000 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> };
> - };
>
> - pci1: pci at ee0d0000 {
> - compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee0d0000 0 0xc00>,
> - <0 0xee0c0000 0 0x1100>;
> - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <1 1>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb at 1,0 {
> - reg = <0x10800 0 0 0 0>;
> - phys = <&usb2 0>;
> + hsusb: usb at e6590000 {
> + compatible = "renesas,usbhs-r8a7794",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> phy-names = "usb";
> + status = "disabled";
> };
>
> - usb at 2,0 {
> - reg = <0x11000 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> + usbphy: usb-phy at e6590100 {
> + compatible = "renesas,usb-phy-r8a7794",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + status = "disabled";
> +
> + usb0: usb-channel at 0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel at 2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> };
> - };
>
> - hsusb: usb at e6590000 {
> - compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> - status = "disabled";
> - };
> + vsp at fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
>
> - usbphy: usb-phy at e6590100 {
> - compatible = "renesas,usb-phy-r8a7794",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - status = "disabled";
> + vsp at fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
>
> - usb0: usb-channel at 0 {
> - reg = <0>;
> - #phy-cells = <1>;
> + du: display at feb00000 {
> + compatible = "renesas,du-r8a7794";
> + reg = <0 0xfeb00000 0 0x40000>;
> + reg-names = "du";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> + clock-names = "du.0", "du.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + du_out_rgb0: endpoint {
> + };
> + };
> + port at 1 {
> + reg = <1>;
> + du_out_rgb1: endpoint {
> + };
> + };
> + };
> };
> - usb2: usb-channel at 2 {
> - reg = <2>;
> - #phy-cells = <1>;
> +
> + can0: can at e6e80000 {
> + compatible = "renesas,can-r8a7794",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 916>;
> + status = "disabled";
> };
> - };
>
> - vsp at fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> - };
> + can1: can at e6e88000 {
> + compatible = "renesas,can-r8a7794",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> + <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 915>;
> + status = "disabled";
> + };
>
> - vsp at fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> + cpg: clock-controller at e6150000 {
> + compatible = "renesas,r8a7794-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
>
> - du: display at feb00000 {
> - compatible = "renesas,du-r8a7794";
> - reg = <0 0xfeb00000 0 0x40000>;
> - reg-names = "du";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> - clock-names = "du.0", "du.1";
> - status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> + rst: reset-controller at e6160000 {
> + compatible = "renesas,r8a7794-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
>
> - port at 0 {
> - reg = <0>;
> - du_out_rgb0: endpoint {
> + prr: chipid at ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7794-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> + };
> +
> + ipmmu_sy0: mmu at e6280000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_sy1: mmu at e6290000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_ds: mmu at e6740000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mp: mmu at ec680000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_mx: mmu at fe951000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + ipmmu_gp: mmu at e62a0000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> + };
> +
> + rcar_sound: sound at ec500000 {
> + /*
> + * #sound-dai-cells is required
> + *
> + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> + */
> + compatible = "renesas,rcar_sound-r8a7794",
> + "renesas,rcar_sound-gen2";
> + reg = <0 0xec500000 0 0x1000>, /* SCU */
> + <0 0xec5a0000 0 0x100>, /* ADG */
> + <0 0xec540000 0 0x1000>, /* SSIU */
> + <0 0xec541000 0 0x280>, /* SSI */
> + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> + clocks = <&cpg CPG_MOD 1005>,
> + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> + <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
> + <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
> + <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> + <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
> + <&cpg CPG_CORE R8A7794_CLK_M2>;
> + clock-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0",
> + "src.6", "src.5", "src.4", "src.3",
> + "src.2", "src.1",
> + "ctu.0", "ctu.1",
> + "mix.0", "mix.1",
> + "dvc.0", "dvc.1",
> + "clk_a", "clk_b", "clk_c", "clk_i";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 1005>,
> + <&cpg 1006>, <&cpg 1007>,
> + <&cpg 1008>, <&cpg 1009>,
> + <&cpg 1010>, <&cpg 1011>,
> + <&cpg 1012>, <&cpg 1013>,
> + <&cpg 1014>, <&cpg 1015>;
> + reset-names = "ssi-all",
> + "ssi.9", "ssi.8", "ssi.7", "ssi.6",
> + "ssi.5", "ssi.4", "ssi.3", "ssi.2",
> + "ssi.1", "ssi.0";
> +
> + status = "disabled";
> +
> + rcar_sound,dvc {
> + dvc0: dvc-0 {
> + dmas = <&audma0 0xbc>;
> + dma-names = "tx";
> + };
> + dvc1: dvc-1 {
> + dmas = <&audma0 0xbe>;
> + dma-names = "tx";
> };
> };
> - port at 1 {
> - reg = <1>;
> - du_out_rgb1: endpoint {
> +
> + rcar_sound,mix {
> + mix0: mix-0 { };
> + mix1: mix-1 { };
> + };
> +
> + rcar_sound,ctu {
> + ctu00: ctu-0 { };
> + ctu01: ctu-1 { };
> + ctu02: ctu-2 { };
> + ctu03: ctu-3 { };
> + ctu10: ctu-4 { };
> + ctu11: ctu-5 { };
> + ctu12: ctu-6 { };
> + ctu13: ctu-7 { };
> + };
> +
> + rcar_sound,src {
> + src-0 {
> + status = "disabled";
> + };
> + src1: src-1 {
> + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x87>, <&audma0 0x9c>;
> + dma-names = "rx", "tx";
> + };
> + src2: src-2 {
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x89>, <&audma0 0x9e>;
> + dma-names = "rx", "tx";
> + };
> + src3: src-3 {
> + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8b>, <&audma0 0xa0>;
> + dma-names = "rx", "tx";
> + };
> + src4: src-4 {
> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8d>, <&audma0 0xb0>;
> + dma-names = "rx", "tx";
> + };
> + src5: src-5 {
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x8f>, <&audma0 0xb2>;
> + dma-names = "rx", "tx";
> + };
> + src6: src-6 {
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x91>, <&audma0 0xb4>;
> + dma-names = "rx", "tx";
> + };
> + };
> +
> + rcar_sound,ssi {
> + ssi0: ssi-0 {
> + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x01>, <&audma0 0x02>,
> + <&audma0 0x15>, <&audma0 0x16>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi1: ssi-1 {
> + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x03>, <&audma0 0x04>,
> + <&audma0 0x49>, <&audma0 0x4a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi2: ssi-2 {
> + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x05>, <&audma0 0x06>,
> + <&audma0 0x63>, <&audma0 0x64>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi3: ssi-3 {
> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x07>, <&audma0 0x08>,
> + <&audma0 0x6f>, <&audma0 0x70>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi4: ssi-4 {
> + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x09>, <&audma0 0x0a>,
> + <&audma0 0x71>, <&audma0 0x72>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi5: ssi-5 {
> + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0b>, <&audma0 0x0c>,
> + <&audma0 0x73>, <&audma0 0x74>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi6: ssi-6 {
> + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0d>, <&audma0 0x0e>,
> + <&audma0 0x75>, <&audma0 0x76>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi7: ssi-7 {
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x0f>, <&audma0 0x10>,
> + <&audma0 0x79>, <&audma0 0x7a>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi8: ssi-8 {
> + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x11>, <&audma0 0x12>,
> + <&audma0 0x7b>, <&audma0 0x7c>;
> + dma-names = "rx", "tx", "rxu", "txu";
> + };
> + ssi9: ssi-9 {
> + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&audma0 0x13>, <&audma0 0x14>,
> + <&audma0 0x7d>, <&audma0 0x7e>;
> + dma-names = "rx", "tx", "rxu", "txu";
> };
> };
> };
> };
>
> - can0: can at e6e80000 {
> - compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e80000 0 0x1000>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 916>;
> - status = "disabled";
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
> + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - can1: can at e6e88000 {
> - compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
> - reg = <0 0xe6e88000 0 0x1000>;
> - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
> - <&can_clk>;
> - clock-names = "clkp1", "clkp2", "can_clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 915>;
> - status = "disabled";
> - };
>
> /* External root clock */
> extal_clk: extal {
> @@ -1098,259 +1405,4 @@
> #clock-cells = <0>;
> clock-frequency = <0>;
> };
> -
> - cpg: clock-controller at e6150000 {
> - compatible = "renesas,r8a7794-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - rst: reset-controller at e6160000 {
> - compatible = "renesas,r8a7794-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid at ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller at e6180000 {
> - compatible = "renesas,r8a7794-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu at e6280000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu at e6290000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu at e6740000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu at ec680000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu at fe951000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_gp: mmu at e62a0000 {
> - compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - rcar_sound: sound at ec500000 {
> - /*
> - * #sound-dai-cells is required
> - *
> - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> - */
> - compatible = "renesas,rcar_sound-r8a7794",
> - "renesas,rcar_sound-gen2";
> - reg = <0 0xec500000 0 0x1000>, /* SCU */
> - <0 0xec5a0000 0 0x100>, /* ADG */
> - <0 0xec540000 0 0x1000>, /* SSIU */
> - <0 0xec541000 0 0x280>, /* SSI */
> - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
> - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> -
> - clocks = <&cpg CPG_MOD 1005>,
> - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
> - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
> - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
> - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
> - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
> - <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
> - <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
> - <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
> - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
> - <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
> - <&cpg CPG_CORE R8A7794_CLK_M2>;
> - clock-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> - "src.6", "src.5", "src.4", "src.3", "src.2",
> - "src.1",
> - "ctu.0", "ctu.1",
> - "mix.0", "mix.1",
> - "dvc.0", "dvc.1",
> - "clk_a", "clk_b", "clk_c", "clk_i";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1005>,
> - <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
> - <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
> - <&cpg 1014>, <&cpg 1015>;
> - reset-names = "ssi-all",
> - "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> - "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
> -
> - status = "disabled";
> -
> - rcar_sound,dvc {
> - dvc0: dvc-0 {
> - dmas = <&audma0 0xbc>;
> - dma-names = "tx";
> - };
> - dvc1: dvc-1 {
> - dmas = <&audma0 0xbe>;
> - dma-names = "tx";
> - };
> - };
> -
> - rcar_sound,mix {
> - mix0: mix-0 { };
> - mix1: mix-1 { };
> - };
> -
> - rcar_sound,ctu {
> - ctu00: ctu-0 { };
> - ctu01: ctu-1 { };
> - ctu02: ctu-2 { };
> - ctu03: ctu-3 { };
> - ctu10: ctu-4 { };
> - ctu11: ctu-5 { };
> - ctu12: ctu-6 { };
> - ctu13: ctu-7 { };
> - };
> -
> - rcar_sound,src {
> - src-0 {
> - status = "disabled";
> - };
> - src1: src-1 {
> - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x87>, <&audma0 0x9c>;
> - dma-names = "rx", "tx";
> - };
> - src2: src-2 {
> - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x89>, <&audma0 0x9e>;
> - dma-names = "rx", "tx";
> - };
> - src3: src-3 {
> - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8b>, <&audma0 0xa0>;
> - dma-names = "rx", "tx";
> - };
> - src4: src-4 {
> - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8d>, <&audma0 0xb0>;
> - dma-names = "rx", "tx";
> - };
> - src5: src-5 {
> - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x8f>, <&audma0 0xb2>;
> - dma-names = "rx", "tx";
> - };
> - src6: src-6 {
> - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x91>, <&audma0 0xb4>;
> - dma-names = "rx", "tx";
> - };
> - };
> -
> - rcar_sound,ssi {
> - ssi0: ssi-0 {
> - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x01>, <&audma0 0x02>,
> - <&audma0 0x15>, <&audma0 0x16>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi1: ssi-1 {
> - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x03>, <&audma0 0x04>,
> - <&audma0 0x49>, <&audma0 0x4a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi2: ssi-2 {
> - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x05>, <&audma0 0x06>,
> - <&audma0 0x63>, <&audma0 0x64>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi3: ssi-3 {
> - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x07>, <&audma0 0x08>,
> - <&audma0 0x6f>, <&audma0 0x70>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi4: ssi-4 {
> - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x09>, <&audma0 0x0a>,
> - <&audma0 0x71>, <&audma0 0x72>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi5: ssi-5 {
> - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0b>, <&audma0 0x0c>,
> - <&audma0 0x73>, <&audma0 0x74>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi6: ssi-6 {
> - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0d>, <&audma0 0x0e>,
> - <&audma0 0x75>, <&audma0 0x76>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi7: ssi-7 {
> - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x0f>, <&audma0 0x10>,
> - <&audma0 0x79>, <&audma0 0x7a>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi8: ssi-8 {
> - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x11>, <&audma0 0x12>,
> - <&audma0 0x7b>, <&audma0 0x7c>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - ssi9: ssi-9 {
> - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&audma0 0x13>, <&audma0 0x14>,
> - <&audma0 0x7d>, <&audma0 0x7e>;
> - dma-names = "rx", "tx", "rxu", "txu";
> - };
> - };
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 15/16] ARM: dts: r8a7794: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 2:11 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 2:11 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:16 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 1525 ++++++++++++++++++++--------------------
> 1 file changed, 762 insertions(+), 763 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 0d65069b1a89..9e5f886f53c5 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -74,28 +74,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu@e6151000 {
> - compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> -
> - gic: interrupt-controller@f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> gpio0: gpio@e6050000 {
> compatible = "renesas,gpio-r8a7794",
> "renesas,rcar-gen2-gpio";
> @@ -201,38 +179,36 @@
> resets = <&cpg 905>;
> };
>
> - cmt0: timer@ffca0000 {
> - compatible = "renesas,r8a7794-cmt0",
> - "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7794";
> + reg = <0 0xe6060000 0 0x11c>;
> + };
>
> - status = "disabled";
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7794-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> };
>
> - cmt1: timer@e6130000 {
> - compatible = "renesas,r8a7794-cmt1",
> - "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> + apmu@e6151000 {
> + compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
>
> - status = "disabled";
> + rst: reset-controller@e6160000 {
> + compatible = "renesas,r8a7794-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller@e6180000 {
> + compatible = "renesas,r8a7794-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> };
>
> irqc0: interrupt-controller@e61c0000 {
> @@ -255,419 +231,303 @@
> resets = <&cpg 407>;
> };
>
> - pfc: pin-controller@e6060000 {
> - compatible = "renesas,pfc-r8a7794";
> - reg = <0 0xe6060000 0 0x11c>;
> + ipmmu_sy0: mmu@e6280000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - dmac0: dma-controller@e6700000 {
> - compatible = "renesas,dmac-r8a7794",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_sy1: mmu@e6290000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - dmac1: dma-controller@e6720000 {
> - compatible = "renesas,dmac-r8a7794",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_ds: mmu@e6740000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma0: dma-controller@ec700000 {
> - compatible = "renesas,dmac-r8a7794",
> - "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3", "ch4",
> - "ch5", "ch6", "ch7", "ch8", "ch9",
> - "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_mp: mmu@ec680000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - scifa0: serial@e6c40000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> + ipmmu_mx: mmu@fe951000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> status = "disabled";
> };
>
> - scifa1: serial@e6c50000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> + ipmmu_gp: mmu@e62a0000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> status = "disabled";
> };
>
> - scifa2: serial@e6c60000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> + icram0: sram@e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> };
>
> - scifa3: serial@e6c70000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c70000 0 64>;
> - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1106>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> - <&dmac1 0x1b>, <&dmac1 0x1c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1106>;
> - status = "disabled";
> + icram1: sram@e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram@0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
>
> - scifa4: serial@e6c78000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c78000 0 64>;
> - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1107>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> - <&dmac1 0x1f>, <&dmac1 0x20>;
> - dma-names = "tx", "rx", "tx", "rx";
> + /* The memory map in the User's Manual maps the cores to
> + * bus numbers
> + */
> + i2c0: i2c@e6508000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1107>;
> + resets = <&cpg 931>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifa5: serial@e6c80000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c80000 0 64>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1108>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> - <&dmac1 0x23>, <&dmac1 0x24>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c1: i2c@e6518000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1108>;
> + resets = <&cpg 930>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifb0: serial@e6c20000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c2: i2c@e6530000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> + resets = <&cpg 929>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifb1: serial@e6c30000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c3: i2c@e6540000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> + resets = <&cpg 928>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifb2: serial@e6ce0000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c4: i2c@e6520000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> + resets = <&cpg 927>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scif0: serial@e6e60000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c5: i2c@e6528000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> + resets = <&cpg 925>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scif1: serial@e6e68000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> + i2c6: i2c@e6500000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> + resets = <&cpg 318>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - scif2: serial@e6e58000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6e58000 0 64>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> + i2c7: i2c@e6510000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 719>;
> + resets = <&cpg 323>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - scif3: serial@e6ea8000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6ea8000 0 64>;
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> - <&dmac1 0x2f>, <&dmac1 0x30>;
> - dma-names = "tx", "rx", "tx", "rx";
> + hsusb: usb@e6590000 {
> + compatible = "renesas,usbhs-r8a7794",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 718>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> + phy-names = "usb";
> status = "disabled";
> };
>
> - scif4: serial@e6ee0000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6ee0000 0 64>;
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> - <&dmac1 0xfb>, <&dmac1 0xfc>;
> - dma-names = "tx", "rx", "tx", "rx";
> + usbphy: usb-phy@e6590100 {
> + compatible = "renesas,usb-phy-r8a7794",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 715>;
> + resets = <&cpg 704>;
> status = "disabled";
> +
> + usb0: usb-channel@0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel@2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> };
>
> - scif5: serial@e6ee8000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6ee8000 0 64>;
> - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> - <&dmac1 0xfd>, <&dmac1 0xfe>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 714>;
> - status = "disabled";
> - };
> -
> - hscif0: serial@e62c0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>,
> - <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> -
> - hscif1: serial@e62c8000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>,
> - <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> -
> - hscif2: serial@e62d0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62d0000 0 96>;
> - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> - <&dmac1 0x3b>, <&dmac1 0x3c>;
> - dma-names = "tx", "rx", "tx", "rx";
> + dmac0: dma-controller@e6700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 713>;
> - status = "disabled";
> - };
> -
> - icram0: sram@e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram@e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram@0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - ether: ethernet@ee700000 {
> - compatible = "renesas,ether-r8a7794",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> + dmac1: dma-controller@e6720000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> avb: ethernet@e6800000 {
> @@ -683,374 +543,301 @@
> status = "disabled";
> };
>
> - /* The memory map in the User's Manual maps the cores to
> - * bus numbers
> - */
> - i2c0: i2c@e6508000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> + qspi: spi@e6b10000 {
> + compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> #address-cells = <1>;
> #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - i2c1: i2c@e6518000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> + scifa0: serial@e6c40000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 204>;
> status = "disabled";
> };
>
> - i2c2: i2c@e6530000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> + scifa1: serial@e6c50000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 203>;
> status = "disabled";
> };
>
> - i2c3: i2c@e6540000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> + scifa2: serial@e6c60000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 202>;
> status = "disabled";
> };
>
> - i2c4: i2c@e6520000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> + scifa3: serial@e6c70000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c70000 0 64>;
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1106>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> + <&dmac1 0x1b>, <&dmac1 0x1c>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 1106>;
> status = "disabled";
> };
>
> - i2c5: i2c@e6528000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> + scifa4: serial@e6c78000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c78000 0 64>;
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1107>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> + <&dmac1 0x1f>, <&dmac1 0x20>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 1107>;
> status = "disabled";
> };
>
> - i2c6: i2c@e6500000 {
> - compatible = "renesas,iic-r8a7794",
> - "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> + scifa5: serial@e6c80000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c80000 0 64>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1108>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> + <&dmac1 0x23>, <&dmac1 0x24>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + resets = <&cpg 1108>;
> status = "disabled";
> };
>
> - i2c7: i2c@e6510000 {
> - compatible = "renesas,iic-r8a7794",
> - "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> + scifb0: serial@e6c20000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + resets = <&cpg 206>;
> status = "disabled";
> };
>
> - mmcif0: mmc@ee200000 {
> - compatible = "renesas,mmcif-r8a7794",
> - "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> + scifb1: serial@e6c30000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> + resets = <&cpg 207>;
> status = "disabled";
> };
>
> - sdhi0: sd@ee100000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> + scifb2: serial@e6ce0000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> + resets = <&cpg 216>;
> status = "disabled";
> };
>
> - sdhi1: sd@ee140000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> + scif0: serial@e6e60000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> + resets = <&cpg 721>;
> status = "disabled";
> };
>
> - sdhi2: sd@ee160000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> + scif1: serial@e6e68000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> + resets = <&cpg 720>;
> status = "disabled";
> };
>
> - qspi: spi@e6b10000 {
> - compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> + scif2: serial@e6e58000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e58000 0 64>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + resets = <&cpg 719>;
> status = "disabled";
> };
>
> - vin0: video@e6ef0000 {
> - compatible = "renesas,vin-r8a7794",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> + scif3: serial@e6ea8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ea8000 0 64>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> + <&dmac1 0x2f>, <&dmac1 0x30>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> + resets = <&cpg 718>;
> status = "disabled";
> };
>
> - vin1: video@e6ef1000 {
> - compatible = "renesas,vin-r8a7794",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> + scif4: serial@e6ee0000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee0000 0 64>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> + <&dmac1 0xfb>, <&dmac1 0xfc>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> + resets = <&cpg 715>;
> status = "disabled";
> };
>
> - pci0: pci@ee090000 {
> - compatible = "renesas,pci-r8a7794",
> - "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee090000 0 0xc00>,
> - <0 0xee080000 0 0x1100>;
> - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> + scif5: serial@e6ee8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee8000 0 64>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> + <&dmac1 0xfd>, <&dmac1 0xfe>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> + resets = <&cpg 714>;
> status = "disabled";
> -
> - bus-range = <0 0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb@1,0 {
> - reg = <0x800 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> -
> - usb@2,0 {
> - reg = <0x1000 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> };
>
> - pci1: pci@ee0d0000 {
> - compatible = "renesas,pci-r8a7794",
> - "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee0d0000 0 0xc00>,
> - <0 0xee0c0000 0 0x1100>;
> - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <1 1>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb@1,0 {
> - reg = <0x10800 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> -
> - usb@2,0 {
> - reg = <0x11000 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> - };
> -
> - hsusb: usb@e6590000 {
> - compatible = "renesas,usbhs-r8a7794",
> - "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> + hscif0: serial@e62c0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> + resets = <&cpg 717>;
> status = "disabled";
> };
>
> - usbphy: usb-phy@e6590100 {
> - compatible = "renesas,usb-phy-r8a7794",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> + hscif1: serial@e62c8000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> + resets = <&cpg 716>;
> status = "disabled";
> -
> - usb0: usb-channel@0 {
> - reg = <0>;
> - #phy-cells = <1>;
> - };
> - usb2: usb-channel@2 {
> - reg = <2>;
> - #phy-cells = <1>;
> - };
> - };
> -
> - vsp@fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> };
>
> - vsp@fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> + hscif2: serial@e62d0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62d0000 0 96>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> + <&dmac1 0x3b>, <&dmac1 0x3c>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> -
> - du: display@feb00000 {
> - compatible = "renesas,du-r8a7794";
> - reg = <0 0xfeb00000 0 0x40000>;
> - reg-names = "du";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> - clock-names = "du.0", "du.1";
> + resets = <&cpg 713>;
> status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - du_out_rgb0: endpoint {
> - };
> - };
> - port@1 {
> - reg = <1>;
> - du_out_rgb1: endpoint {
> - };
> - };
> - };
> };
>
> can0: can@e6e80000 {
> @@ -1079,87 +866,25 @@
> status = "disabled";
> };
>
> - cpg: clock-controller@e6150000 {
> - compatible = "renesas,r8a7794-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - rst: reset-controller@e6160000 {
> - compatible = "renesas,r8a7794-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid@ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller@e6180000 {
> - compatible = "renesas,r8a7794-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu@e6280000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu@e6290000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu@e6740000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu@ec680000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu@fe951000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin0: video@e6ef0000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> status = "disabled";
> };
>
> - ipmmu_gp: mmu@e62a0000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin1: video@e6ef1000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> status = "disabled";
> };
>
> @@ -1343,6 +1068,281 @@
> };
> };
> };
> +
> + audma0: dma-controller@ec700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3", "ch4",
> + "ch5", "ch6", "ch7", "ch8", "ch9",
> + "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
> +
> + pci0: pci@ee090000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee090000 0 0xc00>,
> + <0 0xee080000 0 0x1100>;
> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb@1,0 {
> + reg = <0x800 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> +
> + usb@2,0 {
> + reg = <0x1000 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + pci1: pci@ee0d0000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee0d0000 0 0xc00>,
> + <0 0xee0c0000 0 0x1100>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <1 1>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb@1,0 {
> + reg = <0x10800 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> +
> + usb@2,0 {
> + reg = <0x11000 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + sdhi0: sd@ee100000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + sdhi1: sd@ee140000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
> +
> + sdhi2: sd@ee160000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
> +
> + mmcif0: mmc@ee200000 {
> + compatible = "renesas,mmcif-r8a7794",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
> +
> + ether: ethernet@ee700000 {
> + compatible = "renesas,ether-r8a7794",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller@f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> + vsp@fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
> +
> + vsp@fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
> +
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7794";
> + reg = <0 0xfeb00000 0 0x40000>;
> + reg-names = "du";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> + clock-names = "du.0", "du.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb0: endpoint {
> + };
> + };
> + port@1 {
> + reg = <1>;
> + du_out_rgb1: endpoint {
> + };
> + };
> + };
> + };
> +
> + prr: chipid@ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + cmt0: timer@ffca0000 {
> + compatible = "renesas,r8a7794-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
> +
> + cmt1: timer@e6130000 {
> + compatible = "renesas,r8a7794-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
> };
>
> timer {
> @@ -1353,7 +1353,6 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> -
> /* External root clock */
> extal_clk: extal {
> compatible = "fixed-clock";
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 15/16] ARM: dts: r8a7794: sort subnodes of soc node
@ 2018-01-18 2:11 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 2:11 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your work.
On 2018-01-17 17:17:16 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 1525 ++++++++++++++++++++--------------------
> 1 file changed, 762 insertions(+), 763 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 0d65069b1a89..9e5f886f53c5 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -74,28 +74,6 @@
> #size-cells = <2>;
> ranges;
>
> - apmu at e6151000 {
> - compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> - reg = <0 0xe6151000 0 0x188>;
> - cpus = <&cpu0 &cpu1>;
> - };
> -
> - gic: interrupt-controller at f1001000 {
> - compatible = "arm,gic-400";
> - #interrupt-cells = <3>;
> - #address-cells = <0>;
> - interrupt-controller;
> - reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x2000>,
> - <0 0xf1004000 0 0x2000>,
> - <0 0xf1006000 0 0x2000>;
> - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> - clocks = <&cpg CPG_MOD 408>;
> - clock-names = "clk";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 408>;
> - };
> -
> gpio0: gpio at e6050000 {
> compatible = "renesas,gpio-r8a7794",
> "renesas,rcar-gen2-gpio";
> @@ -201,38 +179,36 @@
> resets = <&cpg 905>;
> };
>
> - cmt0: timer at ffca0000 {
> - compatible = "renesas,r8a7794-cmt0",
> - "renesas,rcar-gen2-cmt0";
> - reg = <0 0xffca0000 0 0x1004>;
> - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 124>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 124>;
> + pfc: pin-controller at e6060000 {
> + compatible = "renesas,pfc-r8a7794";
> + reg = <0 0xe6060000 0 0x11c>;
> + };
>
> - status = "disabled";
> + cpg: clock-controller at e6150000 {
> + compatible = "renesas,r8a7794-cpg-mssr";
> + reg = <0 0xe6150000 0 0x1000>;
> + clocks = <&extal_clk>, <&usb_extal_clk>;
> + clock-names = "extal", "usb_extal";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> };
>
> - cmt1: timer at e6130000 {
> - compatible = "renesas,r8a7794-cmt1",
> - "renesas,rcar-gen2-cmt1";
> - reg = <0 0xe6130000 0 0x1004>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 329>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 329>;
> + apmu at e6151000 {
> + compatible = "renesas,r8a7794-apmu", "renesas,apmu";
> + reg = <0 0xe6151000 0 0x188>;
> + cpus = <&cpu0 &cpu1>;
> + };
>
> - status = "disabled";
> + rst: reset-controller at e6160000 {
> + compatible = "renesas,r8a7794-rst";
> + reg = <0 0xe6160000 0 0x0100>;
> + };
> +
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7794-sysc";
> + reg = <0 0xe6180000 0 0x0200>;
> + #power-domain-cells = <1>;
> };
>
> irqc0: interrupt-controller at e61c0000 {
> @@ -255,419 +231,303 @@
> resets = <&cpg 407>;
> };
>
> - pfc: pin-controller at e6060000 {
> - compatible = "renesas,pfc-r8a7794";
> - reg = <0 0xe6060000 0 0x11c>;
> + ipmmu_sy0: mmu at e6280000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6280000 0 0x1000>;
> + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - dmac0: dma-controller at e6700000 {
> - compatible = "renesas,dmac-r8a7794",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6700000 0 0x20000>;
> - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 219>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 219>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_sy1: mmu at e6290000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6290000 0 0x1000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - dmac1: dma-controller at e6720000 {
> - compatible = "renesas,dmac-r8a7794",
> - "renesas,rcar-dmac";
> - reg = <0 0xe6720000 0 0x20000>;
> - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3",
> - "ch4", "ch5", "ch6", "ch7",
> - "ch8", "ch9", "ch10", "ch11",
> - "ch12", "ch13", "ch14";
> - clocks = <&cpg CPG_MOD 218>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 218>;
> - #dma-cells = <1>;
> - dma-channels = <15>;
> + ipmmu_ds: mmu at e6740000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe6740000 0 0x1000>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - audma0: dma-controller at ec700000 {
> - compatible = "renesas,dmac-r8a7794",
> - "renesas,rcar-dmac";
> - reg = <0 0xec700000 0 0x10000>;
> - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "error",
> - "ch0", "ch1", "ch2", "ch3", "ch4",
> - "ch5", "ch6", "ch7", "ch8", "ch9",
> - "ch10", "ch11",
> - "ch12";
> - clocks = <&cpg CPG_MOD 502>;
> - clock-names = "fck";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 502>;
> - #dma-cells = <1>;
> - dma-channels = <13>;
> + ipmmu_mp: mmu at ec680000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xec680000 0 0x1000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + status = "disabled";
> };
>
> - scifa0: serial at e6c40000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c40000 0 64>;
> - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 204>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> - <&dmac1 0x21>, <&dmac1 0x22>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 204>;
> + ipmmu_mx: mmu at fe951000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xfe951000 0 0x1000>;
> + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> status = "disabled";
> };
>
> - scifa1: serial at e6c50000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c50000 0 64>;
> - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 203>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> - <&dmac1 0x25>, <&dmac1 0x26>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 203>;
> + ipmmu_gp: mmu at e62a0000 {
> + compatible = "renesas,ipmmu-r8a7794",
> + "renesas,ipmmu-vmsa";
> + reg = <0 0xe62a0000 0 0x1000>;
> + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> status = "disabled";
> };
>
> - scifa2: serial at e6c60000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c60000 0 64>;
> - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 202>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> - <&dmac1 0x27>, <&dmac1 0x28>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 202>;
> - status = "disabled";
> + icram0: sram at e63a0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63a0000 0 0x12000>;
> };
>
> - scifa3: serial at e6c70000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c70000 0 64>;
> - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1106>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> - <&dmac1 0x1b>, <&dmac1 0x1c>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1106>;
> - status = "disabled";
> + icram1: sram at e63c0000 {
> + compatible = "mmio-sram";
> + reg = <0 0xe63c0000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0xe63c0000 0x1000>;
> +
> + smp-sram at 0 {
> + compatible = "renesas,smp-sram";
> + reg = <0 0x10>;
> + };
> };
>
> - scifa4: serial at e6c78000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c78000 0 64>;
> - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1107>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> - <&dmac1 0x1f>, <&dmac1 0x20>;
> - dma-names = "tx", "rx", "tx", "rx";
> + /* The memory map in the User's Manual maps the cores to
> + * bus numbers
> + */
> + i2c0: i2c at e6508000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1107>;
> + resets = <&cpg 931>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifa5: serial at e6c80000 {
> - compatible = "renesas,scifa-r8a7794",
> - "renesas,rcar-gen2-scifa", "renesas,scifa";
> - reg = <0 0xe6c80000 0 64>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1108>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> - <&dmac1 0x23>, <&dmac1 0x24>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c1: i2c at e6518000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6518000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 1108>;
> + resets = <&cpg 930>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifb0: serial at e6c20000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c20000 0 0x100>;
> - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 206>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> - <&dmac1 0x3d>, <&dmac1 0x3e>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c2: i2c at e6530000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6530000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 206>;
> + resets = <&cpg 929>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifb1: serial at e6c30000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6c30000 0 0x100>;
> - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 207>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> - <&dmac1 0x19>, <&dmac1 0x1a>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c3: i2c at e6540000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6540000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 207>;
> + resets = <&cpg 928>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scifb2: serial at e6ce0000 {
> - compatible = "renesas,scifb-r8a7794",
> - "renesas,rcar-gen2-scifb", "renesas,scifb";
> - reg = <0 0xe6ce0000 0 0x100>;
> - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 216>;
> - clock-names = "fck";
> - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> - <&dmac1 0x1d>, <&dmac1 0x1e>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c4: i2c at e6520000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6520000 0 0x40>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 927>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 216>;
> + resets = <&cpg 927>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scif0: serial at e6e60000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e60000 0 64>;
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> - <&dmac1 0x29>, <&dmac1 0x2a>;
> - dma-names = "tx", "rx", "tx", "rx";
> + i2c5: i2c at e6528000 {
> + compatible = "renesas,i2c-r8a7794",
> + "renesas,rcar-gen2-i2c";
> + reg = <0 0xe6528000 0 0x40>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 925>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 721>;
> + resets = <&cpg 925>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - scif1: serial at e6e68000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif",
> - "renesas,scif";
> - reg = <0 0xe6e68000 0 64>;
> - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> - <&dmac1 0x2d>, <&dmac1 0x2e>;
> + i2c6: i2c at e6500000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6500000 0 0x425>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 318>;
> + dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> + <&dmac1 0x61>, <&dmac1 0x62>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 720>;
> + resets = <&cpg 318>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - scif2: serial at e6e58000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6e58000 0 64>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> - <&dmac1 0x2b>, <&dmac1 0x2c>;
> + i2c7: i2c at e6510000 {
> + compatible = "renesas,iic-r8a7794",
> + "renesas,rcar-gen2-iic",
> + "renesas,rmobile-iic";
> + reg = <0 0xe6510000 0 0x425>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 323>;
> + dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> + <&dmac1 0x65>, <&dmac1 0x66>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 719>;
> + resets = <&cpg 323>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
> - scif3: serial at e6ea8000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6ea8000 0 64>;
> - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> - <&dmac1 0x2f>, <&dmac1 0x30>;
> - dma-names = "tx", "rx", "tx", "rx";
> + hsusb: usb at e6590000 {
> + compatible = "renesas,usbhs-r8a7794",
> + "renesas,rcar-gen2-usbhs";
> + reg = <0 0xe6590000 0 0x100>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 718>;
> + resets = <&cpg 704>;
> + renesas,buswait = <4>;
> + phys = <&usb0 1>;
> + phy-names = "usb";
> status = "disabled";
> };
>
> - scif4: serial at e6ee0000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6ee0000 0 64>;
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> - <&dmac1 0xfb>, <&dmac1 0xfc>;
> - dma-names = "tx", "rx", "tx", "rx";
> + usbphy: usb-phy at e6590100 {
> + compatible = "renesas,usb-phy-r8a7794",
> + "renesas,rcar-gen2-usb-phy";
> + reg = <0 0xe6590100 0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&cpg CPG_MOD 704>;
> + clock-names = "usbhs";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 715>;
> + resets = <&cpg 704>;
> status = "disabled";
> +
> + usb0: usb-channel at 0 {
> + reg = <0>;
> + #phy-cells = <1>;
> + };
> + usb2: usb-channel at 2 {
> + reg = <2>;
> + #phy-cells = <1>;
> + };
> };
>
> - scif5: serial at e6ee8000 {
> - compatible = "renesas,scif-r8a7794",
> - "renesas,rcar-gen2-scif", "renesas,scif";
> - reg = <0 0xe6ee8000 0 64>;
> - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> - <&dmac1 0xfd>, <&dmac1 0xfe>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 714>;
> - status = "disabled";
> - };
> -
> - hscif0: serial at e62c0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c0000 0 96>;
> - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 717>,
> - <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> - <&dmac1 0x39>, <&dmac1 0x3a>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 717>;
> - status = "disabled";
> - };
> -
> - hscif1: serial at e62c8000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62c8000 0 96>;
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 716>,
> - <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> - <&dmac1 0x4d>, <&dmac1 0x4e>;
> - dma-names = "tx", "rx", "tx", "rx";
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 716>;
> - status = "disabled";
> - };
> -
> - hscif2: serial at e62d0000 {
> - compatible = "renesas,hscif-r8a7794",
> - "renesas,rcar-gen2-hscif", "renesas,hscif";
> - reg = <0 0xe62d0000 0 96>;
> - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> - <&scif_clk>;
> - clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> - <&dmac1 0x3b>, <&dmac1 0x3c>;
> - dma-names = "tx", "rx", "tx", "rx";
> + dmac0: dma-controller at e6700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6700000 0 0x20000>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 219>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 713>;
> - status = "disabled";
> - };
> -
> - icram0: sram at e63a0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63a0000 0 0x12000>;
> - };
> -
> - icram1: sram at e63c0000 {
> - compatible = "mmio-sram";
> - reg = <0 0xe63c0000 0 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0 0xe63c0000 0x1000>;
> -
> - smp-sram at 0 {
> - compatible = "renesas,smp-sram";
> - reg = <0 0x10>;
> - };
> + resets = <&cpg 219>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> - ether: ethernet at ee700000 {
> - compatible = "renesas,ether-r8a7794",
> - "renesas,rcar-gen2-ether";
> - reg = <0 0xee700000 0 0x400>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 813>;
> + dmac1: dma-controller at e6720000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xe6720000 0 0x20000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3",
> + "ch4", "ch5", "ch6", "ch7",
> + "ch8", "ch9", "ch10", "ch11",
> + "ch12", "ch13", "ch14";
> + clocks = <&cpg CPG_MOD 218>;
> + clock-names = "fck";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 813>;
> - phy-mode = "rmii";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> + resets = <&cpg 218>;
> + #dma-cells = <1>;
> + dma-channels = <15>;
> };
>
> avb: ethernet at e6800000 {
> @@ -683,374 +543,301 @@
> status = "disabled";
> };
>
> - /* The memory map in the User's Manual maps the cores to
> - * bus numbers
> - */
> - i2c0: i2c at e6508000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6508000 0 0x40>;
> - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 931>;
> + qspi: spi at e6b10000 {
> + compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> + reg = <0 0xe6b10000 0 0x2c>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 917>;
> + dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> + <&dmac1 0x17>, <&dmac1 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 931>;
> + resets = <&cpg 917>;
> + num-cs = <1>;
> #address-cells = <1>;
> #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> status = "disabled";
> };
>
> - i2c1: i2c at e6518000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6518000 0 0x40>;
> - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 930>;
> + scifa0: serial at e6c40000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 204>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 930>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 204>;
> status = "disabled";
> };
>
> - i2c2: i2c at e6530000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6530000 0 0x40>;
> - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 929>;
> + scifa1: serial at e6c50000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 203>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x25>, <&dmac0 0x26>,
> + <&dmac1 0x25>, <&dmac1 0x26>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 929>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 203>;
> status = "disabled";
> };
>
> - i2c3: i2c at e6540000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6540000 0 0x40>;
> - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 928>;
> + scifa2: serial at e6c60000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c60000 0 64>;
> + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 202>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x27>, <&dmac0 0x28>,
> + <&dmac1 0x27>, <&dmac1 0x28>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 928>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 202>;
> status = "disabled";
> };
>
> - i2c4: i2c at e6520000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6520000 0 0x40>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 927>;
> + scifa3: serial at e6c70000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c70000 0 64>;
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1106>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
> + <&dmac1 0x1b>, <&dmac1 0x1c>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 927>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 1106>;
> status = "disabled";
> };
>
> - i2c5: i2c at e6528000 {
> - compatible = "renesas,i2c-r8a7794",
> - "renesas,rcar-gen2-i2c";
> - reg = <0 0xe6528000 0 0x40>;
> - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 925>;
> + scifa4: serial at e6c78000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c78000 0 64>;
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1107>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
> + <&dmac1 0x1f>, <&dmac1 0x20>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 925>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - i2c-scl-internal-delay-ns = <6>;
> + resets = <&cpg 1107>;
> status = "disabled";
> };
>
> - i2c6: i2c at e6500000 {
> - compatible = "renesas,iic-r8a7794",
> - "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6500000 0 0x425>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 318>;
> - dmas = <&dmac0 0x61>, <&dmac0 0x62>,
> - <&dmac1 0x61>, <&dmac1 0x62>;
> + scifa5: serial at e6c80000 {
> + compatible = "renesas,scifa-r8a7794",
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c80000 0 64>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1108>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x23>, <&dmac0 0x24>,
> + <&dmac1 0x23>, <&dmac1 0x24>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 318>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + resets = <&cpg 1108>;
> status = "disabled";
> };
>
> - i2c7: i2c at e6510000 {
> - compatible = "renesas,iic-r8a7794",
> - "renesas,rcar-gen2-iic",
> - "renesas,rmobile-iic";
> - reg = <0 0xe6510000 0 0x425>;
> - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 323>;
> - dmas = <&dmac0 0x65>, <&dmac0 0x66>,
> - <&dmac1 0x65>, <&dmac1 0x66>;
> + scifb0: serial at e6c20000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 0x100>;
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 206>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 323>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + resets = <&cpg 206>;
> status = "disabled";
> };
>
> - mmcif0: mmc at ee200000 {
> - compatible = "renesas,mmcif-r8a7794",
> - "renesas,sh-mmcif";
> - reg = <0 0xee200000 0 0x80>;
> - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 315>;
> - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> - <&dmac1 0xd1>, <&dmac1 0xd2>;
> + scifb1: serial at e6c30000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c30000 0 0x100>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 207>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
> + <&dmac1 0x19>, <&dmac1 0x1a>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 315>;
> - reg-io-width = <4>;
> + resets = <&cpg 207>;
> status = "disabled";
> };
>
> - sdhi0: sd at ee100000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee100000 0 0x328>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 314>;
> - dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> - <&dmac1 0xcd>, <&dmac1 0xce>;
> + scifb2: serial at e6ce0000 {
> + compatible = "renesas,scifb-r8a7794",
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6ce0000 0 0x100>;
> + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 216>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
> + <&dmac1 0x1d>, <&dmac1 0x1e>;
> dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <195000000>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 314>;
> + resets = <&cpg 216>;
> status = "disabled";
> };
>
> - sdhi1: sd at ee140000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee140000 0 0x100>;
> - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 312>;
> - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> - <&dmac1 0xc1>, <&dmac1 0xc2>;
> + scif0: serial at e6e60000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 312>;
> + resets = <&cpg 721>;
> status = "disabled";
> };
>
> - sdhi2: sd at ee160000 {
> - compatible = "renesas,sdhi-r8a7794",
> - "renesas,rcar-gen2-sdhi";
> - reg = <0 0xee160000 0 0x100>;
> - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 311>;
> - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> - <&dmac1 0xd3>, <&dmac1 0xd4>;
> + scif1: serial at e6e68000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif",
> + "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> dma-names = "tx", "rx", "tx", "rx";
> - max-frequency = <97500000>;
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 311>;
> + resets = <&cpg 720>;
> status = "disabled";
> };
>
> - qspi: spi at e6b10000 {
> - compatible = "renesas,qspi-r8a7794", "renesas,qspi";
> - reg = <0 0xe6b10000 0 0x2c>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 917>;
> - dmas = <&dmac0 0x17>, <&dmac0 0x18>,
> - <&dmac1 0x17>, <&dmac1 0x18>;
> + scif2: serial at e6e58000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e58000 0 64>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
> + <&dmac1 0x2b>, <&dmac1 0x2c>;
> dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 917>;
> - num-cs = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + resets = <&cpg 719>;
> status = "disabled";
> };
>
> - vin0: video at e6ef0000 {
> - compatible = "renesas,vin-r8a7794",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef0000 0 0x1000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 811>;
> + scif3: serial at e6ea8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ea8000 0 64>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
> + <&dmac1 0x2f>, <&dmac1 0x30>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 811>;
> + resets = <&cpg 718>;
> status = "disabled";
> };
>
> - vin1: video at e6ef1000 {
> - compatible = "renesas,vin-r8a7794",
> - "renesas,rcar-gen2-vin";
> - reg = <0 0xe6ef1000 0 0x1000>;
> - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 810>;
> + scif4: serial at e6ee0000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee0000 0 64>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
> + <&dmac1 0xfb>, <&dmac1 0xfc>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 810>;
> + resets = <&cpg 715>;
> status = "disabled";
> };
>
> - pci0: pci at ee090000 {
> - compatible = "renesas,pci-r8a7794",
> - "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee090000 0 0xc00>,
> - <0 0xee080000 0 0x1100>;
> - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> + scif5: serial at e6ee8000 {
> + compatible = "renesas,scif-r8a7794",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6ee8000 0 64>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
> + <&dmac1 0xfd>, <&dmac1 0xfe>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> + resets = <&cpg 714>;
> status = "disabled";
> -
> - bus-range = <0 0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb at 1,0 {
> - reg = <0x800 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> -
> - usb at 2,0 {
> - reg = <0x1000 0 0 0 0>;
> - phys = <&usb0 0>;
> - phy-names = "usb";
> - };
> };
>
> - pci1: pci at ee0d0000 {
> - compatible = "renesas,pci-r8a7794",
> - "renesas,pci-rcar-gen2";
> - device_type = "pci";
> - reg = <0 0xee0d0000 0 0xc00>,
> - <0 0xee0c0000 0 0x1100>;
> - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 703>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 703>;
> - status = "disabled";
> -
> - bus-range = <1 1>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - #interrupt-cells = <1>;
> - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> - interrupt-map-mask = <0xff00 0 0 0x7>;
> - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> -
> - usb at 1,0 {
> - reg = <0x10800 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> -
> - usb at 2,0 {
> - reg = <0x11000 0 0 0 0>;
> - phys = <&usb2 0>;
> - phy-names = "usb";
> - };
> - };
> -
> - hsusb: usb at e6590000 {
> - compatible = "renesas,usbhs-r8a7794",
> - "renesas,rcar-gen2-usbhs";
> - reg = <0 0xe6590000 0 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 704>;
> + hscif0: serial at e62c0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> - renesas,buswait = <4>;
> - phys = <&usb0 1>;
> - phy-names = "usb";
> + resets = <&cpg 717>;
> status = "disabled";
> };
>
> - usbphy: usb-phy at e6590100 {
> - compatible = "renesas,usb-phy-r8a7794",
> - "renesas,rcar-gen2-usb-phy";
> - reg = <0 0xe6590100 0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&cpg CPG_MOD 704>;
> - clock-names = "usbhs";
> + hscif1: serial at e62c8000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c8000 0 96>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>,
> + <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
> + <&dmac1 0x4d>, <&dmac1 0x4e>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 704>;
> + resets = <&cpg 716>;
> status = "disabled";
> -
> - usb0: usb-channel at 0 {
> - reg = <0>;
> - #phy-cells = <1>;
> - };
> - usb2: usb-channel at 2 {
> - reg = <2>;
> - #phy-cells = <1>;
> - };
> - };
> -
> - vsp at fe928000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe928000 0 0x8000>;
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 131>;
> - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 131>;
> };
>
> - vsp at fe930000 {
> - compatible = "renesas,vsp1";
> - reg = <0 0xfe930000 0 0x8000>;
> - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 128>;
> + hscif2: serial at e62d0000 {
> + compatible = "renesas,hscif-r8a7794",
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62d0000 0 96>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
> + <&dmac1 0x3b>, <&dmac1 0x3c>;
> + dma-names = "tx", "rx", "tx", "rx";
> power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> - resets = <&cpg 128>;
> - };
> -
> - du: display at feb00000 {
> - compatible = "renesas,du-r8a7794";
> - reg = <0 0xfeb00000 0 0x40000>;
> - reg-names = "du";
> - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> - clock-names = "du.0", "du.1";
> + resets = <&cpg 713>;
> status = "disabled";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port at 0 {
> - reg = <0>;
> - du_out_rgb0: endpoint {
> - };
> - };
> - port at 1 {
> - reg = <1>;
> - du_out_rgb1: endpoint {
> - };
> - };
> - };
> };
>
> can0: can at e6e80000 {
> @@ -1079,87 +866,25 @@
> status = "disabled";
> };
>
> - cpg: clock-controller at e6150000 {
> - compatible = "renesas,r8a7794-cpg-mssr";
> - reg = <0 0xe6150000 0 0x1000>;
> - clocks = <&extal_clk>, <&usb_extal_clk>;
> - clock-names = "extal", "usb_extal";
> - #clock-cells = <2>;
> - #power-domain-cells = <0>;
> - #reset-cells = <1>;
> - };
> -
> - rst: reset-controller at e6160000 {
> - compatible = "renesas,r8a7794-rst";
> - reg = <0 0xe6160000 0 0x0100>;
> - };
> -
> - prr: chipid at ff000044 {
> - compatible = "renesas,prr";
> - reg = <0 0xff000044 0 4>;
> - };
> -
> - sysc: system-controller at e6180000 {
> - compatible = "renesas,r8a7794-sysc";
> - reg = <0 0xe6180000 0 0x0200>;
> - #power-domain-cells = <1>;
> - };
> -
> - ipmmu_sy0: mmu at e6280000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6280000 0 0x1000>;
> - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_sy1: mmu at e6290000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6290000 0 0x1000>;
> - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_ds: mmu at e6740000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe6740000 0 0x1000>;
> - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mp: mmu at ec680000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xec680000 0 0x1000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> -
> - ipmmu_mx: mmu at fe951000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xfe951000 0 0x1000>;
> - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin0: video at e6ef0000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> status = "disabled";
> };
>
> - ipmmu_gp: mmu at e62a0000 {
> - compatible = "renesas,ipmmu-r8a7794",
> - "renesas,ipmmu-vmsa";
> - reg = <0 0xe62a0000 0 0x1000>;
> - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> + vin1: video at e6ef1000 {
> + compatible = "renesas,vin-r8a7794",
> + "renesas,rcar-gen2-vin";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> status = "disabled";
> };
>
> @@ -1343,6 +1068,281 @@
> };
> };
> };
> +
> + audma0: dma-controller at ec700000 {
> + compatible = "renesas,dmac-r8a7794",
> + "renesas,rcar-dmac";
> + reg = <0 0xec700000 0 0x10000>;
> + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "error",
> + "ch0", "ch1", "ch2", "ch3", "ch4",
> + "ch5", "ch6", "ch7", "ch8", "ch9",
> + "ch10", "ch11",
> + "ch12";
> + clocks = <&cpg CPG_MOD 502>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 502>;
> + #dma-cells = <1>;
> + dma-channels = <13>;
> + };
> +
> + pci0: pci at ee090000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee090000 0 0xc00>,
> + <0 0xee080000 0 0x1100>;
> + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb at 1,0 {
> + reg = <0x800 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> +
> + usb at 2,0 {
> + reg = <0x1000 0 0 0 0>;
> + phys = <&usb0 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + pci1: pci at ee0d0000 {
> + compatible = "renesas,pci-r8a7794",
> + "renesas,pci-rcar-gen2";
> + device_type = "pci";
> + reg = <0 0xee0d0000 0 0xc00>,
> + <0 0xee0c0000 0 0x1100>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> +
> + bus-range = <1 1>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> + interrupt-map-mask = <0xff00 0 0 0x7>;
> + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
> + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> +
> + usb at 1,0 {
> + reg = <0x10800 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> +
> + usb at 2,0 {
> + reg = <0x11000 0 0 0 0>;
> + phys = <&usb2 0>;
> + phy-names = "usb";
> + };
> + };
> +
> + sdhi0: sd at ee100000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee100000 0 0x328>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 314>;
> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
> + <&dmac1 0xcd>, <&dmac1 0xce>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <195000000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 314>;
> + status = "disabled";
> + };
> +
> + sdhi1: sd at ee140000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee140000 0 0x100>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 312>;
> + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
> + <&dmac1 0xc1>, <&dmac1 0xc2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 312>;
> + status = "disabled";
> + };
> +
> + sdhi2: sd at ee160000 {
> + compatible = "renesas,sdhi-r8a7794",
> + "renesas,rcar-gen2-sdhi";
> + reg = <0 0xee160000 0 0x100>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 311>;
> + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
> + <&dmac1 0xd3>, <&dmac1 0xd4>;
> + dma-names = "tx", "rx", "tx", "rx";
> + max-frequency = <97500000>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 311>;
> + status = "disabled";
> + };
> +
> + mmcif0: mmc at ee200000 {
> + compatible = "renesas,mmcif-r8a7794",
> + "renesas,sh-mmcif";
> + reg = <0 0xee200000 0 0x80>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 315>;
> + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
> + <&dmac1 0xd1>, <&dmac1 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 315>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
> +
> + ether: ethernet at ee700000 {
> + compatible = "renesas,ether-r8a7794",
> + "renesas,rcar-gen2-ether";
> + reg = <0 0xee700000 0 0x400>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + phy-mode = "rmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller at f1001000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0 0xf1001000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> + <0 0xf1004000 0 0x2000>,
> + <0 0xf1006000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&cpg CPG_MOD 408>;
> + clock-names = "clk";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 408>;
> + };
> +
> + vsp at fe928000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe928000 0 0x8000>;
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 131>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 131>;
> + };
> +
> + vsp at fe930000 {
> + compatible = "renesas,vsp1";
> + reg = <0 0xfe930000 0 0x8000>;
> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 128>;
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 128>;
> + };
> +
> + du: display at feb00000 {
> + compatible = "renesas,du-r8a7794";
> + reg = <0 0xfeb00000 0 0x40000>;
> + reg-names = "du";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> + clock-names = "du.0", "du.1";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + du_out_rgb0: endpoint {
> + };
> + };
> + port at 1 {
> + reg = <1>;
> + du_out_rgb1: endpoint {
> + };
> + };
> + };
> + };
> +
> + prr: chipid at ff000044 {
> + compatible = "renesas,prr";
> + reg = <0 0xff000044 0 4>;
> + };
> +
> + cmt0: timer at ffca0000 {
> + compatible = "renesas,r8a7794-cmt0",
> + "renesas,rcar-gen2-cmt0";
> + reg = <0 0xffca0000 0 0x1004>;
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 124>;
> +
> + status = "disabled";
> + };
> +
> + cmt1: timer at e6130000 {
> + compatible = "renesas,r8a7794-cmt1",
> + "renesas,rcar-gen2-cmt1";
> + reg = <0 0xe6130000 0 0x1004>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 329>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 329>;
> +
> + status = "disabled";
> + };
> };
>
> timer {
> @@ -1353,7 +1353,6 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> -
> /* External root clock */
> extal_clk: extal {
> compatible = "fixed-clock";
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-18 2:20 ` Niklas Söderlund
-1 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 2:20 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:17 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch also aligns the comment for audio_clka. This is good but not
mentioned in the commit message which confused the review bot, i.e me :-)
Reviewed-by: Niklas S�derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 90 +++++++++++++++++++++---------------------
> 1 file changed, 45 insertions(+), 45 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 9e5f886f53c5..d588efa6aeaa 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -33,6 +33,35 @@
> vin1 = &vin1;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clka: audio_clka {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clkb: audio_clkb {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clkc: audio_clkc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -66,6 +95,22 @@
> };
> };
>
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> interrupt-parent = <&gic>;
> @@ -1353,55 +1398,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed
> - * frequency clocks by default. Boards that provide audio
> - * clocks should override them.
> - */
> - audio_clka: audio_clka {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clkb: audio_clkb {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clkc: audio_clkc {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S�derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
@ 2018-01-18 2:20 ` Niklas Söderlund
0 siblings, 0 replies; 106+ messages in thread
From: Niklas Söderlund @ 2018-01-18 2:20 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Thanks for your patch.
On 2018-01-17 17:17:17 +0100, Simon Horman wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch also aligns the comment for audio_clka. This is good but not
mentioned in the commit message which confused the review bot, i.e me :-)
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> v2
> * New patch
> ---
> arch/arm/boot/dts/r8a7794.dtsi | 90 +++++++++++++++++++++---------------------
> 1 file changed, 45 insertions(+), 45 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 9e5f886f53c5..d588efa6aeaa 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -33,6 +33,35 @@
> vin1 = &vin1;
> };
>
> + /*
> + * The external audio clocks are configured as 0 Hz fixed frequency
> + * clocks by default.
> + * Boards that provide audio clocks should override them.
> + */
> + audio_clka: audio_clka {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clkb: audio_clkb {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> + audio_clkc: audio_clkc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + };
> +
> + /* External CAN clock */
> + can_clk: can {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -66,6 +95,22 @@
> };
> };
>
> + /* External root clock */
> + extal_clk: extal {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> + /* External SCIF clock */
> + scif_clk: scif {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + /* This value must be overridden by the board. */
> + clock-frequency = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> interrupt-parent = <&gic>;
> @@ -1353,55 +1398,10 @@
> <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> - /* External root clock */
> - extal_clk: extal {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> /* External USB clock - can be overridden by the board */
> usb_extal_clk: usb_extal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <48000000>;
> };
> -
> - /* External CAN clock */
> - can_clk: can {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /* External SCIF clock */
> - scif_clk: scif {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - /* This value must be overridden by the board. */
> - clock-frequency = <0>;
> - };
> -
> - /*
> - * The external audio clocks are configured as 0 Hz fixed
> - * frequency clocks by default. Boards that provide audio
> - * clocks should override them.
> - */
> - audio_clka: audio_clka {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clkb: audio_clkb {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> - audio_clkc: audio_clkc {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <0>;
> - };
> };
> --
> 2.11.0
>
--
Regards,
Niklas S?derlund
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
2018-01-18 2:20 ` Niklas Söderlund
@ 2018-01-18 8:28 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-18 8:28 UTC (permalink / raw)
To: Niklas Söderlund; +Cc: linux-renesas-soc, linux-arm-kernel, Magnus Damm
On Thu, Jan 18, 2018 at 03:20:00AM +0100, Niklas Söderlund wrote:
> Hi Simon,
>
> Thanks for your patch.
>
> On 2018-01-17 17:17:17 +0100, Simon Horman wrote:
> > Sort the subnodes of the soc node to improve maintainability.
> > The sort key is the address on the bus with instances of the same
> > IP block grouped together.
> >
> > This patch should not introduce any functional change.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> This patch also aligns the comment for audio_clka. This is good but not
> mentioned in the commit message which confused the review bot, i.e me :-)
Sorry, its probably worth adding that to the changelog.
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>
> > ---
> > v2
> > * New patch
> > ---
> > arch/arm/boot/dts/r8a7794.dtsi | 90 +++++++++++++++++++++---------------------
> > 1 file changed, 45 insertions(+), 45 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> > index 9e5f886f53c5..d588efa6aeaa 100644
> > --- a/arch/arm/boot/dts/r8a7794.dtsi
> > +++ b/arch/arm/boot/dts/r8a7794.dtsi
> > @@ -33,6 +33,35 @@
> > vin1 = &vin1;
> > };
> >
> > + /*
> > + * The external audio clocks are configured as 0 Hz fixed frequency
> > + * clocks by default.
> > + * Boards that provide audio clocks should override them.
> > + */
> > + audio_clka: audio_clka {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <0>;
> > + };
> > + audio_clkb: audio_clkb {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <0>;
> > + };
> > + audio_clkc: audio_clkc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <0>;
> > + };
> > +
> > + /* External CAN clock */
> > + can_clk: can {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + /* This value must be overridden by the board. */
> > + clock-frequency = <0>;
> > + };
> > +
> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > @@ -66,6 +95,22 @@
> > };
> > };
> >
> > + /* External root clock */
> > + extal_clk: extal {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + /* This value must be overridden by the board. */
> > + clock-frequency = <0>;
> > + };
> > +
> > + /* External SCIF clock */
> > + scif_clk: scif {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + /* This value must be overridden by the board. */
> > + clock-frequency = <0>;
> > + };
> > +
> > soc {
> > compatible = "simple-bus";
> > interrupt-parent = <&gic>;
> > @@ -1353,55 +1398,10 @@
> > <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > - /* External root clock */
> > - extal_clk: extal {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - /* This value must be overridden by the board. */
> > - clock-frequency = <0>;
> > - };
> > -
> > /* External USB clock - can be overridden by the board */
> > usb_extal_clk: usb_extal {
> > compatible = "fixed-clock";
> > #clock-cells = <0>;
> > clock-frequency = <48000000>;
> > };
> > -
> > - /* External CAN clock */
> > - can_clk: can {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - /* This value must be overridden by the board. */
> > - clock-frequency = <0>;
> > - };
> > -
> > - /* External SCIF clock */
> > - scif_clk: scif {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - /* This value must be overridden by the board. */
> > - clock-frequency = <0>;
> > - };
> > -
> > - /*
> > - * The external audio clocks are configured as 0 Hz fixed
> > - * frequency clocks by default. Boards that provide audio
> > - * clocks should override them.
> > - */
> > - audio_clka: audio_clka {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - clock-frequency = <0>;
> > - };
> > - audio_clkb: audio_clkb {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - clock-frequency = <0>;
> > - };
> > - audio_clkc: audio_clkc {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - clock-frequency = <0>;
> > - };
> > };
> > --
> > 2.11.0
> >
>
> --
> Regards,
> Niklas Söderlund
>
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
@ 2018-01-18 8:28 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-18 8:28 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jan 18, 2018 at 03:20:00AM +0100, Niklas S?derlund wrote:
> Hi Simon,
>
> Thanks for your patch.
>
> On 2018-01-17 17:17:17 +0100, Simon Horman wrote:
> > Sort the subnodes of the soc node to improve maintainability.
> > The sort key is the address on the bus with instances of the same
> > IP block grouped together.
> >
> > This patch should not introduce any functional change.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> This patch also aligns the comment for audio_clka. This is good but not
> mentioned in the commit message which confused the review bot, i.e me :-)
Sorry, its probably worth adding that to the changelog.
> Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
>
> > ---
> > v2
> > * New patch
> > ---
> > arch/arm/boot/dts/r8a7794.dtsi | 90 +++++++++++++++++++++---------------------
> > 1 file changed, 45 insertions(+), 45 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> > index 9e5f886f53c5..d588efa6aeaa 100644
> > --- a/arch/arm/boot/dts/r8a7794.dtsi
> > +++ b/arch/arm/boot/dts/r8a7794.dtsi
> > @@ -33,6 +33,35 @@
> > vin1 = &vin1;
> > };
> >
> > + /*
> > + * The external audio clocks are configured as 0 Hz fixed frequency
> > + * clocks by default.
> > + * Boards that provide audio clocks should override them.
> > + */
> > + audio_clka: audio_clka {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <0>;
> > + };
> > + audio_clkb: audio_clkb {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <0>;
> > + };
> > + audio_clkc: audio_clkc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <0>;
> > + };
> > +
> > + /* External CAN clock */
> > + can_clk: can {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + /* This value must be overridden by the board. */
> > + clock-frequency = <0>;
> > + };
> > +
> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > @@ -66,6 +95,22 @@
> > };
> > };
> >
> > + /* External root clock */
> > + extal_clk: extal {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + /* This value must be overridden by the board. */
> > + clock-frequency = <0>;
> > + };
> > +
> > + /* External SCIF clock */
> > + scif_clk: scif {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + /* This value must be overridden by the board. */
> > + clock-frequency = <0>;
> > + };
> > +
> > soc {
> > compatible = "simple-bus";
> > interrupt-parent = <&gic>;
> > @@ -1353,55 +1398,10 @@
> > <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > - /* External root clock */
> > - extal_clk: extal {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - /* This value must be overridden by the board. */
> > - clock-frequency = <0>;
> > - };
> > -
> > /* External USB clock - can be overridden by the board */
> > usb_extal_clk: usb_extal {
> > compatible = "fixed-clock";
> > #clock-cells = <0>;
> > clock-frequency = <48000000>;
> > };
> > -
> > - /* External CAN clock */
> > - can_clk: can {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - /* This value must be overridden by the board. */
> > - clock-frequency = <0>;
> > - };
> > -
> > - /* External SCIF clock */
> > - scif_clk: scif {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - /* This value must be overridden by the board. */
> > - clock-frequency = <0>;
> > - };
> > -
> > - /*
> > - * The external audio clocks are configured as 0 Hz fixed
> > - * frequency clocks by default. Boards that provide audio
> > - * clocks should override them.
> > - */
> > - audio_clka: audio_clka {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - clock-frequency = <0>;
> > - };
> > - audio_clkb: audio_clkb {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - clock-frequency = <0>;
> > - };
> > - audio_clkc: audio_clkc {
> > - compatible = "fixed-clock";
> > - #clock-cells = <0>;
> > - clock-frequency = <0>;
> > - };
> > };
> > --
> > 2.11.0
> >
>
> --
> Regards,
> Niklas S?derlund
>
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 01/16] ARM: dts: r8a7790: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:13 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:13 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 01/16] ARM: dts: r8a7790: consistently use single space after =
@ 2018-01-19 8:13 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:13 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:19 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:19 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
@ 2018-01-19 8:19 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:19 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
2018-01-18 0:24 ` Niklas Söderlund
@ 2018-01-19 8:21 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:21 UTC (permalink / raw)
To: Niklas Söderlund
Cc: Simon Horman, Linux-Renesas, linux-arm-kernel, Magnus Damm
Hi Niklas,
On Thu, Jan 18, 2018 at 1:24 AM, Niklas Söderlund
<niklas.soderlund@ragnatech.se> wrote:
> On 2018-01-17 17:17:03 +0100, Simon Horman wrote:
>> Add soc node to represent the bus and move all nodes with a base address
>> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
>> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
>> Gen2 SoCs to this scheme.
>>
>> The ordering is derived from simply moving each node with an address up to
>> before any nodes without a base address that occur before the soc node. To
>> improve maintainability follow-up patches will sort subnodes of both the
>> new soc node and the root node.
>>
>> This patch should not introduce any functional change.
>>
>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> The 'ranges' property in the soc node is new. I checked the
> documentation and as far as I can make out this is how it should be. But
> I'm not certain why :-)
Please see section 2.3.8 in the Device Tree Specification, either from ePAPR,
or at https://www.devicetree.org/.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 02/16] ARM: dts: r8a7790: add soc node
@ 2018-01-19 8:21 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:21 UTC (permalink / raw)
To: linux-arm-kernel
Hi Niklas,
On Thu, Jan 18, 2018 at 1:24 AM, Niklas S?derlund
<niklas.soderlund@ragnatech.se> wrote:
> On 2018-01-17 17:17:03 +0100, Simon Horman wrote:
>> Add soc node to represent the bus and move all nodes with a base address
>> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
>> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
>> Gen2 SoCs to this scheme.
>>
>> The ordering is derived from simply moving each node with an address up to
>> before any nodes without a base address that occur before the soc node. To
>> improve maintainability follow-up patches will sort subnodes of both the
>> new soc node and the root node.
>>
>> This patch should not introduce any functional change.
>>
>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> The 'ranges' property in the soc node is new. I checked the
> documentation and as far as I can make out this is how it should be. But
> I'm not certain why :-)
Please see section 2.3.8 in the Device Tree Specification, either from ePAPR,
or at https://www.devicetree.org/.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 04/16] ARM: dts: r8a7790: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:29 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:29 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 04/16] ARM: dts: r8a7790: sort subnodes of root node
@ 2018-01-19 8:29 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:29 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:39 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:39 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the addresss on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
The sort order for the various SCIF variants is still a bit odd:
scifa0: serial@e6c40000 {
scifa1: serial@e6c50000 {
scifa2: serial@e6c60000 {
scifb0: serial@e6c20000 {
scifb1: serial@e6c30000 {
scifb2: serial@e6ce0000 {
scif0: serial@e6e60000 {
scif1: serial@e6e68000 {
scif2: serial@e6e56000 {
hscif0: serial@e62c0000 {
hscif1: serial@e62c8000 {
(hscif0 has the lowest address)
But hey, SCIF is special ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
@ 2018-01-19 8:39 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:39 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the addresss on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
The sort order for the various SCIF variants is still a bit odd:
scifa0: serial at e6c40000 {
scifa1: serial at e6c50000 {
scifa2: serial at e6c60000 {
scifb0: serial at e6c20000 {
scifb1: serial at e6c30000 {
scifb2: serial at e6ce0000 {
scif0: serial at e6e60000 {
scif1: serial at e6e68000 {
scif2: serial at e6e56000 {
hscif0: serial at e62c0000 {
hscif1: serial at e62c8000 {
(hscif0 has the lowest address)
But hey, SCIF is special ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 05/16] ARM: dts: r8a7791: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:40 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:40 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 05/16] ARM: dts: r8a7791: consistently use single space after =
@ 2018-01-19 8:40 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:40 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab or multiple spaces are used
> instead. It also avoids running over 80 columns in width in one of the
> lines where whitespace is updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 06/16] ARM: dts: r8a7791: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:46 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:46 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 06/16] ARM: dts: r8a7791: add soc node
@ 2018-01-19 8:46 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:46 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 07/16] ARM: dts: r8a7791: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:48 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:48 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 07/16] ARM: dts: r8a7791: sort subnodes of root node
@ 2018-01-19 8:48 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:48 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort subnodes of root node to aid maintenance.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 08/16] ARM: dts: r8a7792: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:50 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:50 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Albeit the same comment about SCIF variant sort order as for r8a7790.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 08/16] ARM: dts: r8a7792: sort subnodes of soc node
@ 2018-01-19 8:50 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:50 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Albeit the same comment about SCIF variant sort order as for r8a7790.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 09/16] ARM: dts: r8a7793: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:51 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:51 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead. It also avoids
> running over 80 columns in width in one of the lines where whitespace is
> updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 09/16] ARM: dts: r8a7793: consistently use single space after =
@ 2018-01-19 8:51 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:51 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead. It also avoids
> running over 80 columns in width in one of the lines where whitespace is
> updated.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 10/16] ARM: dts: r8a7793: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:55 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:55 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 10/16] ARM: dts: r8a7793: add soc node
@ 2018-01-19 8:55 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:55 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 11/16] ARM: dts: r8a7793: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:55 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:55 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Same comment for SCIF variant sort order.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 11/16] ARM: dts: r8a7793: sort subnodes of soc node
@ 2018-01-19 8:55 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:55 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Same comment for SCIF variant sort order.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 12/16] ARM: dts: r8a7793: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:55 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:55 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 12/16] ARM: dts: r8a7793: sort subnodes of root node
@ 2018-01-19 8:55 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:55 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 13/16] ARM: dts: r8a7794: consistently use single space after =
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:56 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:56 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 13/16] ARM: dts: r8a7794: consistently use single space after =
@ 2018-01-19 8:56 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:56 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Consistently use a single space after a =.
>
> This patch removes instances where a tab is used instead.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 14/16] ARM: dts: r8a7794: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:57 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:57 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 14/16] ARM: dts: r8a7794: add soc node
@ 2018-01-19 8:57 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:57 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Add soc node to represent the bus and move all nodes with a base address
> into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
> R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
> Gen2 SoCs to this scheme.
>
> The ordering is derived from simply moving each node with an address up to
> before any nodes without a base address that occur before the soc node. To
> improve maintainability follow-up patches will sort subnodes of both the
> new soc node and the root node.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 15/16] ARM: dts: r8a7794: sort subnodes of soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:59 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:59 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
SCIF sort order?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 15/16] ARM: dts: r8a7794: sort subnodes of soc node
@ 2018-01-19 8:59 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:59 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
SCIF sort order?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 8:59 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:59 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node
@ 2018-01-19 8:59 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 8:59 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Sort the subnodes of the soc node to improve maintainability.
> The sort key is the address on the bus with instances of the same
> IP block grouped together.
>
> This patch should not introduce any functional change.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
2018-01-19 8:39 ` Geert Uytterhoeven
@ 2018-01-19 9:26 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-19 9:26 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
On Fri, Jan 19, 2018 at 09:39:24AM +0100, Geert Uytterhoeven wrote:
> On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > Sort the subnodes of the soc node to improve maintainability.
> > The sort key is the addresss on the bus with instances of the same
> > IP block grouped together.
> >
> > This patch should not introduce any functional change.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> The sort order for the various SCIF variants is still a bit odd:
>
> scifa0: serial@e6c40000 {
> scifa1: serial@e6c50000 {
> scifa2: serial@e6c60000 {
> scifb0: serial@e6c20000 {
> scifb1: serial@e6c30000 {
> scifb2: serial@e6ce0000 {
> scif0: serial@e6e60000 {
> scif1: serial@e6e68000 {
> scif2: serial@e6e56000 {
> hscif0: serial@e62c0000 {
> hscif1: serial@e62c8000 {
>
> (hscif0 has the lowest address)
>
> But hey, SCIF is special ;-)
Right, I decided to keep the SCIF ordering as is.
My preference is to address this later if we come up with a better scheme.
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of soc node
@ 2018-01-19 9:26 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-19 9:26 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jan 19, 2018 at 09:39:24AM +0100, Geert Uytterhoeven wrote:
> On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > Sort the subnodes of the soc node to improve maintainability.
> > The sort key is the addresss on the bus with instances of the same
> > IP block grouped together.
> >
> > This patch should not introduce any functional change.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> The sort order for the various SCIF variants is still a bit odd:
>
> scifa0: serial at e6c40000 {
> scifa1: serial at e6c50000 {
> scifa2: serial at e6c60000 {
> scifb0: serial at e6c20000 {
> scifb1: serial at e6c30000 {
> scifb2: serial at e6ce0000 {
> scif0: serial at e6e60000 {
> scif1: serial at e6e68000 {
> scif2: serial at e6e56000 {
> hscif0: serial at e62c0000 {
> hscif1: serial at e62c8000 {
>
> (hscif0 has the lowest address)
>
> But hey, SCIF is special ;-)
Right, I decided to keep the SCIF ordering as is.
My preference is to address this later if we come up with a better scheme.
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 0/16] ARM: r8a7790: add soc node
2018-01-17 16:17 ` Simon Horman
@ 2018-01-19 9:41 ` Geert Uytterhoeven
-1 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 9:41 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas, linux-arm-kernel, Magnus Damm
Hi Simon,
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> this patchset adds an soc node, moves all nodes for IP blocks with an
> address on the bus to be sub nodes of the soc node, and sorts subnodes of
> the root and soc nodes.
>
> The use of an soc node is consistent with handling of R-Car Gen3, RZ/G1,
> and R-Car V2H (R8A77920) SoCs upstream. This patch-set adds it for all
> other R-Car Gen2 SoCs: r8a7790 (H2), r8a7791 (M2-W), r8a7793 (M2-N),
> r8a7794 (E2).
>
> Sorting of nodes is also done for the R-Car V2H (R8A77920), making it
> consistent across all R-Car Gen2 SoCs and thus allowing easier comparison
> of DTs of different R-Car Gen2 SoCs.
>
> The patchset also fixes some minor whitespace problems.
Thank you, this is a great cleanup!
Now the structure of the DTSes is the same for all SoCs, they can be
compared more easily using my soc-dts-diff script (which BTW also works
for e.g. driver source files using the <soc>-<module>.c pattern).
$ cat $(type -p soc-dts-diff)
#!/bin/bash
set -e
function usage()
{
cat <<END
Usage: $(basename $0) [options...] <dts1> <dts2>
END
exit -1
}
for i in $*; do
case $i in
-*)
options="$options $i"
;;
*)
if [ "$dts1" == "" ]; then
dts1=$i
elif [ "$dts2" == "" ]; then
dts2=$i
else
usage
fi
;;
esac
done
if [ "$dts1" == "" -o "$dts2" == "" ]; then
usage
fi
soc1=$(basename $dts1)
soc2=$(basename $dts2)
soc1=${soc1%%[-.]*}
soc2=${soc2%%[-.]*}
colordiff -u $options \
--label $dts1 <(sed -e "s/$soc1/<SOC>/gi" $dts1) \
--label $dts2 <(sed -e "s/$soc2/<SOC>/gi" $dts2)
$
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 0/16] ARM: r8a7790: add soc node
@ 2018-01-19 9:41 ` Geert Uytterhoeven
0 siblings, 0 replies; 106+ messages in thread
From: Geert Uytterhoeven @ 2018-01-19 9:41 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> this patchset adds an soc node, moves all nodes for IP blocks with an
> address on the bus to be sub nodes of the soc node, and sorts subnodes of
> the root and soc nodes.
>
> The use of an soc node is consistent with handling of R-Car Gen3, RZ/G1,
> and R-Car V2H (R8A77920) SoCs upstream. This patch-set adds it for all
> other R-Car Gen2 SoCs: r8a7790 (H2), r8a7791 (M2-W), r8a7793 (M2-N),
> r8a7794 (E2).
>
> Sorting of nodes is also done for the R-Car V2H (R8A77920), making it
> consistent across all R-Car Gen2 SoCs and thus allowing easier comparison
> of DTs of different R-Car Gen2 SoCs.
>
> The patchset also fixes some minor whitespace problems.
Thank you, this is a great cleanup!
Now the structure of the DTSes is the same for all SoCs, they can be
compared more easily using my soc-dts-diff script (which BTW also works
for e.g. driver source files using the <soc>-<module>.c pattern).
$ cat $(type -p soc-dts-diff)
#!/bin/bash
set -e
function usage()
{
cat <<END
Usage: $(basename $0) [options...] <dts1> <dts2>
END
exit -1
}
for i in $*; do
case $i in
-*)
options="$options $i"
;;
*)
if [ "$dts1" == "" ]; then
dts1=$i
elif [ "$dts2" == "" ]; then
dts2=$i
else
usage
fi
;;
esac
done
if [ "$dts1" == "" -o "$dts2" == "" ]; then
usage
fi
soc1=$(basename $dts1)
soc2=$(basename $dts2)
soc1=${soc1%%[-.]*}
soc2=${soc2%%[-.]*}
colordiff -u $options \
--label $dts1 <(sed -e "s/$soc1/<SOC>/gi" $dts1) \
--label $dts2 <(sed -e "s/$soc2/<SOC>/gi" $dts2)
$
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 106+ messages in thread
* Re: [PATCH v2 0/16] ARM: r8a7790: add soc node
2018-01-19 9:41 ` Geert Uytterhoeven
@ 2018-01-19 10:09 ` Simon Horman
-1 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-19 10:09 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Linux-Renesas, Magnus Damm, linux-arm-kernel
On Fri, Jan 19, 2018 at 10:41:17AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > this patchset adds an soc node, moves all nodes for IP blocks with an
> > address on the bus to be sub nodes of the soc node, and sorts subnodes of
> > the root and soc nodes.
> >
> > The use of an soc node is consistent with handling of R-Car Gen3, RZ/G1,
> > and R-Car V2H (R8A77920) SoCs upstream. This patch-set adds it for all
> > other R-Car Gen2 SoCs: r8a7790 (H2), r8a7791 (M2-W), r8a7793 (M2-N),
> > r8a7794 (E2).
> >
> > Sorting of nodes is also done for the R-Car V2H (R8A77920), making it
> > consistent across all R-Car Gen2 SoCs and thus allowing easier comparison
> > of DTs of different R-Car Gen2 SoCs.
> >
> > The patchset also fixes some minor whitespace problems.
>
> Thank you, this is a great cleanup!
>
> Now the structure of the DTSes is the same for all SoCs, they can be
> compared more easily using my soc-dts-diff script (which BTW also works
> for e.g. driver source files using the <soc>-<module>.c pattern).
Thanks, this seems very nice.
I have applied this series.
^ permalink raw reply [flat|nested] 106+ messages in thread
* [PATCH v2 0/16] ARM: r8a7790: add soc node
@ 2018-01-19 10:09 ` Simon Horman
0 siblings, 0 replies; 106+ messages in thread
From: Simon Horman @ 2018-01-19 10:09 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jan 19, 2018 at 10:41:17AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Jan 17, 2018 at 5:17 PM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > this patchset adds an soc node, moves all nodes for IP blocks with an
> > address on the bus to be sub nodes of the soc node, and sorts subnodes of
> > the root and soc nodes.
> >
> > The use of an soc node is consistent with handling of R-Car Gen3, RZ/G1,
> > and R-Car V2H (R8A77920) SoCs upstream. This patch-set adds it for all
> > other R-Car Gen2 SoCs: r8a7790 (H2), r8a7791 (M2-W), r8a7793 (M2-N),
> > r8a7794 (E2).
> >
> > Sorting of nodes is also done for the R-Car V2H (R8A77920), making it
> > consistent across all R-Car Gen2 SoCs and thus allowing easier comparison
> > of DTs of different R-Car Gen2 SoCs.
> >
> > The patchset also fixes some minor whitespace problems.
>
> Thank you, this is a great cleanup!
>
> Now the structure of the DTSes is the same for all SoCs, they can be
> compared more easily using my soc-dts-diff script (which BTW also works
> for e.g. driver source files using the <soc>-<module>.c pattern).
Thanks, this seems very nice.
I have applied this series.
^ permalink raw reply [flat|nested] 106+ messages in thread
end of thread, other threads:[~2018-01-19 10:09 UTC | newest]
Thread overview: 106+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-01-17 16:17 [PATCH v2 0/16] ARM: r8a7790: add soc node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-17 16:17 ` [PATCH v2 01/16] ARM: dts: r8a7790: consistently use single space after = Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 0:16 ` Niklas Söderlund
2018-01-18 0:16 ` Niklas Söderlund
2018-01-19 8:13 ` Geert Uytterhoeven
2018-01-19 8:13 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 02/16] ARM: dts: r8a7790: add soc node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 0:24 ` Niklas Söderlund
2018-01-18 0:24 ` Niklas Söderlund
2018-01-19 8:21 ` Geert Uytterhoeven
2018-01-19 8:21 ` Geert Uytterhoeven
2018-01-19 8:19 ` Geert Uytterhoeven
2018-01-19 8:19 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 03/16] ARM: dts: r8a7790: sort subnodes of " Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 0:29 ` Niklas Söderlund
2018-01-18 0:29 ` Niklas Söderlund
2018-01-19 8:39 ` Geert Uytterhoeven
2018-01-19 8:39 ` Geert Uytterhoeven
2018-01-19 9:26 ` Simon Horman
2018-01-19 9:26 ` Simon Horman
2018-01-17 16:17 ` [PATCH v2 04/16] ARM: dts: r8a7790: sort subnodes of root node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 0:30 ` Niklas Söderlund
2018-01-18 0:30 ` Niklas Söderlund
2018-01-19 8:29 ` Geert Uytterhoeven
2018-01-19 8:29 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 05/16] ARM: dts: r8a7791: consistently use single space after = Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 0:31 ` Niklas Söderlund
2018-01-18 0:31 ` Niklas Söderlund
2018-01-19 8:40 ` Geert Uytterhoeven
2018-01-19 8:40 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 06/16] ARM: dts: r8a7791: add soc node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-19 8:46 ` Geert Uytterhoeven
2018-01-19 8:46 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 07/16] ARM: dts: r8a7791: sort subnodes of root node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 1:06 ` Niklas Söderlund
2018-01-18 1:06 ` Niklas Söderlund
2018-01-19 8:48 ` Geert Uytterhoeven
2018-01-19 8:48 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 08/16] ARM: dts: r8a7792: sort subnodes of soc node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 1:15 ` Niklas Söderlund
2018-01-18 1:15 ` Niklas Söderlund
2018-01-19 8:50 ` Geert Uytterhoeven
2018-01-19 8:50 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 09/16] ARM: dts: r8a7793: consistently use single space after = Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 1:16 ` Niklas Söderlund
2018-01-18 1:16 ` Niklas Söderlund
2018-01-19 8:51 ` Geert Uytterhoeven
2018-01-19 8:51 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 10/16] ARM: dts: r8a7793: add soc node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 1:29 ` Niklas Söderlund
2018-01-18 1:29 ` Niklas Söderlund
2018-01-19 8:55 ` Geert Uytterhoeven
2018-01-19 8:55 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 11/16] ARM: dts: r8a7793: sort subnodes of " Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 1:43 ` Niklas Söderlund
2018-01-18 1:43 ` Niklas Söderlund
2018-01-19 8:55 ` Geert Uytterhoeven
2018-01-19 8:55 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 12/16] ARM: dts: r8a7793: sort subnodes of root node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 1:45 ` Niklas Söderlund
2018-01-18 1:45 ` Niklas Söderlund
2018-01-19 8:55 ` Geert Uytterhoeven
2018-01-19 8:55 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 13/16] ARM: dts: r8a7794: consistently use single space after = Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 1:46 ` Niklas Söderlund
2018-01-18 1:46 ` Niklas Söderlund
2018-01-19 8:56 ` Geert Uytterhoeven
2018-01-19 8:56 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 14/16] ARM: dts: r8a7794: add soc node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 2:00 ` Niklas Söderlund
2018-01-18 2:00 ` Niklas Söderlund
2018-01-19 8:57 ` Geert Uytterhoeven
2018-01-19 8:57 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 15/16] ARM: dts: r8a7794: sort subnodes of " Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 2:11 ` Niklas Söderlund
2018-01-18 2:11 ` Niklas Söderlund
2018-01-19 8:59 ` Geert Uytterhoeven
2018-01-19 8:59 ` Geert Uytterhoeven
2018-01-17 16:17 ` [PATCH v2 16/16] ARM: dts: r8a7794: sort subnodes of root node Simon Horman
2018-01-17 16:17 ` Simon Horman
2018-01-18 2:20 ` Niklas Söderlund
2018-01-18 2:20 ` Niklas Söderlund
2018-01-18 8:28 ` Simon Horman
2018-01-18 8:28 ` Simon Horman
2018-01-19 8:59 ` Geert Uytterhoeven
2018-01-19 8:59 ` Geert Uytterhoeven
2018-01-19 9:41 ` [PATCH v2 0/16] ARM: r8a7790: add soc node Geert Uytterhoeven
2018-01-19 9:41 ` Geert Uytterhoeven
2018-01-19 10:09 ` Simon Horman
2018-01-19 10:09 ` Simon Horman
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