[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.

Force use of the ARM architectured timer on these SoCs.
This allows to:
  - Remove the calls to shmobile_init_delay() from the corresponding
    machine vectors,
  - Remove a check in timer setup specific to R-Car Gen2,
  - Remove a check in shmobile_init_delay().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
We still need shmobile_init_delay to setup loops-per-jiffies for the
other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?

 arch/arm/mach-shmobile/Kconfig           | 2 ++
 arch/arm/mach-shmobile/setup-r8a73a4.c   | 1 -
 arch/arm/mach-shmobile/setup-rcar-gen2.c | 4 ----
 arch/arm/mach-shmobile/timer.c           | 8 --------
 4 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 0b67254eabb2c4e8..aeb2eed085988bb8 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -15,6 +15,7 @@ config ARCH_RCAR_GEN1
 
 config ARCH_RCAR_GEN2
 	bool
+	select HAVE_ARM_ARCH_TIMER
 	select PM
 	select PM_GENERIC_DOMAINS
 	select RENESAS_IRQC
@@ -58,6 +59,7 @@ config ARCH_R8A73A4
 	bool "R-Mobile APE6 (R8A73A40)"
 	select ARCH_RMOBILE
 	select ARM_ERRATA_798181 if SMP
+	select HAVE_ARM_ARCH_TIMER
 	select RENESAS_IRQC
 
 config ARCH_R8A7740
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index ef391fa368e9ad00..23a29a0ea9c96c35 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -18,7 +18,6 @@ static const char *const r8a73a4_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
-	.init_early	= shmobile_init_delay,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= r8a73a4_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 117531367f1779c6..013acc97795cbfc4 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -59,7 +59,6 @@ static unsigned int __init get_extal_freq(void)
 
 void __init rcar_gen2_timer_init(void)
 {
-#ifdef CONFIG_ARM_ARCH_TIMER
 	void __iomem *base;
 	u32 freq;
 
@@ -101,7 +100,6 @@ void __init rcar_gen2_timer_init(void)
 	}
 
 	iounmap(base);
-#endif /* CONFIG_ARM_ARCH_TIMER */
 
 	of_clk_init(NULL);
 	timer_probe();
@@ -187,7 +185,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
-	.init_early	= shmobile_init_delay,
 	.init_late	= shmobile_init_late,
 	.init_time	= rcar_gen2_timer_init,
 	.reserve	= rcar_gen2_reserve,
@@ -202,7 +199,6 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
-	.init_early	= shmobile_init_delay,
 	.init_late	= shmobile_init_late,
 	.init_time	= rcar_gen2_timer_init,
 	.reserve	= rcar_gen2_reserve,
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 6196a63803853048..828e8aea037e7d5e 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -32,14 +32,6 @@ void __init shmobile_init_delay(void)
 	for_each_child_of_node(cpus, np) {
 		u32 freq;
 
-		if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) &&
-		    (of_device_is_compatible(np, "arm,cortex-a7") ||
-		     of_device_is_compatible(np, "arm,cortex-a15"))) {
-			of_node_put(np);
-			of_node_put(cpus);
-			return;
-		}
-
 		if (!of_property_read_u32(np, "clock-frequency", &freq))
 			max_freq = max(max_freq, freq);
 	}
-- 
2.17.1

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.

Force use of the ARM architectured timer on these SoCs.
This allows to:
  - Remove the calls to shmobile_init_delay() from the corresponding
    machine vectors,
  - Remove a check in timer setup specific to R-Car Gen2,
  - Remove a check in shmobile_init_delay().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
We still need shmobile_init_delay to setup loops-per-jiffies for the
other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?

 arch/arm/mach-shmobile/Kconfig           | 2 ++
 arch/arm/mach-shmobile/setup-r8a73a4.c   | 1 -
 arch/arm/mach-shmobile/setup-rcar-gen2.c | 4 ----
 arch/arm/mach-shmobile/timer.c           | 8 --------
 4 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 0b67254eabb2c4e8..aeb2eed085988bb8 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -15,6 +15,7 @@ config ARCH_RCAR_GEN1
 
 config ARCH_RCAR_GEN2
 	bool
+	select HAVE_ARM_ARCH_TIMER
 	select PM
 	select PM_GENERIC_DOMAINS
 	select RENESAS_IRQC
@@ -58,6 +59,7 @@ config ARCH_R8A73A4
 	bool "R-Mobile APE6 (R8A73A40)"
 	select ARCH_RMOBILE
 	select ARM_ERRATA_798181 if SMP
+	select HAVE_ARM_ARCH_TIMER
 	select RENESAS_IRQC
 
 config ARCH_R8A7740
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index ef391fa368e9ad00..23a29a0ea9c96c35 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -18,7 +18,6 @@ static const char *const r8a73a4_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
-	.init_early	= shmobile_init_delay,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= r8a73a4_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 117531367f1779c6..013acc97795cbfc4 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -59,7 +59,6 @@ static unsigned int __init get_extal_freq(void)
 
 void __init rcar_gen2_timer_init(void)
 {
-#ifdef CONFIG_ARM_ARCH_TIMER
 	void __iomem *base;
 	u32 freq;
 
@@ -101,7 +100,6 @@ void __init rcar_gen2_timer_init(void)
 	}
 
 	iounmap(base);
-#endif /* CONFIG_ARM_ARCH_TIMER */
 
 	of_clk_init(NULL);
 	timer_probe();
@@ -187,7 +185,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
-	.init_early	= shmobile_init_delay,
 	.init_late	= shmobile_init_late,
 	.init_time	= rcar_gen2_timer_init,
 	.reserve	= rcar_gen2_reserve,
@@ -202,7 +199,6 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
-	.init_early	= shmobile_init_delay,
 	.init_late	= shmobile_init_late,
 	.init_time	= rcar_gen2_timer_init,
 	.reserve	= rcar_gen2_reserve,
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 6196a63803853048..828e8aea037e7d5e 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -32,14 +32,6 @@ void __init shmobile_init_delay(void)
 	for_each_child_of_node(cpus, np) {
 		u32 freq;
 
-		if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) &&
-		    (of_device_is_compatible(np, "arm,cortex-a7") ||
-		     of_device_is_compatible(np, "arm,cortex-a15"))) {
-			of_node_put(np);
-			of_node_put(cpus);
-			return;
-		}
-
 		if (!of_property_read_u32(np, "clock-frequency", &freq))
 			max_freq = max(max_freq, freq);
 	}
-- 
2.17.1

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Magnus Damm]

On Fri, Jul 13, 2018 at 1:08 AM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> Cortex-A15 CPU cores, all of which have ARM architectured timers.
>
> Force use of the ARM architectured timer on these SoCs.
> This allows to:
>   - Remove the calls to shmobile_init_delay() from the corresponding
>     machine vectors,
>   - Remove a check in timer setup specific to R-Car Gen2,
>   - Remove a check in shmobile_init_delay().
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---

Hi Geert,

Thanks for cleaning up stuff.

> We still need shmobile_init_delay to setup loops-per-jiffies for the
> other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?

Perhaps unrelated, but on older kernels with Cortex-A9 the TWD timer
was only available when using SMP. So historically on our single-core
systems (with CA8 or CA9 or when using CA9 multi core with maxcpus=1)
we had no timer available unless we also used a CMT/TMU or similar.

Exactly what the level of software support is available for the ARM
timers at this point I'm not so sure about.

Cheers,

/ magnus

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Magnus Damm]

On Fri, Jul 13, 2018 at 1:08 AM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> Cortex-A15 CPU cores, all of which have ARM architectured timers.
>
> Force use of the ARM architectured timer on these SoCs.
> This allows to:
>   - Remove the calls to shmobile_init_delay() from the corresponding
>     machine vectors,
>   - Remove a check in timer setup specific to R-Car Gen2,
>   - Remove a check in shmobile_init_delay().
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---

Hi Geert,

Thanks for cleaning up stuff.

> We still need shmobile_init_delay to setup loops-per-jiffies for the
> other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?

Perhaps unrelated, but on older kernels with Cortex-A9 the TWD timer
was only available when using SMP. So historically on our single-core
systems (with CA8 or CA9 or when using CA9 multi core with maxcpus=1)
we had no timer available unless we also used a CMT/TMU or similar.

Exactly what the level of software support is available for the ARM
timers at this point I'm not so sure about.

Cheers,

/ magnus

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Magnus,

On Fri, Jul 13, 2018 at 5:11 AM Magnus Damm <magnus.damm@gmail.com> wrote:
> On Fri, Jul 13, 2018 at 1:08 AM, Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> >
> > Force use of the ARM architectured timer on these SoCs.
> > This allows to:
> >   - Remove the calls to shmobile_init_delay() from the corresponding
> >     machine vectors,
> >   - Remove a check in timer setup specific to R-Car Gen2,
> >   - Remove a check in shmobile_init_delay().
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

> > We still need shmobile_init_delay to setup loops-per-jiffies for the
> > other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?
>
> Perhaps unrelated, but on older kernels with Cortex-A9 the TWD timer
> was only available when using SMP. So historically on our single-core
> systems (with CA8 or CA9 or when using CA9 multi core with maxcpus=1)
> we had no timer available unless we also used a CMT/TMU or similar.
>
> Exactly what the level of software support is available for the ARM
> timers at this point I'm not so sure about.

Using the TWD timer indeed has two issues:
  - It's available on multi-core Cortex-A9 SoCs only,
  - Its driver does not call register_current_timer_delay(), so it doesn't set
    up lpj_fine for skipping loop calibration.

The global timer driver does call register_current_timer_delay(), but so far no
Renesas SoCs describe its presence in DT.

At least SH-Mobile AG5 and R-Car M1A and H1 seem to have it.
RZ/A1 (and A2) and R-Mobile A1 don't seem to have it, though.
Perhaps the call to register_current_timer_delay() could be added to
the RZ/A OSTM driver?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Magnus,

On Fri, Jul 13, 2018 at 5:11 AM Magnus Damm <magnus.damm@gmail.com> wrote:
> On Fri, Jul 13, 2018 at 1:08 AM, Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> >
> > Force use of the ARM architectured timer on these SoCs.
> > This allows to:
> >   - Remove the calls to shmobile_init_delay() from the corresponding
> >     machine vectors,
> >   - Remove a check in timer setup specific to R-Car Gen2,
> >   - Remove a check in shmobile_init_delay().
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

> > We still need shmobile_init_delay to setup loops-per-jiffies for the
> > other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?
>
> Perhaps unrelated, but on older kernels with Cortex-A9 the TWD timer
> was only available when using SMP. So historically on our single-core
> systems (with CA8 or CA9 or when using CA9 multi core with maxcpus=1)
> we had no timer available unless we also used a CMT/TMU or similar.
>
> Exactly what the level of software support is available for the ARM
> timers at this point I'm not so sure about.

Using the TWD timer indeed has two issues:
  - It's available on multi-core Cortex-A9 SoCs only,
  - Its driver does not call register_current_timer_delay(), so it doesn't set
    up lpj_fine for skipping loop calibration.

The global timer driver does call register_current_timer_delay(), but so far no
Renesas SoCs describe its presence in DT.

At least SH-Mobile AG5 and R-Car M1A and H1 seem to have it.
RZ/A1 (and A2) and R-Mobile A1 don't seem to have it, though.
Perhaps the call to register_current_timer_delay() could be added to
the RZ/A OSTM driver?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Simon Horman]

On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> Cortex-A15 CPU cores, all of which have ARM architectured timers.
> 
> Force use of the ARM architectured timer on these SoCs.
> This allows to:
>   - Remove the calls to shmobile_init_delay() from the corresponding
>     machine vectors,
>   - Remove a check in timer setup specific to R-Car Gen2,
>   - Remove a check in shmobile_init_delay().
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Hi Geert,

on which boards did you test this?

> ---
> We still need shmobile_init_delay to setup loops-per-jiffies for the
> other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?
> 
>  arch/arm/mach-shmobile/Kconfig           | 2 ++
>  arch/arm/mach-shmobile/setup-r8a73a4.c   | 1 -
>  arch/arm/mach-shmobile/setup-rcar-gen2.c | 4 ----
>  arch/arm/mach-shmobile/timer.c           | 8 --------
>  4 files changed, 2 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
> index 0b67254eabb2c4e8..aeb2eed085988bb8 100644
> --- a/arch/arm/mach-shmobile/Kconfig
> +++ b/arch/arm/mach-shmobile/Kconfig
> @@ -15,6 +15,7 @@ config ARCH_RCAR_GEN1
>  
>  config ARCH_RCAR_GEN2
>  	bool
> +	select HAVE_ARM_ARCH_TIMER
>  	select PM
>  	select PM_GENERIC_DOMAINS
>  	select RENESAS_IRQC
> @@ -58,6 +59,7 @@ config ARCH_R8A73A4
>  	bool "R-Mobile APE6 (R8A73A40)"
>  	select ARCH_RMOBILE
>  	select ARM_ERRATA_798181 if SMP
> +	select HAVE_ARM_ARCH_TIMER
>  	select RENESAS_IRQC
>  
>  config ARCH_R8A7740
> diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
> index ef391fa368e9ad00..23a29a0ea9c96c35 100644
> --- a/arch/arm/mach-shmobile/setup-r8a73a4.c
> +++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
> @@ -18,7 +18,6 @@ static const char *const r8a73a4_boards_compat_dt[] __initconst = {
>  };
>  
>  DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
> -	.init_early	= shmobile_init_delay,
>  	.init_late	= shmobile_init_late,
>  	.dt_compat	= r8a73a4_boards_compat_dt,
>  MACHINE_END
> diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
> index 117531367f1779c6..013acc97795cbfc4 100644
> --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
> +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
> @@ -59,7 +59,6 @@ static unsigned int __init get_extal_freq(void)
>  
>  void __init rcar_gen2_timer_init(void)
>  {
> -#ifdef CONFIG_ARM_ARCH_TIMER
>  	void __iomem *base;
>  	u32 freq;
>  
> @@ -101,7 +100,6 @@ void __init rcar_gen2_timer_init(void)
>  	}
>  
>  	iounmap(base);
> -#endif /* CONFIG_ARM_ARCH_TIMER */
>  
>  	of_clk_init(NULL);
>  	timer_probe();
> @@ -187,7 +185,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
>  };
>  
>  DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
> -	.init_early	= shmobile_init_delay,
>  	.init_late	= shmobile_init_late,
>  	.init_time	= rcar_gen2_timer_init,
>  	.reserve	= rcar_gen2_reserve,
> @@ -202,7 +199,6 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = {
>  };
>  
>  DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
> -	.init_early	= shmobile_init_delay,
>  	.init_late	= shmobile_init_late,
>  	.init_time	= rcar_gen2_timer_init,
>  	.reserve	= rcar_gen2_reserve,
> diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
> index 6196a63803853048..828e8aea037e7d5e 100644
> --- a/arch/arm/mach-shmobile/timer.c
> +++ b/arch/arm/mach-shmobile/timer.c
> @@ -32,14 +32,6 @@ void __init shmobile_init_delay(void)
>  	for_each_child_of_node(cpus, np) {
>  		u32 freq;
>  
> -		if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) &&
> -		    (of_device_is_compatible(np, "arm,cortex-a7") ||
> -		     of_device_is_compatible(np, "arm,cortex-a15"))) {
> -			of_node_put(np);
> -			of_node_put(cpus);
> -			return;
> -		}
> -
>  		if (!of_property_read_u32(np, "clock-frequency", &freq))
>  			max_freq = max(max_freq, freq);
>  	}
> -- 
> 2.17.1
> 

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Simon Horman]

On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> Cortex-A15 CPU cores, all of which have ARM architectured timers.
> 
> Force use of the ARM architectured timer on these SoCs.
> This allows to:
>   - Remove the calls to shmobile_init_delay() from the corresponding
>     machine vectors,
>   - Remove a check in timer setup specific to R-Car Gen2,
>   - Remove a check in shmobile_init_delay().
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Hi Geert,

on which boards did you test this?

> ---
> We still need shmobile_init_delay to setup loops-per-jiffies for the
> other SoCs.  But perhaps we can use the Cortex-A9 global timer on those?
> 
>  arch/arm/mach-shmobile/Kconfig           | 2 ++
>  arch/arm/mach-shmobile/setup-r8a73a4.c   | 1 -
>  arch/arm/mach-shmobile/setup-rcar-gen2.c | 4 ----
>  arch/arm/mach-shmobile/timer.c           | 8 --------
>  4 files changed, 2 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
> index 0b67254eabb2c4e8..aeb2eed085988bb8 100644
> --- a/arch/arm/mach-shmobile/Kconfig
> +++ b/arch/arm/mach-shmobile/Kconfig
> @@ -15,6 +15,7 @@ config ARCH_RCAR_GEN1
>  
>  config ARCH_RCAR_GEN2
>  	bool
> +	select HAVE_ARM_ARCH_TIMER
>  	select PM
>  	select PM_GENERIC_DOMAINS
>  	select RENESAS_IRQC
> @@ -58,6 +59,7 @@ config ARCH_R8A73A4
>  	bool "R-Mobile APE6 (R8A73A40)"
>  	select ARCH_RMOBILE
>  	select ARM_ERRATA_798181 if SMP
> +	select HAVE_ARM_ARCH_TIMER
>  	select RENESAS_IRQC
>  
>  config ARCH_R8A7740
> diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
> index ef391fa368e9ad00..23a29a0ea9c96c35 100644
> --- a/arch/arm/mach-shmobile/setup-r8a73a4.c
> +++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
> @@ -18,7 +18,6 @@ static const char *const r8a73a4_boards_compat_dt[] __initconst = {
>  };
>  
>  DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
> -	.init_early	= shmobile_init_delay,
>  	.init_late	= shmobile_init_late,
>  	.dt_compat	= r8a73a4_boards_compat_dt,
>  MACHINE_END
> diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
> index 117531367f1779c6..013acc97795cbfc4 100644
> --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
> +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
> @@ -59,7 +59,6 @@ static unsigned int __init get_extal_freq(void)
>  
>  void __init rcar_gen2_timer_init(void)
>  {
> -#ifdef CONFIG_ARM_ARCH_TIMER
>  	void __iomem *base;
>  	u32 freq;
>  
> @@ -101,7 +100,6 @@ void __init rcar_gen2_timer_init(void)
>  	}
>  
>  	iounmap(base);
> -#endif /* CONFIG_ARM_ARCH_TIMER */
>  
>  	of_clk_init(NULL);
>  	timer_probe();
> @@ -187,7 +185,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
>  };
>  
>  DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
> -	.init_early	= shmobile_init_delay,
>  	.init_late	= shmobile_init_late,
>  	.init_time	= rcar_gen2_timer_init,
>  	.reserve	= rcar_gen2_reserve,
> @@ -202,7 +199,6 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = {
>  };
>  
>  DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
> -	.init_early	= shmobile_init_delay,
>  	.init_late	= shmobile_init_late,
>  	.init_time	= rcar_gen2_timer_init,
>  	.reserve	= rcar_gen2_reserve,
> diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
> index 6196a63803853048..828e8aea037e7d5e 100644
> --- a/arch/arm/mach-shmobile/timer.c
> +++ b/arch/arm/mach-shmobile/timer.c
> @@ -32,14 +32,6 @@ void __init shmobile_init_delay(void)
>  	for_each_child_of_node(cpus, np) {
>  		u32 freq;
>  
> -		if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) &&
> -		    (of_device_is_compatible(np, "arm,cortex-a7") ||
> -		     of_device_is_compatible(np, "arm,cortex-a15"))) {
> -			of_node_put(np);
> -			of_node_put(cpus);
> -			return;
> -		}
> -
>  		if (!of_property_read_u32(np, "clock-frequency", &freq))
>  			max_freq = max(max_freq, freq);
>  	}
> -- 
> 2.17.1
> 

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Simon,

On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> >
> > Force use of the ARM architectured timer on these SoCs.
> > This allows to:
> >   - Remove the calls to shmobile_init_delay() from the corresponding
> >     machine vectors,
> >   - Remove a check in timer setup specific to R-Car Gen2,
> >   - Remove a check in shmobile_init_delay().
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Hi Geert,
>
> on which boards did you test this?

On APE6EVM and Koelsch (R-Car M2-W).
I can give it a spin on a few more remote R-Car Gen2 boards if you want.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Simon,

On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> >
> > Force use of the ARM architectured timer on these SoCs.
> > This allows to:
> >   - Remove the calls to shmobile_init_delay() from the corresponding
> >     machine vectors,
> >   - Remove a check in timer setup specific to R-Car Gen2,
> >   - Remove a check in shmobile_init_delay().
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Hi Geert,
>
> on which boards did you test this?

On APE6EVM and Koelsch (R-Car M2-W).
I can give it a spin on a few more remote R-Car Gen2 boards if you want.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Simon,

On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > >
> > > Force use of the ARM architectured timer on these SoCs.
> > > This allows to:
> > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > >     machine vectors,
> > >   - Remove a check in timer setup specific to R-Car Gen2,
> > >   - Remove a check in shmobile_init_delay().
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > on which boards did you test this?
>
> On APE6EVM and Koelsch (R-Car M2-W).
> I can give it a spin on a few more remote R-Car Gen2 boards if you want.

I don't expect any issues, as shmobile_defconfig already enables
CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
a no-op in that case.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Simon,

On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > >
> > > Force use of the ARM architectured timer on these SoCs.
> > > This allows to:
> > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > >     machine vectors,
> > >   - Remove a check in timer setup specific to R-Car Gen2,
> > >   - Remove a check in shmobile_init_delay().
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > on which boards did you test this?
>
> On APE6EVM and Koelsch (R-Car M2-W).
> I can give it a spin on a few more remote R-Car Gen2 boards if you want.

I don't expect any issues, as shmobile_defconfig already enables
CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
a no-op in that case.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Chris Brandt]

On Friday, July 13, 2018, linux-renesas-soc-owner@vger.kernel.org wrote:
> > Exactly what the level of software support is available for the ARM
> > timers at this point I'm not so sure about.
> 
> Using the TWD timer indeed has two issues:
>   - It's available on multi-core Cortex-A9 SoCs only,
>   - Its driver does not call register_current_timer_delay(), so it doesn't
> set
>     up lpj_fine for skipping loop calibration.
> 
> The global timer driver does call register_current_timer_delay(), but so
> far no
> Renesas SoCs describe its presence in DT.
> 
> At least SH-Mobile AG5 and R-Car M1A and H1 seem to have it.
> RZ/A1 (and A2) and R-Mobile A1 don't seem to have it, though.
> Perhaps the call to register_current_timer_delay() could be added to
> the RZ/A OSTM driver?

For RZ/A1, technically you could use MTU2 or OSTM as your system timer. 
However, no one would every use MTU2 because OSTM is way more accurate.

Regardless, would we always call register_current_timer_delay() from the
OSTM driver?
Note that there are 2 OSTM channels on RZ/A1. The first one is loaded as
a clocksource, the second is used as an event counter. Would we call 
register_current_timer_delay() for both instances?

Chris

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Chris Brandt]

On Friday, July 13, 2018, linux-renesas-soc-owner at vger.kernel.org wrote:
> > Exactly what the level of software support is available for the ARM
> > timers at this point I'm not so sure about.
> 
> Using the TWD timer indeed has two issues:
>   - It's available on multi-core Cortex-A9 SoCs only,
>   - Its driver does not call register_current_timer_delay(), so it doesn't
> set
>     up lpj_fine for skipping loop calibration.
> 
> The global timer driver does call register_current_timer_delay(), but so
> far no
> Renesas SoCs describe its presence in DT.
> 
> At least SH-Mobile AG5 and R-Car M1A and H1 seem to have it.
> RZ/A1 (and A2) and R-Mobile A1 don't seem to have it, though.
> Perhaps the call to register_current_timer_delay() could be added to
> the RZ/A OSTM driver?

For RZ/A1, technically you could use MTU2 or OSTM as your system timer. 
However, no one would every use MTU2 because OSTM is way more accurate.

Regardless, would we always call register_current_timer_delay() from the
OSTM driver?
Note that there are 2 OSTM channels on RZ/A1. The first one is loaded as
a clocksource, the second is used as an event counter. Would we call 
register_current_timer_delay() for both instances?

Chris

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Chris,

On Fri, Jul 13, 2018 at 2:22 PM Chris Brandt <Chris.Brandt@renesas.com> wrote:
> On Friday, July 13, 2018, linux-renesas-soc-owner@vger.kernel.org wrote:
> > > Exactly what the level of software support is available for the ARM
> > > timers at this point I'm not so sure about.
> >
> > Using the TWD timer indeed has two issues:
> >   - It's available on multi-core Cortex-A9 SoCs only,
> >   - Its driver does not call register_current_timer_delay(), so it doesn't
> > set
> >     up lpj_fine for skipping loop calibration.
> >
> > The global timer driver does call register_current_timer_delay(), but so
> > far no
> > Renesas SoCs describe its presence in DT.
> >
> > At least SH-Mobile AG5 and R-Car M1A and H1 seem to have it.
> > RZ/A1 (and A2) and R-Mobile A1 don't seem to have it, though.
> > Perhaps the call to register_current_timer_delay() could be added to
> > the RZ/A OSTM driver?
>
> For RZ/A1, technically you could use MTU2 or OSTM as your system timer.
> However, no one would every use MTU2 because OSTM is way more accurate.
>
> Regardless, would we always call register_current_timer_delay() from the
> OSTM driver?
> Note that there are 2 OSTM channels on RZ/A1. The first one is loaded as
> a clocksource, the second is used as an event counter. Would we call
> register_current_timer_delay() for both instances?

For the clocksource only.
Note that register_current_timer_delay() has some protection against
multiple callers, and picks up the best timer found.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Chris,

On Fri, Jul 13, 2018 at 2:22 PM Chris Brandt <Chris.Brandt@renesas.com> wrote:
> On Friday, July 13, 2018, linux-renesas-soc-owner at vger.kernel.org wrote:
> > > Exactly what the level of software support is available for the ARM
> > > timers at this point I'm not so sure about.
> >
> > Using the TWD timer indeed has two issues:
> >   - It's available on multi-core Cortex-A9 SoCs only,
> >   - Its driver does not call register_current_timer_delay(), so it doesn't
> > set
> >     up lpj_fine for skipping loop calibration.
> >
> > The global timer driver does call register_current_timer_delay(), but so
> > far no
> > Renesas SoCs describe its presence in DT.
> >
> > At least SH-Mobile AG5 and R-Car M1A and H1 seem to have it.
> > RZ/A1 (and A2) and R-Mobile A1 don't seem to have it, though.
> > Perhaps the call to register_current_timer_delay() could be added to
> > the RZ/A OSTM driver?
>
> For RZ/A1, technically you could use MTU2 or OSTM as your system timer.
> However, no one would every use MTU2 because OSTM is way more accurate.
>
> Regardless, would we always call register_current_timer_delay() from the
> OSTM driver?
> Note that there are 2 OSTM channels on RZ/A1. The first one is loaded as
> a clocksource, the second is used as an event counter. Would we call
> register_current_timer_delay() for both instances?

For the clocksource only.
Note that register_current_timer_delay() has some protection against
multiple callers, and picks up the best timer found.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Simon Horman]

On Fri, Jul 13, 2018 at 10:33:17AM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
> > On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > > >
> > > > Force use of the ARM architectured timer on these SoCs.
> > > > This allows to:
> > > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > > >     machine vectors,
> > > >   - Remove a check in timer setup specific to R-Car Gen2,
> > > >   - Remove a check in shmobile_init_delay().
> > > >
> > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > >
> > > on which boards did you test this?
> >
> > On APE6EVM and Koelsch (R-Car M2-W).
> > I can give it a spin on a few more remote R-Car Gen2 boards if you want.
> 
> I don't expect any issues, as shmobile_defconfig already enables
> CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
> a no-op in that case.

I am happy if you are happy.
Shall I go ahead and apply this?

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Simon Horman]

On Fri, Jul 13, 2018 at 10:33:17AM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
> > On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > > >
> > > > Force use of the ARM architectured timer on these SoCs.
> > > > This allows to:
> > > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > > >     machine vectors,
> > > >   - Remove a check in timer setup specific to R-Car Gen2,
> > > >   - Remove a check in shmobile_init_delay().
> > > >
> > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > >
> > > on which boards did you test this?
> >
> > On APE6EVM and Koelsch (R-Car M2-W).
> > I can give it a spin on a few more remote R-Car Gen2 boards if you want.
> 
> I don't expect any issues, as shmobile_defconfig already enables
> CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
> a no-op in that case.

I am happy if you are happy.
Shall I go ahead and apply this?

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Simon,

On Tue, Jul 17, 2018 at 11:59 AM Simon Horman <horms@verge.net.au> wrote:
> On Fri, Jul 13, 2018 at 10:33:17AM +0200, Geert Uytterhoeven wrote:
> > On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
> > <geert@linux-m68k.org> wrote:
> > > On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > > > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > > > >
> > > > > Force use of the ARM architectured timer on these SoCs.
> > > > > This allows to:
> > > > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > > > >     machine vectors,
> > > > >   - Remove a check in timer setup specific to R-Car Gen2,
> > > > >   - Remove a check in shmobile_init_delay().
> > > > >
> > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > >
> > > > on which boards did you test this?
> > >
> > > On APE6EVM and Koelsch (R-Car M2-W).
> > > I can give it a spin on a few more remote R-Car Gen2 boards if you want.
> >
> > I don't expect any issues, as shmobile_defconfig already enables
> > CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
> > a no-op in that case.
>
> I am happy if you are happy.
> Shall I go ahead and apply this?

Yes, selecting HAVE_ARM_ARCH_TIMER is consistent with what several
other SoCs are already doing, and it leads to less code.

> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Geert Uytterhoeven]

Hi Simon,

On Tue, Jul 17, 2018 at 11:59 AM Simon Horman <horms@verge.net.au> wrote:
> On Fri, Jul 13, 2018 at 10:33:17AM +0200, Geert Uytterhoeven wrote:
> > On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
> > <geert@linux-m68k.org> wrote:
> > > On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > > > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > > > >
> > > > > Force use of the ARM architectured timer on these SoCs.
> > > > > This allows to:
> > > > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > > > >     machine vectors,
> > > > >   - Remove a check in timer setup specific to R-Car Gen2,
> > > > >   - Remove a check in shmobile_init_delay().
> > > > >
> > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > >
> > > > on which boards did you test this?
> > >
> > > On APE6EVM and Koelsch (R-Car M2-W).
> > > I can give it a spin on a few more remote R-Car Gen2 boards if you want.
> >
> > I don't expect any issues, as shmobile_defconfig already enables
> > CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
> > a no-op in that case.
>
> I am happy if you are happy.
> Shall I go ahead and apply this?

Yes, selecting HAVE_ARM_ARCH_TIMER is consistent with what several
other SoCs are already doing, and it leads to less code.

> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Simon Horman]

On Tue, Jul 17, 2018 at 12:12:14PM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Tue, Jul 17, 2018 at 11:59 AM Simon Horman <horms@verge.net.au> wrote:
> > On Fri, Jul 13, 2018 at 10:33:17AM +0200, Geert Uytterhoeven wrote:
> > > On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
> > > <geert@linux-m68k.org> wrote:
> > > > On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > > > > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > > > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > > > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > > > > >
> > > > > > Force use of the ARM architectured timer on these SoCs.
> > > > > > This allows to:
> > > > > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > > > > >     machine vectors,
> > > > > >   - Remove a check in timer setup specific to R-Car Gen2,
> > > > > >   - Remove a check in shmobile_init_delay().
> > > > > >
> > > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > >
> > > > > on which boards did you test this?
> > > >
> > > > On APE6EVM and Koelsch (R-Car M2-W).
> > > > I can give it a spin on a few more remote R-Car Gen2 boards if you want.
> > >
> > > I don't expect any issues, as shmobile_defconfig already enables
> > > CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
> > > a no-op in that case.
> >
> > I am happy if you are happy.
> > Shall I go ahead and apply this?
> 
> Yes, selecting HAVE_ARM_ARCH_TIMER is consistent with what several
> other SoCs are already doing, and it leads to less code.
> 
> > Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> 
> Thanks!

Thanks, applied.

[PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

[Simon Horman]

On Tue, Jul 17, 2018 at 12:12:14PM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Tue, Jul 17, 2018 at 11:59 AM Simon Horman <horms@verge.net.au> wrote:
> > On Fri, Jul 13, 2018 at 10:33:17AM +0200, Geert Uytterhoeven wrote:
> > > On Fri, Jul 13, 2018 at 10:19 AM Geert Uytterhoeven
> > > <geert@linux-m68k.org> wrote:
> > > > On Fri, Jul 13, 2018 at 10:08 AM Simon Horman <horms@verge.net.au> wrote:
> > > > > On Thu, Jul 12, 2018 at 06:08:57PM +0200, Geert Uytterhoeven wrote:
> > > > > > R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
> > > > > > Cortex-A15 CPU cores, all of which have ARM architectured timers.
> > > > > >
> > > > > > Force use of the ARM architectured timer on these SoCs.
> > > > > > This allows to:
> > > > > >   - Remove the calls to shmobile_init_delay() from the corresponding
> > > > > >     machine vectors,
> > > > > >   - Remove a check in timer setup specific to R-Car Gen2,
> > > > > >   - Remove a check in shmobile_init_delay().
> > > > > >
> > > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > >
> > > > > on which boards did you test this?
> > > >
> > > > On APE6EVM and Koelsch (R-Car M2-W).
> > > > I can give it a spin on a few more remote R-Car Gen2 boards if you want.
> > >
> > > I don't expect any issues, as shmobile_defconfig already enables
> > > CONFIG_HAVE_ARM_ARCH_TIMER, and shmobile_init_delay() was already
> > > a no-op in that case.
> >
> > I am happy if you are happy.
> > Shall I go ahead and apply this?
> 
> Yes, selecting HAVE_ARM_ARCH_TIMER is consistent with what several
> other SoCs are already doing, and it leads to less code.
> 
> > Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> 
> Thanks!

Thanks, applied.