* dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
@ 2018-07-02 9:18 ` Yoshihiro Shimoda
0 siblings, 0 replies; 8+ messages in thread
From: Yoshihiro Shimoda @ 2018-07-02 9:18 UTC (permalink / raw)
To: vinod.koul; +Cc: dmaengine, linux-renesas-soc, Yoshihiro Shimoda
This patch fixes an issue that unexpected retransfering happens
if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
the CHCR register. For example, sh-sci driver can reproduce this
issue like below:
In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
dmaengine_tx_status()
rcar_dmac_tx_status()
rcar_dmac_chan_get_residue()
rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
According to the description of commit 73a47bd0da66 ("dmaengine:
rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
will be transferred if CHCR::DE bit was cleared". So, this patch
doesn't need to check TCRB register.
Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
This patch is based on the latest slave-dma / fixes branch.
This issue can be reproduced by the following commands on r8a7795
Salvator-XS and Windows Teraterm :) :
# stty 921600
(Change Teraterm baud rate)
# cat > rx.txt
(Send 5MiB file by Teraterm. After a few minutes later, we cannot
input any commands by the serial console.)
drivers/dma/sh/rcar-dmac.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
index 2a2ccd9..8305a1c 100644
--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c
@@ -774,8 +774,9 @@ static void rcar_dmac_sync_tcr(struct rcar_dmac_chan *chan)
/* make sure all remaining data was flushed */
rcar_dmac_chcr_de_barrier(chan);
- /* back DE */
- rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
+ /* back DE if remain data exists */
+ if (rcar_dmac_chan_read(chan, RCAR_DMATCR))
+ rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
}
static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH] dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
@ 2018-07-02 9:18 ` Yoshihiro Shimoda
0 siblings, 0 replies; 8+ messages in thread
From: Yoshihiro Shimoda @ 2018-07-02 9:18 UTC (permalink / raw)
To: vinod.koul; +Cc: dmaengine, linux-renesas-soc, Yoshihiro Shimoda
This patch fixes an issue that unexpected retransfering happens
if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
the CHCR register. For example, sh-sci driver can reproduce this
issue like below:
In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
dmaengine_tx_status()
rcar_dmac_tx_status()
rcar_dmac_chan_get_residue()
rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
According to the description of commit 73a47bd0da66 ("dmaengine:
rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
will be transferred if CHCR::DE bit was cleared". So, this patch
doesn't need to check TCRB register.
Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
This patch is based on the latest slave-dma / fixes branch.
This issue can be reproduced by the following commands on r8a7795
Salvator-XS and Windows Teraterm :) :
# stty 921600
(Change Teraterm baud rate)
# cat > rx.txt
(Send 5MiB file by Teraterm. After a few minutes later, we cannot
input any commands by the serial console.)
drivers/dma/sh/rcar-dmac.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
index 2a2ccd9..8305a1c 100644
--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c
@@ -774,8 +774,9 @@ static void rcar_dmac_sync_tcr(struct rcar_dmac_chan *chan)
/* make sure all remaining data was flushed */
rcar_dmac_chcr_de_barrier(chan);
- /* back DE */
- rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
+ /* back DE if remain data exists */
+ if (rcar_dmac_chan_read(chan, RCAR_DMATCR))
+ rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
}
static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
2018-07-02 9:18 ` [PATCH] " Yoshihiro Shimoda
@ 2018-07-09 17:23 ` Vinod
-1 siblings, 0 replies; 8+ messages in thread
From: Vinod Koul @ 2018-07-09 17:23 UTC (permalink / raw)
To: Geert Uytterhoeven, Kuninori Morimoto
Cc: Yoshihiro Shimoda, dmaengine, linux-renesas-soc
On 02-07-18, 18:18, Yoshihiro Shimoda wrote:
> This patch fixes an issue that unexpected retransfering happens
> if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
> the CHCR register. For example, sh-sci driver can reproduce this
> issue like below:
>
> In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
> dmaengine_tx_status()
> rcar_dmac_tx_status()
> rcar_dmac_chan_get_residue()
> rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
>
> According to the description of commit 73a47bd0da66 ("dmaengine:
> rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
> will be transferred if CHCR::DE bit was cleared". So, this patch
> doesn't need to check TCRB register.
>
> Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> This patch is based on the latest slave-dma / fixes branch.
>
> This issue can be reproduced by the following commands on r8a7795
> Salvator-XS and Windows Teraterm :) :
> # stty 921600
> (Change Teraterm baud rate)
> # cat > rx.txt
> (Send 5MiB file by Teraterm. After a few minutes later, we cannot
> input any commands by the serial console.)
Ack/tested-by ..?
>
> drivers/dma/sh/rcar-dmac.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
> index 2a2ccd9..8305a1c 100644
> --- a/drivers/dma/sh/rcar-dmac.c
> +++ b/drivers/dma/sh/rcar-dmac.c
> @@ -774,8 +774,9 @@ static void rcar_dmac_sync_tcr(struct rcar_dmac_chan *chan)
> /* make sure all remaining data was flushed */
> rcar_dmac_chcr_de_barrier(chan);
>
> - /* back DE */
> - rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
> + /* back DE if remain data exists */
> + if (rcar_dmac_chan_read(chan, RCAR_DMATCR))
> + rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
> }
>
> static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe dmaengine" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
@ 2018-07-09 17:23 ` Vinod
0 siblings, 0 replies; 8+ messages in thread
From: Vinod @ 2018-07-09 17:23 UTC (permalink / raw)
To: Geert Uytterhoeven, Kuninori Morimoto
Cc: Yoshihiro Shimoda, dmaengine, linux-renesas-soc
On 02-07-18, 18:18, Yoshihiro Shimoda wrote:
> This patch fixes an issue that unexpected retransfering happens
> if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
> the CHCR register. For example, sh-sci driver can reproduce this
> issue like below:
>
> In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
> dmaengine_tx_status()
> rcar_dmac_tx_status()
> rcar_dmac_chan_get_residue()
> rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
>
> According to the description of commit 73a47bd0da66 ("dmaengine:
> rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
> will be transferred if CHCR::DE bit was cleared". So, this patch
> doesn't need to check TCRB register.
>
> Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> This patch is based on the latest slave-dma / fixes branch.
>
> This issue can be reproduced by the following commands on r8a7795
> Salvator-XS and Windows Teraterm :) :
> # stty 921600
> (Change Teraterm baud rate)
> # cat > rx.txt
> (Send 5MiB file by Teraterm. After a few minutes later, we cannot
> input any commands by the serial console.)
Ack/tested-by ..?
>
> drivers/dma/sh/rcar-dmac.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
> index 2a2ccd9..8305a1c 100644
> --- a/drivers/dma/sh/rcar-dmac.c
> +++ b/drivers/dma/sh/rcar-dmac.c
> @@ -774,8 +774,9 @@ static void rcar_dmac_sync_tcr(struct rcar_dmac_chan *chan)
> /* make sure all remaining data was flushed */
> rcar_dmac_chcr_de_barrier(chan);
>
> - /* back DE */
> - rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
> + /* back DE if remain data exists */
> + if (rcar_dmac_chan_read(chan, RCAR_DMATCR))
> + rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
> }
>
> static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe dmaengine" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
~Vinod
^ permalink raw reply [flat|nested] 8+ messages in thread
* dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
2018-07-02 9:18 ` [PATCH] " Yoshihiro Shimoda
@ 2018-07-10 15:20 ` Vinod
-1 siblings, 0 replies; 8+ messages in thread
From: Vinod Koul @ 2018-07-10 15:20 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: vinod.koul, dmaengine, linux-renesas-soc
On 02-07-18, 18:18, Yoshihiro Shimoda wrote:
> This patch fixes an issue that unexpected retransfering happens
> if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
> the CHCR register. For example, sh-sci driver can reproduce this
> issue like below:
>
> In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
> dmaengine_tx_status()
> rcar_dmac_tx_status()
> rcar_dmac_chan_get_residue()
> rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
>
> According to the description of commit 73a47bd0da66 ("dmaengine:
> rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
> will be transferred if CHCR::DE bit was cleared". So, this patch
> doesn't need to check TCRB register.
>
> Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> This patch is based on the latest slave-dma / fixes branch.
>
> This issue can be reproduced by the following commands on r8a7795
> Salvator-XS and Windows Teraterm :) :
> # stty 921600
> (Change Teraterm baud rate)
> # cat > rx.txt
> (Send 5MiB file by Teraterm. After a few minutes later, we cannot
> input any commands by the serial console.)
Applied after fixing subsystem name
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
@ 2018-07-10 15:20 ` Vinod
0 siblings, 0 replies; 8+ messages in thread
From: Vinod @ 2018-07-10 15:20 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: vinod.koul, dmaengine, linux-renesas-soc
On 02-07-18, 18:18, Yoshihiro Shimoda wrote:
> This patch fixes an issue that unexpected retransfering happens
> if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
> the CHCR register. For example, sh-sci driver can reproduce this
> issue like below:
>
> In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
> dmaengine_tx_status()
> rcar_dmac_tx_status()
> rcar_dmac_chan_get_residue()
> rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
>
> According to the description of commit 73a47bd0da66 ("dmaengine:
> rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
> will be transferred if CHCR::DE bit was cleared". So, this patch
> doesn't need to check TCRB register.
>
> Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> This patch is based on the latest slave-dma / fixes branch.
>
> This issue can be reproduced by the following commands on r8a7795
> Salvator-XS and Windows Teraterm :) :
> # stty 921600
> (Change Teraterm baud rate)
> # cat > rx.txt
> (Send 5MiB file by Teraterm. After a few minutes later, we cannot
> input any commands by the serial console.)
Applied after fixing subsystem name
--
~Vinod
^ permalink raw reply [flat|nested] 8+ messages in thread
* dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
2018-07-02 9:18 ` [PATCH] " Yoshihiro Shimoda
@ 2018-07-13 9:22 ` Geert Uytterhoeven
-1 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2018-07-13 9:22 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: Vinod Koul, dmaengine, Linux-Renesas
On Mon, Jul 2, 2018 at 11:41 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> This patch fixes an issue that unexpected retransfering happens
> if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
> the CHCR register. For example, sh-sci driver can reproduce this
> issue like below:
>
> In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
> dmaengine_tx_status()
> rcar_dmac_tx_status()
> rcar_dmac_chan_get_residue()
> rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
>
> According to the description of commit 73a47bd0da66 ("dmaengine:
> rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
> will be transferred if CHCR::DE bit was cleared". So, this patch
> doesn't need to check TCRB register.
>
> Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Looks reasonable
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
@ 2018-07-13 9:22 ` Geert Uytterhoeven
0 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2018-07-13 9:22 UTC (permalink / raw)
To: Yoshihiro Shimoda; +Cc: Vinod Koul, dmaengine, Linux-Renesas
On Mon, Jul 2, 2018 at 11:41 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> This patch fixes an issue that unexpected retransfering happens
> if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
> the CHCR register. For example, sh-sci driver can reproduce this
> issue like below:
>
> In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
> dmaengine_tx_status()
> rcar_dmac_tx_status()
> rcar_dmac_chan_get_residue()
> rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
>
> According to the description of commit 73a47bd0da66 ("dmaengine:
> rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
> will be transferred if CHCR::DE bit was cleared". So, this patch
> doesn't need to check TCRB register.
>
> Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Looks reasonable
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-07-13 9:36 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-13 9:22 dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0 Geert Uytterhoeven
2018-07-13 9:22 ` [PATCH] " Geert Uytterhoeven
-- strict thread matches above, loose matches on Subject: below --
2018-07-10 15:20 Vinod Koul
2018-07-10 15:20 ` [PATCH] " Vinod
2018-07-09 17:23 Vinod Koul
2018-07-09 17:23 ` [PATCH] " Vinod
2018-07-02 9:18 Yoshihiro Shimoda
2018-07-02 9:18 ` [PATCH] " Yoshihiro Shimoda
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