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From: Emil Renner Berthing <kernel@esmil.dk>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: linux-riscv <linux-riscv@lists.infradead.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Jiri Slaby <jirislaby@kernel.org>,
	Maximilian Luz <luzmaximilian@gmail.com>,
	Sagar Kadam <sagar.kadam@sifive.com>,
	Drew Fustini <drew@beagleboard.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michael Zhu <michael.zhu@starfivetech.com>,
	Fu Wei <tekkamanninja@gmail.com>, Anup Patel <anup.patel@wdc.com>,
	Atish Patra <atish.patra@wdc.com>,
	Matteo Croce <mcroce@microsoft.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 01/16] RISC-V: Add StarFive SoC Kconfig option
Date: Fri, 22 Oct 2021 11:40:05 +0200	[thread overview]
Message-ID: <CANBLGcxJGgi9nuT6LpjGgPj1bg0aW-ELRCAO0Csv3xi82gTCnQ@mail.gmail.com> (raw)
In-Reply-To: <CAHp75VfD73Nsrp-3hMzFtuEAfka+rRc=2m0ZZYddhWBAzg=QAw@mail.gmail.com>

On Fri, 22 Oct 2021 at 10:51, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> On Thu, Oct 21, 2021 at 8:42 PM Emil Renner Berthing <kernel@esmil.dk> wrote:
> >
> > Add StarFive Kconfig option to select SoC specific and common drivers
> > required for these SoCs.
>
> ...
>
> > +config SOC_STARFIVE
> > +       bool "StarFive SoCs"
> > +       select PINCTRL
> > +       select RESET_CONTROLLER
>
> > +       select SIFIVE_PLIC
>
> If this is well understood and platform related the above two are too
> generic. Why have you selected them?

From your last comments the criterion seemed to be to only add it here
if it would otherwise fail to boot. Well it does fail to boot without
the reset and pinctrl drivers. The clock driver too, but RISCV already
selects COMMON_CLK. Once PINCTRL and RESET_CONTROLLER is selected the
specific drivers defaults to SOC_STARFIVE.

Alternatively we'd select the drivers too, but I can't promise that
future StarFive chips will need the same JH7100 clock and reset
drivers. Doing it this way means that selecting SOC_STARFIVE by
default gives you a kernel that will boot on all StarFive SoCs, but
you can still customise it further to your particular chip. It seems
like SOC_SIFIVE is doing the same.

> > +       help
> > +         This enables support for StarFive SoC platform hardware.
>
> Not too much to read here. What is the point of this help?
> I would elaborate what kind of platform it may support, what kind of
> drivers it selects due to necessity of the accomplishing the boot
> process, etc.

This is exactly as the other descriptions in this file. I don't know
why SOC_STARFIVE should be special.

/Emil

WARNING: multiple messages have this Message-ID (diff)
From: Emil Renner Berthing <kernel@esmil.dk>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: linux-riscv <linux-riscv@lists.infradead.org>,
	 devicetree <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	 "open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>,
	 Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	 Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	 Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	 Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	 Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Jiri Slaby <jirislaby@kernel.org>,
	 Maximilian Luz <luzmaximilian@gmail.com>,
	Sagar Kadam <sagar.kadam@sifive.com>,
	Drew Fustini <drew@beagleboard.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michael Zhu <michael.zhu@starfivetech.com>,
	Fu Wei <tekkamanninja@gmail.com>,
	 Anup Patel <anup.patel@wdc.com>,
	Atish Patra <atish.patra@wdc.com>,
	 Matteo Croce <mcroce@microsoft.com>,
	 Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 01/16] RISC-V: Add StarFive SoC Kconfig option
Date: Fri, 22 Oct 2021 11:40:05 +0200	[thread overview]
Message-ID: <CANBLGcxJGgi9nuT6LpjGgPj1bg0aW-ELRCAO0Csv3xi82gTCnQ@mail.gmail.com> (raw)
In-Reply-To: <CAHp75VfD73Nsrp-3hMzFtuEAfka+rRc=2m0ZZYddhWBAzg=QAw@mail.gmail.com>

On Fri, 22 Oct 2021 at 10:51, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> On Thu, Oct 21, 2021 at 8:42 PM Emil Renner Berthing <kernel@esmil.dk> wrote:
> >
> > Add StarFive Kconfig option to select SoC specific and common drivers
> > required for these SoCs.
>
> ...
>
> > +config SOC_STARFIVE
> > +       bool "StarFive SoCs"
> > +       select PINCTRL
> > +       select RESET_CONTROLLER
>
> > +       select SIFIVE_PLIC
>
> If this is well understood and platform related the above two are too
> generic. Why have you selected them?

From your last comments the criterion seemed to be to only add it here
if it would otherwise fail to boot. Well it does fail to boot without
the reset and pinctrl drivers. The clock driver too, but RISCV already
selects COMMON_CLK. Once PINCTRL and RESET_CONTROLLER is selected the
specific drivers defaults to SOC_STARFIVE.

Alternatively we'd select the drivers too, but I can't promise that
future StarFive chips will need the same JH7100 clock and reset
drivers. Doing it this way means that selecting SOC_STARFIVE by
default gives you a kernel that will boot on all StarFive SoCs, but
you can still customise it further to your particular chip. It seems
like SOC_SIFIVE is doing the same.

> > +       help
> > +         This enables support for StarFive SoC platform hardware.
>
> Not too much to read here. What is the point of this help?
> I would elaborate what kind of platform it may support, what kind of
> drivers it selects due to necessity of the accomplishing the boot
> process, etc.

This is exactly as the other descriptions in this file. I don't know
why SOC_STARFIVE should be special.

/Emil

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-10-22  9:40 UTC|newest]

Thread overview: 143+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-21 17:42 [PATCH v2 00/16] Basic StarFive JH7100 RISC-V SoC support Emil Renner Berthing
2021-10-21 17:42 ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 01/16] RISC-V: Add StarFive SoC Kconfig option Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-22  8:50   ` Andy Shevchenko
2021-10-22  8:50     ` Andy Shevchenko
2021-10-22  9:40     ` Emil Renner Berthing [this message]
2021-10-22  9:40       ` Emil Renner Berthing
2021-10-22 12:40       ` Andy Shevchenko
2021-10-22 12:40         ` Andy Shevchenko
2021-10-21 17:42 ` [PATCH v2 02/16] dt-bindings: timer: Add StarFive JH7100 clint Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 03/16] dt-bindings: interrupt-controller: Add StarFive JH7100 plic Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-29  1:37   ` Rob Herring
2021-10-29  1:37     ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 04/16] dt-bindings: clock: starfive: Add JH7100 clock definitions Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-29  1:42   ` Rob Herring
2021-10-29  1:42     ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 05/16] dt-bindings: clock: starfive: Add JH7100 bindings Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-29  1:42   ` Rob Herring
2021-10-29  1:42     ` Rob Herring
2021-10-29 13:05     ` Emil Renner Berthing
2021-10-29 13:05       ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 06/16] clk: starfive: Add JH7100 clock generator driver Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-22 12:33   ` Andy Shevchenko
2021-10-22 12:33     ` Andy Shevchenko
2021-10-22 12:44     ` Geert Uytterhoeven
2021-10-22 12:44       ` Geert Uytterhoeven
2021-10-22 13:13     ` Emil Renner Berthing
2021-10-22 13:13       ` Emil Renner Berthing
2021-10-22 13:35       ` Andy Shevchenko
2021-10-22 13:35         ` Andy Shevchenko
2021-10-26 20:19   ` Stephen Boyd
2021-10-26 20:19     ` Stephen Boyd
2021-10-26 22:35     ` Emil Renner Berthing
2021-10-26 22:35       ` Emil Renner Berthing
2021-10-27  0:54       ` Stephen Boyd
2021-10-27  0:54         ` Stephen Boyd
2021-10-27  9:30         ` Andy Shevchenko
2021-10-27  9:30           ` Andy Shevchenko
2021-10-27 10:24         ` Emil Renner Berthing
2021-10-27 10:24           ` Emil Renner Berthing
2021-10-27 10:32           ` Andy Shevchenko
2021-10-27 10:32             ` Andy Shevchenko
2021-10-27 11:22           ` Heiko Stübner
2021-10-27 11:22             ` Heiko Stübner
2021-10-21 17:42 ` [PATCH v2 07/16] dt-bindings: reset: Add StarFive JH7100 reset definitions Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-29  1:42   ` Rob Herring
2021-10-29  1:42     ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 08/16] dt-bindings: reset: Add Starfive JH7100 reset bindings Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-29  1:43   ` Rob Herring
2021-10-29  1:43     ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-22 12:55   ` Andy Shevchenko
2021-10-22 12:55     ` Andy Shevchenko
2021-10-22 13:34     ` Emil Renner Berthing
2021-10-22 13:34       ` Emil Renner Berthing
2021-10-22 13:38       ` Andy Shevchenko
2021-10-22 13:38         ` Andy Shevchenko
2021-10-22 13:50         ` Emil Renner Berthing
2021-10-22 13:50           ` Emil Renner Berthing
2021-10-22 13:56           ` Andy Shevchenko
2021-10-22 13:56             ` Andy Shevchenko
2021-10-22 14:25         ` Emil Renner Berthing
2021-10-22 14:25           ` Emil Renner Berthing
2021-10-22 14:49           ` Andy Shevchenko
2021-10-22 14:49             ` Andy Shevchenko
2021-10-22 14:50             ` Andy Shevchenko
2021-10-22 14:50               ` Andy Shevchenko
2021-10-22 14:56             ` Emil Renner Berthing
2021-10-22 14:56               ` Emil Renner Berthing
2021-10-22 15:24               ` Andy Shevchenko
2021-10-22 15:24                 ` Andy Shevchenko
2021-10-22 15:36                 ` Emil Renner Berthing
2021-10-22 15:36                   ` Emil Renner Berthing
2021-10-22 15:54                   ` Andy Shevchenko
2021-10-22 15:54                     ` Andy Shevchenko
2021-10-22 15:59                     ` Emil Renner Berthing
2021-10-22 15:59                       ` Emil Renner Berthing
2021-10-22 13:06   ` Andreas Schwab
2021-10-22 13:06     ` Andreas Schwab
2021-10-22 13:41     ` Emil Renner Berthing
2021-10-22 13:41       ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 10/16] dt-bindings: pinctrl: Add StarFive pinctrl definitions Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-29  1:44   ` Rob Herring
2021-10-29  1:44     ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 11/16] dt-bindings: pinctrl: Add StarFive JH7100 bindings Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-24 23:11   ` Linus Walleij
2021-10-24 23:11     ` Linus Walleij
2021-10-25  0:35     ` Emil Renner Berthing
2021-10-25  0:35       ` Emil Renner Berthing
2021-10-29  1:50   ` Rob Herring
2021-10-29  1:50     ` Rob Herring
2021-10-29 13:00     ` Emil Renner Berthing
2021-10-29 13:00       ` Emil Renner Berthing
2021-10-29 14:44       ` Rob Herring
2021-10-29 14:44         ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-21 19:01   ` Drew Fustini
2021-10-21 19:01     ` Drew Fustini
2021-10-21 19:50     ` Emil Renner Berthing
2021-10-21 19:50       ` Emil Renner Berthing
2021-10-22  2:06       ` Drew Fustini
2021-10-22  2:06         ` Drew Fustini
2021-10-22 13:31   ` Andy Shevchenko
2021-10-22 13:31     ` Andy Shevchenko
2021-10-23 18:45     ` Emil Renner Berthing
2021-10-23 18:45       ` Emil Renner Berthing
2021-10-23 20:28       ` Andy Shevchenko
2021-10-23 20:28         ` Andy Shevchenko
2021-10-23 21:02         ` Emil Renner Berthing
2021-10-23 21:02           ` Emil Renner Berthing
2021-10-24  9:29           ` Emil Renner Berthing
2021-10-24  9:29             ` Emil Renner Berthing
2021-10-25 10:15             ` Andy Shevchenko
2021-10-25 10:15               ` Andy Shevchenko
2021-10-25 10:24               ` Emil Renner Berthing
2021-10-25 10:24                 ` Emil Renner Berthing
2021-10-25 10:51                 ` Andy Shevchenko
2021-10-25 10:51                   ` Andy Shevchenko
2021-10-28 20:17   ` kernel test robot
2021-10-28 20:17     ` kernel test robot
2021-10-28 20:17     ` kernel test robot
2021-10-21 17:42 ` [PATCH v2 13/16] dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-29  1:50   ` Rob Herring
2021-10-29  1:50     ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 14/16] serial: 8250_dw: Add skip_clk_set_rate quirk Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 15/16] RISC-V: Add initial StarFive JH7100 device tree Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 16/16] RISC-V: Add BeagleV Starlight Beta " Emil Renner Berthing
2021-10-21 17:42   ` Emil Renner Berthing

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