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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Andrew Murray <andrew.murray@arm.com>
Cc: Al Grant <Al.Grant@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Coresight ML <coresight@lists.linaro.org>,
	Sudeep Holla <Sudeep.Holla@arm.com>, Leo Yan <leo.yan@linaro.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Mike Leach <mike.leach@linaro.org>
Subject: Re: [PATCH v4 6/6] dt-bindings: arm: coresight: Add support for coresight-needs-save-restore
Date: Sun, 4 Aug 2019 07:13:45 -0600	[thread overview]
Message-ID: <CANLsYkyVMRh_L5BfwWk=s-obh+xiZfjwqXUJkwgaZYWmc6Kuww@mail.gmail.com> (raw)
In-Reply-To: <20190802143751.GP56241@e119886-lin.cambridge.arm.com>

On Fri, 2 Aug 2019 at 08:37, Andrew Murray <andrew.murray@arm.com> wrote:
>
> On Fri, Aug 02, 2019 at 11:40:54AM +0100, Suzuki K Poulose wrote:
> > Hi Andrew,
> >
> > On 30/07/2019 13:51, Andrew Murray wrote:
> > > Some coresight components, because of choices made during hardware
> > > integration, require their state to be saved and restored across CPU low
> > > power states.
> > >
> > > The software has no reliable method of detecting when save/restore is
> > > required thus let's add a binding to inform the kernel.
> > >
> > > Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> > > ---
> > >   Documentation/devicetree/bindings/arm/coresight.txt | 3 +++
> > >   1 file changed, 3 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
> > > index fcc3bacfd8bc..7cbdb7893af8 100644
> > > --- a/Documentation/devicetree/bindings/arm/coresight.txt
> > > +++ b/Documentation/devicetree/bindings/arm/coresight.txt
> > > @@ -92,6 +92,9 @@ its hardware characteristcs.
> > >     * arm,cp14: must be present if the system accesses ETM/PTM management
> > >       registers via co-processor 14.
> > > +   * arm,coresight-needs-save-restore: boolean. Indicates that software
> > > +     should save/restore state across power down.
> > > +
> >
> > Do you think we could be a bit more descriptive here about when people could add
> > it to the DT ? Here we don't mention when someone should use this property and
> > it may be added to platforms where it may be absolutely unnecessary. How about :
> >
> > "Indicates that the hardware implementation may not honor the Powerup request
> > from the software and thus might loose the register context on CPU power
> > down (e.g, during CPUIdle). Software must save/restore the context during a
> > CPU power transition cycle."
>
> How about the following:
>
> "Indicates that the hardware will loose register context on CPU power down (e.g.
> CPUIdle), despite the TRCPDCR.PU bit being set."
>
> I'm keen to avoid making suggestions about what the kernel will do when it sees
> this flag and thus prefer to focus on describing what the hardware does. So I
> dropped your last sentence. However the name of the flag still implies policy
> which I don't like.
>
> I also changed the 'may not honor' wording, I'm not sure if this is really the
> case or if the spec is open to interpretation.
>
> It would great for this wording to also apply to other CS components though I
> haven't investigated if these have a PU bit or something different.

Exactly - the definition needs to be broad enough to apply to other CS
components.  Mike what do you think would be appropriate for CTIs?

>
> Thanks,
>
> Andrew Murray
>
> >
> > Cheers
> > Suzuki

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  reply	other threads:[~2019-08-04 13:14 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-30 12:51 [PATCH v4 0/6] coresight: etm4x: save/restore ETMv4 context across CPU low power states Andrew Murray
2019-07-30 12:51 ` [PATCH v4 1/6] coresight: etm4x: remove superfluous setting of os_unlock Andrew Murray
2019-07-30 12:51 ` [PATCH v4 2/6] coresight: etm4x: use explicit barriers on enable/disable Andrew Murray
2019-07-30 12:51   ` Andrew Murray
2019-08-01 13:31   ` Sasha Levin
2019-08-01 14:48     ` Mathieu Poirier
2019-08-01 14:48       ` Mathieu Poirier
2019-08-02 18:08   ` Sasha Levin
2019-07-30 12:51 ` [PATCH v4 3/6] coresight: etm4x: use module_param instead of module_param_named Andrew Murray
2019-08-02 10:23   ` Suzuki K Poulose
2019-07-30 12:51 ` [PATCH v4 4/6] coresight: etm4x: improve clarity of etm4_os_unlock comment Andrew Murray
2019-07-30 12:51 ` [PATCH v4 5/6] coresight: etm4x: save/restore state across CPU low power states Andrew Murray
2019-07-30 21:16   ` Mathieu Poirier
2019-07-30 21:45     ` Andrew Murray
2019-07-31  8:16       ` Mike Leach
2019-07-31  9:45         ` Andrew Murray
2019-08-02 10:54   ` Suzuki K Poulose
2019-08-14  9:12     ` Andrew Murray
2019-07-30 12:51 ` [PATCH v4 6/6] dt-bindings: arm: coresight: Add support for coresight-needs-save-restore Andrew Murray
2019-08-02 10:40   ` Suzuki K Poulose
2019-08-02 14:37     ` Andrew Murray
2019-08-04 13:13       ` Mathieu Poirier [this message]
2019-08-14 10:01         ` Andrew Murray
2019-08-14 11:06           ` Mike Leach
2019-08-14 12:35             ` Suzuki K Poulose
2019-08-14 12:49               ` Andrew Murray
2019-08-14 14:20               ` Mike Leach
2019-07-30 20:12 ` [PATCH v4 0/6] coresight: etm4x: save/restore ETMv4 context across CPU low power states Mathieu Poirier
2019-07-30 21:46   ` Andrew Murray

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