[PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

Hi,

this series fixes an issue with the IPU DC/DP/IDMAC disable sequence. The
interrupt waiting code didn't work as expected, sometimes causing busy waits
longer than the timeout in drm_atomic_helper_wait_for_vblanks, which would
cause crashes similar to the reported "imxdrm issue on SABRE Lite" [1].

[1] http://www.spinics.net/lists/dri-devel/msg132485.html

I could only reproduce the error when the overlay plane was involved, using
weston with the atomic modeset patchset to trigger it, so I'm not sure if this
fixes the issue above, too.

regards
Philipp

Lucas Stach (1):
  gpu: ipu-v3: remove IRQ dance on DC channel disable

Philipp Zabel (3):
  gpu: ipu-v3: add unsynchronised DP channel disabling
  drm/imx: call drm_atomic_helper_commit_hw_done after
    drm_atomic_helper_wait_for_vblanks
  drm/imx: add deferred plane disabling

 drivers/gpu/drm/imx/imx-drm-core.c | 11 +++++--
 drivers/gpu/drm/imx/ipuv3-crtc.c   | 22 +++++++++++++-
 drivers/gpu/drm/imx/ipuv3-plane.c  | 24 ++++++++++-----
 drivers/gpu/drm/imx/ipuv3-plane.h  |  5 ++++
 drivers/gpu/ipu-v3/ipu-common.c    |  8 +++--
 drivers/gpu/ipu-v3/ipu-dc.c        | 61 +++-----------------------------------
 drivers/gpu/ipu-v3/ipu-dp.c        | 15 ++++------
 drivers/gpu/ipu-v3/ipu-prv.h       |  7 ++++-
 include/video/imx-ipu-v3.h         |  2 +-
 9 files changed, 74 insertions(+), 81 deletions(-)

-- 
2.11.0

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[PATCH 1/4] gpu: ipu-v3: remove IRQ dance on DC channel disable

[Philipp Zabel]

From: Lucas Stach <l.stach@pengutronix.de>

This has never worked properly, as the IRQ got retriggered immediately
on unmask. Remove the IRQ wait dance, as it is apparently safe to disable
the DC channel at any point in time.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/gpu/ipu-v3/ipu-dc.c | 61 +++------------------------------------------
 1 file changed, 4 insertions(+), 57 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-dc.c b/drivers/gpu/ipu-v3/ipu-dc.c
index 659475c1e44ab..7a4b8362dda8f 100644
--- a/drivers/gpu/ipu-v3/ipu-dc.c
+++ b/drivers/gpu/ipu-v3/ipu-dc.c
@@ -112,8 +112,6 @@ struct ipu_dc_priv {
 	struct ipu_dc		channels[IPU_DC_NUM_CHANNELS];
 	struct mutex		mutex;
 	struct completion	comp;
-	int			dc_irq;
-	int			dp_irq;
 	int			use_count;
 };
 
@@ -262,47 +260,13 @@ void ipu_dc_enable_channel(struct ipu_dc *dc)
 }
 EXPORT_SYMBOL_GPL(ipu_dc_enable_channel);
 
-static irqreturn_t dc_irq_handler(int irq, void *dev_id)
-{
-	struct ipu_dc *dc = dev_id;
-	u32 reg;
-
-	reg = readl(dc->base + DC_WR_CH_CONF);
-	reg &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
-	writel(reg, dc->base + DC_WR_CH_CONF);
-
-	/* The Freescale BSP kernel clears DIx_COUNTER_RELEASE here */
-
-	complete(&dc->priv->comp);
-	return IRQ_HANDLED;
-}
-
 void ipu_dc_disable_channel(struct ipu_dc *dc)
 {
-	struct ipu_dc_priv *priv = dc->priv;
-	int irq;
-	unsigned long ret;
 	u32 val;
 
-	/* TODO: Handle MEM_FG_SYNC differently from MEM_BG_SYNC */
-	if (dc->chno == 1)
-		irq = priv->dc_irq;
-	else if (dc->chno == 5)
-		irq = priv->dp_irq;
-	else
-		return;
-
-	init_completion(&priv->comp);
-	enable_irq(irq);
-	ret = wait_for_completion_timeout(&priv->comp, msecs_to_jiffies(50));
-	disable_irq(irq);
-	if (ret == 0) {
-		dev_warn(priv->dev, "DC stop timeout after 50 ms\n");
-
-		val = readl(dc->base + DC_WR_CH_CONF);
-		val &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
-		writel(val, dc->base + DC_WR_CH_CONF);
-	}
+	val = readl(dc->base + DC_WR_CH_CONF);
+	val &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
+	writel(val, dc->base + DC_WR_CH_CONF);
 }
 EXPORT_SYMBOL_GPL(ipu_dc_disable_channel);
 
@@ -389,7 +353,7 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
 	struct ipu_dc_priv *priv;
 	static int channel_offsets[] = { 0, 0x1c, 0x38, 0x54, 0x58, 0x5c,
 		0x78, 0, 0x94, 0xb4};
-	int i, ret;
+	int i;
 
 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)
@@ -410,23 +374,6 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
 		priv->channels[i].base = priv->dc_reg + channel_offsets[i];
 	}
 
-	priv->dc_irq = ipu_map_irq(ipu, IPU_IRQ_DC_FC_1);
-	if (!priv->dc_irq)
-		return -EINVAL;
-	ret = devm_request_irq(dev, priv->dc_irq, dc_irq_handler, 0, NULL,
-			       &priv->channels[1]);
-	if (ret < 0)
-		return ret;
-	disable_irq(priv->dc_irq);
-	priv->dp_irq = ipu_map_irq(ipu, IPU_IRQ_DP_SF_END);
-	if (!priv->dp_irq)
-		return -EINVAL;
-	ret = devm_request_irq(dev, priv->dp_irq, dc_irq_handler, 0, NULL,
-			       &priv->channels[5]);
-	if (ret < 0)
-		return ret;
-	disable_irq(priv->dp_irq);
-
 	writel(DC_WR_CH_CONF_WORD_SIZE_24 | DC_WR_CH_CONF_DISP_ID_PARALLEL(1) |
 			DC_WR_CH_CONF_PROG_DI_ID,
 			priv->channels[1].base + DC_WR_CH_CONF);
-- 
2.11.0

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[PATCH 2/4] gpu: ipu-v3: add unsynchronised DP channel disabling

[Philipp Zabel]

When disabling the foreground DP channel during a modeset, the DC is
already disabled without waiting for end of frame. There is no reason
to wait for a frame boundary before updating the DP registers in that
case.
Add support to apply updates immediately. No functional changes, yet.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/gpu/drm/imx/ipuv3-plane.c |  2 +-
 drivers/gpu/ipu-v3/ipu-common.c   |  8 +++++---
 drivers/gpu/ipu-v3/ipu-dp.c       | 12 ++++++------
 drivers/gpu/ipu-v3/ipu-prv.h      |  7 ++++++-
 include/video/imx-ipu-v3.h        |  2 +-
 5 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 24819c9c36400..55991d46ced50 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -181,7 +181,7 @@ static int ipu_disable_plane(struct drm_plane *plane)
 	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
 
 	if (ipu_plane->dp)
-		ipu_dp_disable_channel(ipu_plane->dp);
+		ipu_dp_disable_channel(ipu_plane->dp, true);
 	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
 	ipu_dmfc_disable_channel(ipu_plane->dmfc);
 	if (ipu_plane->dp)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 8368e6f766ee5..86b87d620150c 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -51,15 +51,17 @@ int ipu_get_num(struct ipu_soc *ipu)
 }
 EXPORT_SYMBOL_GPL(ipu_get_num);
 
-void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
+void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync)
 {
 	u32 val;
 
 	val = ipu_cm_read(ipu, IPU_SRM_PRI2);
-	val |= 0x8;
+	val &= DP_S_SRM_MODE_MASK;
+	val |= sync ? DP_S_SRM_MODE_NEXT_FRAME :
+		      DP_S_SRM_MODE_NOW;
 	ipu_cm_write(ipu, val, IPU_SRM_PRI2);
 }
-EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
+EXPORT_SYMBOL_GPL(ipu_srm_dp_update);
 
 enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc)
 {
diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
index 98686edbcdbb0..0e09c98248a0d 100644
--- a/drivers/gpu/ipu-v3/ipu-dp.c
+++ b/drivers/gpu/ipu-v3/ipu-dp.c
@@ -112,7 +112,7 @@ int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
 		writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
 	}
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -127,7 +127,7 @@ int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
 
 	writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	return 0;
 }
@@ -207,7 +207,7 @@ int ipu_dp_setup_channel(struct ipu_dp *dp,
 					flow->out_cs, DP_COM_CONF_CSC_DEF_FG);
 	}
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -247,7 +247,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
 	reg |= DP_COM_CONF_FG_EN;
 	writel(reg, flow->base + DP_COM_CONF);
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -255,7 +255,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
 }
 EXPORT_SYMBOL_GPL(ipu_dp_enable_channel);
 
-void ipu_dp_disable_channel(struct ipu_dp *dp)
+void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
 {
 	struct ipu_flow *flow = to_flow(dp);
 	struct ipu_dp_priv *priv = flow->priv;
@@ -275,7 +275,7 @@ void ipu_dp_disable_channel(struct ipu_dp *dp)
 	writel(reg, flow->base + DP_COM_CONF);
 
 	writel(0, flow->base + DP_FG_POS);
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, sync);
 
 	if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
 		ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 22e47b68b14a2..285595702ee0f 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -75,6 +75,11 @@ struct ipu_soc;
 #define IPU_INT_CTRL(n)		IPU_CM_REG(0x003C + 4 * (n))
 #define IPU_INT_STAT(n)		IPU_CM_REG(0x0200 + 4 * (n))
 
+/* SRM_PRI2 */
+#define DP_S_SRM_MODE_MASK		(0x3 << 3)
+#define DP_S_SRM_MODE_NOW		(0x3 << 3)
+#define DP_S_SRM_MODE_NEXT_FRAME	(0x1 << 3)
+
 /* FS_PROC_FLOW1 */
 #define FS_PRPENC_ROT_SRC_SEL_MASK	(0xf << 0)
 #define FS_PRPENC_ROT_SRC_SEL_ENC		(0x7 << 0)
@@ -215,7 +220,7 @@ static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
 	writel(value, ipu->idmac_reg + offset);
 }
 
-void ipu_srm_dp_sync_update(struct ipu_soc *ipu);
+void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync);
 
 int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
 int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 53cd07ccaa4ce..899d2b00ad6d4 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -300,7 +300,7 @@ struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow);
 void ipu_dp_put(struct ipu_dp *);
 int ipu_dp_enable(struct ipu_soc *ipu);
 int ipu_dp_enable_channel(struct ipu_dp *dp);
-void ipu_dp_disable_channel(struct ipu_dp *dp);
+void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync);
 void ipu_dp_disable(struct ipu_soc *ipu);
 int ipu_dp_setup_channel(struct ipu_dp *dp,
 		enum ipu_color_space in, enum ipu_color_space out);
-- 
2.11.0

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Re: [PATCH 2/4] gpu: ipu-v3: add unsynchronised DP channel disabling

[Lucas Stach]

Am Montag, den 27.02.2017, 12:28 +0100 schrieb Philipp Zabel:
> When disabling the foreground DP channel during a modeset, the DC is
> already disabled without waiting for end of frame. There is no reason
> to wait for a frame boundary before updating the DP registers in that
> case.
> Add support to apply updates immediately. No functional changes, yet.
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> ---
>  drivers/gpu/drm/imx/ipuv3-plane.c |  2 +-
>  drivers/gpu/ipu-v3/ipu-common.c   |  8 +++++---
>  drivers/gpu/ipu-v3/ipu-dp.c       | 12 ++++++------
>  drivers/gpu/ipu-v3/ipu-prv.h      |  7 ++++++-
>  include/video/imx-ipu-v3.h        |  2 +-
>  5 files changed, 19 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
> index 24819c9c36400..55991d46ced50 100644
> --- a/drivers/gpu/drm/imx/ipuv3-plane.c
> +++ b/drivers/gpu/drm/imx/ipuv3-plane.c
> @@ -181,7 +181,7 @@ static int ipu_disable_plane(struct drm_plane *plane)
>  	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
>  
>  	if (ipu_plane->dp)
> -		ipu_dp_disable_channel(ipu_plane->dp);
> +		ipu_dp_disable_channel(ipu_plane->dp, true);
>  	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
>  	ipu_dmfc_disable_channel(ipu_plane->dmfc);
>  	if (ipu_plane->dp)
> diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
> index 8368e6f766ee5..86b87d620150c 100644
> --- a/drivers/gpu/ipu-v3/ipu-common.c
> +++ b/drivers/gpu/ipu-v3/ipu-common.c
> @@ -51,15 +51,17 @@ int ipu_get_num(struct ipu_soc *ipu)
>  }
>  EXPORT_SYMBOL_GPL(ipu_get_num);
>  
> -void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
> +void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync)
>  {
>  	u32 val;
>  
>  	val = ipu_cm_read(ipu, IPU_SRM_PRI2);
> -	val |= 0x8;
> +	val &= DP_S_SRM_MODE_MASK;

Should probably be ~DP_S_SRM_MODE_MASK.

> +	val |= sync ? DP_S_SRM_MODE_NEXT_FRAME :
> +		      DP_S_SRM_MODE_NOW;
>  	ipu_cm_write(ipu, val, IPU_SRM_PRI2);
>  }
> -EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
> +EXPORT_SYMBOL_GPL(ipu_srm_dp_update);
>  
>  enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc)
>  {
> diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
> index 98686edbcdbb0..0e09c98248a0d 100644
> --- a/drivers/gpu/ipu-v3/ipu-dp.c
> +++ b/drivers/gpu/ipu-v3/ipu-dp.c
> @@ -112,7 +112,7 @@ int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
>  		writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
>  	}
>  
> -	ipu_srm_dp_sync_update(priv->ipu);
> +	ipu_srm_dp_update(priv->ipu, true);
>  
>  	mutex_unlock(&priv->mutex);
>  
> @@ -127,7 +127,7 @@ int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
>  
>  	writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
>  
> -	ipu_srm_dp_sync_update(priv->ipu);
> +	ipu_srm_dp_update(priv->ipu, true);
>  
>  	return 0;
>  }
> @@ -207,7 +207,7 @@ int ipu_dp_setup_channel(struct ipu_dp *dp,
>  					flow->out_cs, DP_COM_CONF_CSC_DEF_FG);
>  	}
>  
> -	ipu_srm_dp_sync_update(priv->ipu);
> +	ipu_srm_dp_update(priv->ipu, true);
>  
>  	mutex_unlock(&priv->mutex);
>  
> @@ -247,7 +247,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
>  	reg |= DP_COM_CONF_FG_EN;
>  	writel(reg, flow->base + DP_COM_CONF);
>  
> -	ipu_srm_dp_sync_update(priv->ipu);
> +	ipu_srm_dp_update(priv->ipu, true);
>  
>  	mutex_unlock(&priv->mutex);
>  
> @@ -255,7 +255,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
>  }
>  EXPORT_SYMBOL_GPL(ipu_dp_enable_channel);
>  
> -void ipu_dp_disable_channel(struct ipu_dp *dp)
> +void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
>  {
>  	struct ipu_flow *flow = to_flow(dp);
>  	struct ipu_dp_priv *priv = flow->priv;
> @@ -275,7 +275,7 @@ void ipu_dp_disable_channel(struct ipu_dp *dp)
>  	writel(reg, flow->base + DP_COM_CONF);
>  
>  	writel(0, flow->base + DP_FG_POS);
> -	ipu_srm_dp_sync_update(priv->ipu);
> +	ipu_srm_dp_update(priv->ipu, sync);
>  
>  	if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
>  		ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
> diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
> index 22e47b68b14a2..285595702ee0f 100644
> --- a/drivers/gpu/ipu-v3/ipu-prv.h
> +++ b/drivers/gpu/ipu-v3/ipu-prv.h
> @@ -75,6 +75,11 @@ struct ipu_soc;
>  #define IPU_INT_CTRL(n)		IPU_CM_REG(0x003C + 4 * (n))
>  #define IPU_INT_STAT(n)		IPU_CM_REG(0x0200 + 4 * (n))
>  
> +/* SRM_PRI2 */
> +#define DP_S_SRM_MODE_MASK		(0x3 << 3)
> +#define DP_S_SRM_MODE_NOW		(0x3 << 3)
> +#define DP_S_SRM_MODE_NEXT_FRAME	(0x1 << 3)
> +
>  /* FS_PROC_FLOW1 */
>  #define FS_PRPENC_ROT_SRC_SEL_MASK	(0xf << 0)
>  #define FS_PRPENC_ROT_SRC_SEL_ENC		(0x7 << 0)
> @@ -215,7 +220,7 @@ static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
>  	writel(value, ipu->idmac_reg + offset);
>  }
>  
> -void ipu_srm_dp_sync_update(struct ipu_soc *ipu);
> +void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync);
>  
>  int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
>  int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
> diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
> index 53cd07ccaa4ce..899d2b00ad6d4 100644
> --- a/include/video/imx-ipu-v3.h
> +++ b/include/video/imx-ipu-v3.h
> @@ -300,7 +300,7 @@ struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow);
>  void ipu_dp_put(struct ipu_dp *);
>  int ipu_dp_enable(struct ipu_soc *ipu);
>  int ipu_dp_enable_channel(struct ipu_dp *dp);
> -void ipu_dp_disable_channel(struct ipu_dp *dp);
> +void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync);
>  void ipu_dp_disable(struct ipu_soc *ipu);
>  int ipu_dp_setup_channel(struct ipu_dp *dp,
>  		enum ipu_color_space in, enum ipu_color_space out);


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Re: [PATCH 2/4] gpu: ipu-v3: add unsynchronised DP channel disabling

[Philipp Zabel]

On Mon, 2017-02-27 at 12:33 +0100, Lucas Stach wrote:
> Am Montag, den 27.02.2017, 12:28 +0100 schrieb Philipp Zabel:
> > When disabling the foreground DP channel during a modeset, the DC is
> > already disabled without waiting for end of frame. There is no reason
> > to wait for a frame boundary before updating the DP registers in that
> > case.
> > Add support to apply updates immediately. No functional changes, yet.
> > 
> > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> > ---
> >  drivers/gpu/drm/imx/ipuv3-plane.c |  2 +-
> >  drivers/gpu/ipu-v3/ipu-common.c   |  8 +++++---
> >  drivers/gpu/ipu-v3/ipu-dp.c       | 12 ++++++------
> >  drivers/gpu/ipu-v3/ipu-prv.h      |  7 ++++++-
> >  include/video/imx-ipu-v3.h        |  2 +-
> >  5 files changed, 19 insertions(+), 12 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
> > index 24819c9c36400..55991d46ced50 100644
> > --- a/drivers/gpu/drm/imx/ipuv3-plane.c
> > +++ b/drivers/gpu/drm/imx/ipuv3-plane.c
> > @@ -181,7 +181,7 @@ static int ipu_disable_plane(struct drm_plane *plane)
> >  	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
> >  
> >  	if (ipu_plane->dp)
> > -		ipu_dp_disable_channel(ipu_plane->dp);
> > +		ipu_dp_disable_channel(ipu_plane->dp, true);
> >  	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
> >  	ipu_dmfc_disable_channel(ipu_plane->dmfc);
> >  	if (ipu_plane->dp)
> > diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
> > index 8368e6f766ee5..86b87d620150c 100644
> > --- a/drivers/gpu/ipu-v3/ipu-common.c
> > +++ b/drivers/gpu/ipu-v3/ipu-common.c
> > @@ -51,15 +51,17 @@ int ipu_get_num(struct ipu_soc *ipu)
> >  }
> >  EXPORT_SYMBOL_GPL(ipu_get_num);
> >  
> > -void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
> > +void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync)
> >  {
> >  	u32 val;
> >  
> >  	val = ipu_cm_read(ipu, IPU_SRM_PRI2);
> > -	val |= 0x8;
> > +	val &= DP_S_SRM_MODE_MASK;
> 
> Should probably be ~DP_S_SRM_MODE_MASK.

Indeed, thanks for catching this.

This had no effect since the IPU auto-clears the DP_S_SRM_MODE field,
and all other non-zero fields in this register are only SRM update
priorities for modules that don't use the SRM for register updates.

regards
Philipp

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[PATCH 3/4] drm/imx: call drm_atomic_helper_commit_hw_done after drm_atomic_helper_wait_for_vblanks

[Philipp Zabel]

Disabling planes will consist of two steps as of the following patch.
First, the DP is asked to stop at the next vblank, and then, after the
vblank the associated IDMAC channel is idle and can be disabled.
To avoid further commits being awoken out of their wait for dependencies
too early, we should report commit_hw_done only after wait_for_vblanks.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/gpu/drm/imx/imx-drm-core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index f562cb7964b08..1ed120c181724 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -169,10 +169,10 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
 
 	drm_atomic_helper_commit_modeset_enables(dev, state);
 
-	drm_atomic_helper_commit_hw_done(state);
-
 	drm_atomic_helper_wait_for_vblanks(dev, state);
 
+	drm_atomic_helper_commit_hw_done(state);
+
 	drm_atomic_helper_cleanup_planes(dev, state);
 }
 
-- 
2.11.0

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Re: [PATCH 3/4] drm/imx: call drm_atomic_helper_commit_hw_done after drm_atomic_helper_wait_for_vblanks

[Lucas Stach]

Am Montag, den 27.02.2017, 12:28 +0100 schrieb Philipp Zabel:
> Disabling planes will consist of two steps as of the following patch.
> First, the DP is asked to stop at the next vblank, and then, after the
> vblank the associated IDMAC channel is idle and can be disabled.
> To avoid further commits being awoken out of their wait for dependencies
> too early, we should report commit_hw_done only after wait_for_vblanks.
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/gpu/drm/imx/imx-drm-core.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
> index f562cb7964b08..1ed120c181724 100644
> --- a/drivers/gpu/drm/imx/imx-drm-core.c
> +++ b/drivers/gpu/drm/imx/imx-drm-core.c
> @@ -169,10 +169,10 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
>  
>  	drm_atomic_helper_commit_modeset_enables(dev, state);
>  
> -	drm_atomic_helper_commit_hw_done(state);
> -
>  	drm_atomic_helper_wait_for_vblanks(dev, state);
>  
> +	drm_atomic_helper_commit_hw_done(state);
> +
>  	drm_atomic_helper_cleanup_planes(dev, state);
>  }
>  


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[PATCH 4/4] drm/imx: add deferred plane disabling

[Philipp Zabel]

The DP channel disable code tried to busy wait for the DP sync flow end
interrupt status bit when disabling the partial plane without a full
modeset. That never worked reliably, and it was disabled completely by
the recent "gpu: ipu-v3: remove IRQ dance on DC channel disable" patch,
causing ipu_wait_interrupt to always time out after 50 ms, which in turn
would trigger the timeout in drm_atomic_helper_wait_for_vblanks.

This patch changes ipu_plane_atomic_disable to only queue a DP channel
register update at the next frame boundary and set a flag, which can be
done without any waiting whatsoever. The imx_drm_atomic_commit_tail then
calls a new ipu_plane_disable_deferred function that does the actual
IDMAC teardown of the planes that are flagged for deferred disabling.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/gpu/drm/imx/imx-drm-core.c |  7 +++++++
 drivers/gpu/drm/imx/ipuv3-crtc.c   | 22 +++++++++++++++++++++-
 drivers/gpu/drm/imx/ipuv3-plane.c  | 24 +++++++++++++++++-------
 drivers/gpu/drm/imx/ipuv3-plane.h  |  5 +++++
 drivers/gpu/ipu-v3/ipu-dp.c        |  3 ---
 5 files changed, 50 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index 1ed120c181724..7cfc52fe33339 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -30,6 +30,7 @@
 #include <video/imx-ipu-v3.h>
 
 #include "imx-drm.h"
+#include "ipuv3-plane.h"
 
 #define MAX_CRTC	4
 
@@ -160,6 +161,9 @@ static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = {
 static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
 {
 	struct drm_device *dev = state->dev;
+	struct drm_plane *plane;
+	struct drm_plane_state *plane_state;
+	int i;
 
 	drm_atomic_helper_commit_modeset_disables(dev, state);
 
@@ -171,6 +175,9 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
 
 	drm_atomic_helper_wait_for_vblanks(dev, state);
 
+	for_each_plane_in_state(state, plane, plane_state, i)
+		ipu_plane_disable_deferred(plane);
+
 	drm_atomic_helper_commit_hw_done(state);
 
 	drm_atomic_helper_cleanup_planes(dev, state);
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index 6be515a9fb694..0f15f11f26e0c 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -60,6 +60,26 @@ static void ipu_crtc_enable(struct drm_crtc *crtc)
 	ipu_di_enable(ipu_crtc->di);
 }
 
+static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
+				    struct drm_crtc_state *old_crtc_state)
+{
+	bool disable_partial = false;
+	bool disable_full = false;
+	struct drm_plane *plane;
+
+	drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
+		if (plane == &ipu_crtc->plane[0]->base)
+			disable_full = true;
+		if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
+			disable_partial = true;
+	}
+
+	if (disable_partial)
+		ipu_plane_disable(ipu_crtc->plane[1], true);
+	if (disable_full)
+		ipu_plane_disable(ipu_crtc->plane[0], false);
+}
+
 static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
 				    struct drm_crtc_state *old_crtc_state)
 {
@@ -73,7 +93,7 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
 	 * attached IDMACs will be left in undefined state, possibly hanging
 	 * the IPU or even system.
 	 */
-	drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
+	ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
 	ipu_dc_disable(ipu);
 
 	spin_lock_irq(&crtc->dev->event_lock);
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 55991d46ced50..96b6299d7fa63 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -172,22 +172,28 @@ static void ipu_plane_enable(struct ipu_plane *ipu_plane)
 		ipu_dp_enable_channel(ipu_plane->dp);
 }
 
-static int ipu_disable_plane(struct drm_plane *plane)
+void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
 {
-	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
-
 	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
 
 	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
 
-	if (ipu_plane->dp)
-		ipu_dp_disable_channel(ipu_plane->dp, true);
+	if (ipu_plane->dp && disable_dp_channel)
+		ipu_dp_disable_channel(ipu_plane->dp, false);
 	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
 	ipu_dmfc_disable_channel(ipu_plane->dmfc);
 	if (ipu_plane->dp)
 		ipu_dp_disable(ipu_plane->ipu);
+}
 
-	return 0;
+void ipu_plane_disable_deferred(struct drm_plane *plane)
+{
+	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
+
+	if (ipu_plane->disabling) {
+		ipu_plane->disabling = false;
+		ipu_plane_disable(ipu_plane, false);
+	}
 }
 
 static void ipu_plane_destroy(struct drm_plane *plane)
@@ -356,7 +362,11 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
 static void ipu_plane_atomic_disable(struct drm_plane *plane,
 				     struct drm_plane_state *old_state)
 {
-	ipu_disable_plane(plane);
+	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
+
+	if (ipu_plane->dp)
+		ipu_dp_disable_channel(ipu_plane->dp, true);
+	ipu_plane->disabling = true;
 }
 
 static void ipu_plane_atomic_update(struct drm_plane *plane,
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
index 338b88a74eb6e..0e2a723ff9816 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.h
+++ b/drivers/gpu/drm/imx/ipuv3-plane.h
@@ -23,6 +23,8 @@ struct ipu_plane {
 
 	int			dma;
 	int			dp_flow;
+
+	bool			disabling;
 };
 
 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
@@ -42,4 +44,7 @@ void ipu_plane_put_resources(struct ipu_plane *plane);
 
 int ipu_plane_irq(struct ipu_plane *plane);
 
+void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
+void ipu_plane_disable_deferred(struct drm_plane *plane);
+
 #endif
diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
index 0e09c98248a0d..9b2b3fa479c46 100644
--- a/drivers/gpu/ipu-v3/ipu-dp.c
+++ b/drivers/gpu/ipu-v3/ipu-dp.c
@@ -277,9 +277,6 @@ void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
 	writel(0, flow->base + DP_FG_POS);
 	ipu_srm_dp_update(priv->ipu, sync);
 
-	if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
-		ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
-
 	mutex_unlock(&priv->mutex);
 }
 EXPORT_SYMBOL_GPL(ipu_dp_disable_channel);
-- 
2.11.0

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Re: [PATCH 4/4] drm/imx: add deferred plane disabling

[Lucas Stach]

Am Montag, den 27.02.2017, 12:28 +0100 schrieb Philipp Zabel:
> The DP channel disable code tried to busy wait for the DP sync flow end
> interrupt status bit when disabling the partial plane without a full
> modeset. That never worked reliably, and it was disabled completely by
> the recent "gpu: ipu-v3: remove IRQ dance on DC channel disable" patch,
> causing ipu_wait_interrupt to always time out after 50 ms, which in turn
> would trigger the timeout in drm_atomic_helper_wait_for_vblanks.
> 
> This patch changes ipu_plane_atomic_disable to only queue a DP channel
> register update at the next frame boundary and set a flag, which can be
> done without any waiting whatsoever. The imx_drm_atomic_commit_tail then
> calls a new ipu_plane_disable_deferred function that does the actual
> IDMAC teardown of the planes that are flagged for deferred disabling.
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

> ---
>  drivers/gpu/drm/imx/imx-drm-core.c |  7 +++++++
>  drivers/gpu/drm/imx/ipuv3-crtc.c   | 22 +++++++++++++++++++++-
>  drivers/gpu/drm/imx/ipuv3-plane.c  | 24 +++++++++++++++++-------
>  drivers/gpu/drm/imx/ipuv3-plane.h  |  5 +++++
>  drivers/gpu/ipu-v3/ipu-dp.c        |  3 ---
>  5 files changed, 50 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
> index 1ed120c181724..7cfc52fe33339 100644
> --- a/drivers/gpu/drm/imx/imx-drm-core.c
> +++ b/drivers/gpu/drm/imx/imx-drm-core.c
> @@ -30,6 +30,7 @@
>  #include <video/imx-ipu-v3.h>
>  
>  #include "imx-drm.h"
> +#include "ipuv3-plane.h"
>  
>  #define MAX_CRTC	4
>  
> @@ -160,6 +161,9 @@ static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = {
>  static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
>  {
>  	struct drm_device *dev = state->dev;
> +	struct drm_plane *plane;
> +	struct drm_plane_state *plane_state;
> +	int i;
>  
>  	drm_atomic_helper_commit_modeset_disables(dev, state);
>  
> @@ -171,6 +175,9 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
>  
>  	drm_atomic_helper_wait_for_vblanks(dev, state);
>  
> +	for_each_plane_in_state(state, plane, plane_state, i)
> +		ipu_plane_disable_deferred(plane);
> +
>  	drm_atomic_helper_commit_hw_done(state);
>  
>  	drm_atomic_helper_cleanup_planes(dev, state);
> diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
> index 6be515a9fb694..0f15f11f26e0c 100644
> --- a/drivers/gpu/drm/imx/ipuv3-crtc.c
> +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
> @@ -60,6 +60,26 @@ static void ipu_crtc_enable(struct drm_crtc *crtc)
>  	ipu_di_enable(ipu_crtc->di);
>  }
>  
> +static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
> +				    struct drm_crtc_state *old_crtc_state)
> +{
> +	bool disable_partial = false;
> +	bool disable_full = false;
> +	struct drm_plane *plane;
> +
> +	drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
> +		if (plane == &ipu_crtc->plane[0]->base)
> +			disable_full = true;
> +		if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
> +			disable_partial = true;
> +	}
> +
> +	if (disable_partial)
> +		ipu_plane_disable(ipu_crtc->plane[1], true);
> +	if (disable_full)
> +		ipu_plane_disable(ipu_crtc->plane[0], false);
> +}
> +
>  static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
>  				    struct drm_crtc_state *old_crtc_state)
>  {
> @@ -73,7 +93,7 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
>  	 * attached IDMACs will be left in undefined state, possibly hanging
>  	 * the IPU or even system.
>  	 */
> -	drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
> +	ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
>  	ipu_dc_disable(ipu);
>  
>  	spin_lock_irq(&crtc->dev->event_lock);
> diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
> index 55991d46ced50..96b6299d7fa63 100644
> --- a/drivers/gpu/drm/imx/ipuv3-plane.c
> +++ b/drivers/gpu/drm/imx/ipuv3-plane.c
> @@ -172,22 +172,28 @@ static void ipu_plane_enable(struct ipu_plane *ipu_plane)
>  		ipu_dp_enable_channel(ipu_plane->dp);
>  }
>  
> -static int ipu_disable_plane(struct drm_plane *plane)
> +void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
>  {
> -	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
> -
>  	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
>  
>  	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
>  
> -	if (ipu_plane->dp)
> -		ipu_dp_disable_channel(ipu_plane->dp, true);
> +	if (ipu_plane->dp && disable_dp_channel)
> +		ipu_dp_disable_channel(ipu_plane->dp, false);
>  	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
>  	ipu_dmfc_disable_channel(ipu_plane->dmfc);
>  	if (ipu_plane->dp)
>  		ipu_dp_disable(ipu_plane->ipu);
> +}
>  
> -	return 0;
> +void ipu_plane_disable_deferred(struct drm_plane *plane)
> +{
> +	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
> +
> +	if (ipu_plane->disabling) {
> +		ipu_plane->disabling = false;
> +		ipu_plane_disable(ipu_plane, false);
> +	}
>  }
>  
>  static void ipu_plane_destroy(struct drm_plane *plane)
> @@ -356,7 +362,11 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
>  static void ipu_plane_atomic_disable(struct drm_plane *plane,
>  				     struct drm_plane_state *old_state)
>  {
> -	ipu_disable_plane(plane);
> +	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
> +
> +	if (ipu_plane->dp)
> +		ipu_dp_disable_channel(ipu_plane->dp, true);
> +	ipu_plane->disabling = true;
>  }
>  
>  static void ipu_plane_atomic_update(struct drm_plane *plane,
> diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
> index 338b88a74eb6e..0e2a723ff9816 100644
> --- a/drivers/gpu/drm/imx/ipuv3-plane.h
> +++ b/drivers/gpu/drm/imx/ipuv3-plane.h
> @@ -23,6 +23,8 @@ struct ipu_plane {
>  
>  	int			dma;
>  	int			dp_flow;
> +
> +	bool			disabling;
>  };
>  
>  struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
> @@ -42,4 +44,7 @@ void ipu_plane_put_resources(struct ipu_plane *plane);
>  
>  int ipu_plane_irq(struct ipu_plane *plane);
>  
> +void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
> +void ipu_plane_disable_deferred(struct drm_plane *plane);
> +
>  #endif
> diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
> index 0e09c98248a0d..9b2b3fa479c46 100644
> --- a/drivers/gpu/ipu-v3/ipu-dp.c
> +++ b/drivers/gpu/ipu-v3/ipu-dp.c
> @@ -277,9 +277,6 @@ void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
>  	writel(0, flow->base + DP_FG_POS);
>  	ipu_srm_dp_update(priv->ipu, sync);
>  
> -	if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
> -		ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
> -
>  	mutex_unlock(&priv->mutex);
>  }
>  EXPORT_SYMBOL_GPL(ipu_dp_disable_channel);


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Re: [PATCH 4/4] drm/imx: add deferred plane disabling

[Lucas Stach]

Am Montag, den 27.02.2017, 12:28 +0100 schrieb Philipp Zabel:
> The DP channel disable code tried to busy wait for the DP sync flow end
> interrupt status bit when disabling the partial plane without a full
> modeset. That never worked reliably, and it was disabled completely by
> the recent "gpu: ipu-v3: remove IRQ dance on DC channel disable" patch,
> causing ipu_wait_interrupt to always time out after 50 ms, which in turn
> would trigger the timeout in drm_atomic_helper_wait_for_vblanks.
> 
> This patch changes ipu_plane_atomic_disable to only queue a DP channel
> register update at the next frame boundary and set a flag, which can be
> done without any waiting whatsoever. The imx_drm_atomic_commit_tail then
> calls a new ipu_plane_disable_deferred function that does the actual
> IDMAC teardown of the planes that are flagged for deferred disabling.
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/gpu/drm/imx/imx-drm-core.c |  7 +++++++
>  drivers/gpu/drm/imx/ipuv3-crtc.c   | 22 +++++++++++++++++++++-
>  drivers/gpu/drm/imx/ipuv3-plane.c  | 24 +++++++++++++++++-------
>  drivers/gpu/drm/imx/ipuv3-plane.h  |  5 +++++
>  drivers/gpu/ipu-v3/ipu-dp.c        |  3 ---
>  5 files changed, 50 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
> index 1ed120c181724..7cfc52fe33339 100644
> --- a/drivers/gpu/drm/imx/imx-drm-core.c
> +++ b/drivers/gpu/drm/imx/imx-drm-core.c
> @@ -30,6 +30,7 @@
>  #include <video/imx-ipu-v3.h>
>  
>  #include "imx-drm.h"
> +#include "ipuv3-plane.h"
>  
>  #define MAX_CRTC	4
>  
> @@ -160,6 +161,9 @@ static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = {
>  static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
>  {
>  	struct drm_device *dev = state->dev;
> +	struct drm_plane *plane;
> +	struct drm_plane_state *plane_state;
> +	int i;
>  
>  	drm_atomic_helper_commit_modeset_disables(dev, state);
>  
> @@ -171,6 +175,9 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
>  
>  	drm_atomic_helper_wait_for_vblanks(dev, state);
>  
> +	for_each_plane_in_state(state, plane, plane_state, i)
> +		ipu_plane_disable_deferred(plane);
> +
>  	drm_atomic_helper_commit_hw_done(state);
>  
>  	drm_atomic_helper_cleanup_planes(dev, state);
> diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
> index 6be515a9fb694..0f15f11f26e0c 100644
> --- a/drivers/gpu/drm/imx/ipuv3-crtc.c
> +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
> @@ -60,6 +60,26 @@ static void ipu_crtc_enable(struct drm_crtc *crtc)
>  	ipu_di_enable(ipu_crtc->di);
>  }
>  
> +static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
> +				    struct drm_crtc_state *old_crtc_state)
> +{
> +	bool disable_partial = false;
> +	bool disable_full = false;
> +	struct drm_plane *plane;
> +
> +	drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
> +		if (plane == &ipu_crtc->plane[0]->base)
> +			disable_full = true;
> +		if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
> +			disable_partial = true;
> +	}
> +
> +	if (disable_partial)
> +		ipu_plane_disable(ipu_crtc->plane[1], true);
> +	if (disable_full)
> +		ipu_plane_disable(ipu_crtc->plane[0], false);
> +}
> +
>  static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
>  				    struct drm_crtc_state *old_crtc_state)
>  {
> @@ -73,7 +93,7 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
>  	 * attached IDMACs will be left in undefined state, possibly hanging
>  	 * the IPU or even system.
>  	 */
> -	drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
> +	ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
>  	ipu_dc_disable(ipu);
>  
>  	spin_lock_irq(&crtc->dev->event_lock);
> diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
> index 55991d46ced50..96b6299d7fa63 100644
> --- a/drivers/gpu/drm/imx/ipuv3-plane.c
> +++ b/drivers/gpu/drm/imx/ipuv3-plane.c
> @@ -172,22 +172,28 @@ static void ipu_plane_enable(struct ipu_plane *ipu_plane)
>  		ipu_dp_enable_channel(ipu_plane->dp);
>  }
>  
> -static int ipu_disable_plane(struct drm_plane *plane)
> +void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
>  {
> -	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
> -
>  	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
>  
>  	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
>  
> -	if (ipu_plane->dp)
> -		ipu_dp_disable_channel(ipu_plane->dp, true);
> +	if (ipu_plane->dp && disable_dp_channel)
> +		ipu_dp_disable_channel(ipu_plane->dp, false);
>  	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
>  	ipu_dmfc_disable_channel(ipu_plane->dmfc);
>  	if (ipu_plane->dp)
>  		ipu_dp_disable(ipu_plane->ipu);
> +}
>  
> -	return 0;
> +void ipu_plane_disable_deferred(struct drm_plane *plane)
> +{
> +	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
> +
> +	if (ipu_plane->disabling) {
> +		ipu_plane->disabling = false;
> +		ipu_plane_disable(ipu_plane, false);
> +	}
>  }
>  
>  static void ipu_plane_destroy(struct drm_plane *plane)
> @@ -356,7 +362,11 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
>  static void ipu_plane_atomic_disable(struct drm_plane *plane,
>  				     struct drm_plane_state *old_state)
>  {
> -	ipu_disable_plane(plane);
> +	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
> +
> +	if (ipu_plane->dp)
> +		ipu_dp_disable_channel(ipu_plane->dp, true);
> +	ipu_plane->disabling = true;
>  }
>  
>  static void ipu_plane_atomic_update(struct drm_plane *plane,
> diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
> index 338b88a74eb6e..0e2a723ff9816 100644
> --- a/drivers/gpu/drm/imx/ipuv3-plane.h
> +++ b/drivers/gpu/drm/imx/ipuv3-plane.h
> @@ -23,6 +23,8 @@ struct ipu_plane {
>  
>  	int			dma;
>  	int			dp_flow;
> +
> +	bool			disabling;
>  };
>  
>  struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
> @@ -42,4 +44,7 @@ void ipu_plane_put_resources(struct ipu_plane *plane);
>  
>  int ipu_plane_irq(struct ipu_plane *plane);
>  
> +void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
> +void ipu_plane_disable_deferred(struct drm_plane *plane);
> +
>  #endif
> diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
> index 0e09c98248a0d..9b2b3fa479c46 100644
> --- a/drivers/gpu/ipu-v3/ipu-dp.c
> +++ b/drivers/gpu/ipu-v3/ipu-dp.c
> @@ -277,9 +277,6 @@ void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
>  	writel(0, flow->base + DP_FG_POS);
>  	ipu_srm_dp_update(priv->ipu, sync);
>  
> -	if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
> -		ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
> -
>  	mutex_unlock(&priv->mutex);
>  }
>  EXPORT_SYMBOL_GPL(ipu_dp_disable_channel);


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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Phillipp

It sounds like you need me to test a new kernel build with these patches now?

I'm new round here so could you please give me the git commands to
check out your patches / tree as well as any kernel config options
I'll need to ensure are enabled for full imxdrm / SABRE Lite support.

I started moving house yesterday and that continues today and tomorrow
so the soonest I am going to be able to build and test a new kernel
will be Wednesday but Thursday or this upcoming weekend is more
likely.

Thanks

On Mon, Feb 27, 2017 at 11:28 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> Hi,
>
> this series fixes an issue with the IPU DC/DP/IDMAC disable sequence. The
> interrupt waiting code didn't work as expected, sometimes causing busy waits
> longer than the timeout in drm_atomic_helper_wait_for_vblanks, which would
> cause crashes similar to the reported "imxdrm issue on SABRE Lite" [1].
>
> [1] http://www.spinics.net/lists/dri-devel/msg132485.html
>
> I could only reproduce the error when the overlay plane was involved, using
> weston with the atomic modeset patchset to trigger it, so I'm not sure if this
> fixes the issue above, too.
>
> regards
> Philipp
>
> Lucas Stach (1):
>   gpu: ipu-v3: remove IRQ dance on DC channel disable
>
> Philipp Zabel (3):
>   gpu: ipu-v3: add unsynchronised DP channel disabling
>   drm/imx: call drm_atomic_helper_commit_hw_done after
>     drm_atomic_helper_wait_for_vblanks
>   drm/imx: add deferred plane disabling
>
>  drivers/gpu/drm/imx/imx-drm-core.c | 11 +++++--
>  drivers/gpu/drm/imx/ipuv3-crtc.c   | 22 +++++++++++++-
>  drivers/gpu/drm/imx/ipuv3-plane.c  | 24 ++++++++++-----
>  drivers/gpu/drm/imx/ipuv3-plane.h  |  5 ++++
>  drivers/gpu/ipu-v3/ipu-common.c    |  8 +++--
>  drivers/gpu/ipu-v3/ipu-dc.c        | 61 +++-----------------------------------
>  drivers/gpu/ipu-v3/ipu-dp.c        | 15 ++++------
>  drivers/gpu/ipu-v3/ipu-prv.h       |  7 ++++-
>  include/video/imx-ipu-v3.h         |  2 +-
>  9 files changed, 74 insertions(+), 81 deletions(-)
>
> --
> 2.11.0
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

Hi Dan,

On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
> Hi Phillipp
> 
> It sounds like you need me to test a new kernel build with these patches now?

if you could find the time, that would be helpful.

> I'm new round here so could you please give me the git commands to
> check out your patches / tree as well as any kernel config options
> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.

If you are willing to test on top of drm-next, try

    git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
    git checkout -b "test-branch" FETCH_HEAD
    make imx_v6_v7_defconfig

I think the defconfig should include everything necessary for SABRE Lite
in your git kernel repository. If you prefer testing on a release
kernel, the patches are trivially rebased onto v4.10:

    git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
    git checkout -b "test-branch" FETCH_HEAD
    make imx_v6_v7_defconfig

> I started moving house yesterday and that continues today and tomorrow
> so the soonest I am going to be able to build and test a new kernel
> will be Wednesday but Thursday or this upcoming weekend is more
> likely.

Ok, there's no hurry. Let me know if you have any problems.

regards
Philipp

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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Thanks Phillip

I'll test it as soon as I can.

On Mon, Feb 27, 2017 at 1:13 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> Hi Dan,
>
> On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
>> Hi Phillipp
>>
>> It sounds like you need me to test a new kernel build with these patches now?
>
> if you could find the time, that would be helpful.
>
>> I'm new round here so could you please give me the git commands to
>> check out your patches / tree as well as any kernel config options
>> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.
>
> If you are willing to test on top of drm-next, try
>
>     git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
>     git checkout -b "test-branch" FETCH_HEAD
>     make imx_v6_v7_defconfig
>
> I think the defconfig should include everything necessary for SABRE Lite
> in your git kernel repository. If you prefer testing on a release
> kernel, the patches are trivially rebased onto v4.10:
>
>     git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>     git checkout -b "test-branch" FETCH_HEAD
>     make imx_v6_v7_defconfig
>
>> I started moving house yesterday and that continues today and tomorrow
>> so the soonest I am going to be able to build and test a new kernel
>> will be Wednesday but Thursday or this upcoming weekend is more
>> likely.
>
> Ok, there's no hurry. Let me know if you have any problems.
>
> regards
> Philipp
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Phillip

$ git fetch https://git.pengutronix.de/git/pza/linux.git
tags/v4.10-ipu-dp-plane-fix
fatal: Not a git repository (or any of the parent directories): .git


I get the same error for:

git fetch https://git.pengutronix.de/git/pza/linux.git
tags/v4.10-ipu-dp-plane-fix


Thanks

On Mon, Feb 27, 2017 at 1:13 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> Hi Dan,
>
> On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
>> Hi Phillipp
>>
>> It sounds like you need me to test a new kernel build with these patches now?
>
> if you could find the time, that would be helpful.
>
>> I'm new round here so could you please give me the git commands to
>> check out your patches / tree as well as any kernel config options
>> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.
>
> If you are willing to test on top of drm-next, try
>
>     git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
>     git checkout -b "test-branch" FETCH_HEAD
>     make imx_v6_v7_defconfig
>
> I think the defconfig should include everything necessary for SABRE Lite
> in your git kernel repository. If you prefer testing on a release
> kernel, the patches are trivially rebased onto v4.10:
>
>     git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>     git checkout -b "test-branch" FETCH_HEAD
>     make imx_v6_v7_defconfig
>
>> I started moving house yesterday and that continues today and tomorrow
>> so the soonest I am going to be able to build and test a new kernel
>> will be Wednesday but Thursday or this upcoming weekend is more
>> likely.
>
> Ok, there's no hurry. Let me know if you have any problems.
>
> regards
> Philipp
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

On Sat, 2017-03-04 at 14:36 +0000, Dan MacDonald wrote:
> Hi Phillip
> 
> $ git fetch https://git.pengutronix.de/git/pza/linux.git
> tags/v4.10-ipu-dp-plane-fix
> fatal: Not a git repository (or any of the parent directories): .git
> 
> 
> I get the same error for:
> 
> git fetch https://git.pengutronix.de/git/pza/linux.git
> tags/v4.10-ipu-dp-plane-fix

That's strange. I've just tried this with both https and git protocols
from an external network:

git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
git fetch git://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix

Does the error persist? Could you try git:// instead of https://?

regards
Philipp

> Thanks
> 
> On Mon, Feb 27, 2017 at 1:13 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> > Hi Dan,
> >
> > On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
> >> Hi Phillipp
> >>
> >> It sounds like you need me to test a new kernel build with these patches now?
> >
> > if you could find the time, that would be helpful.
> >
> >> I'm new round here so could you please give me the git commands to
> >> check out your patches / tree as well as any kernel config options
> >> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.
> >
> > If you are willing to test on top of drm-next, try
> >
> >     git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
> >     git checkout -b "test-branch" FETCH_HEAD
> >     make imx_v6_v7_defconfig
> >
> > I think the defconfig should include everything necessary for SABRE Lite
> > in your git kernel repository. If you prefer testing on a release
> > kernel, the patches are trivially rebased onto v4.10:
> >
> >     git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> >     git checkout -b "test-branch" FETCH_HEAD
> >     make imx_v6_v7_defconfig
> >
> >> I started moving house yesterday and that continues today and tomorrow
> >> so the soonest I am going to be able to build and test a new kernel
> >> will be Wednesday but Thursday or this upcoming weekend is more
> >> likely.
> >
> > Ok, there's no hurry. Let me know if you have any problems.
> >
> > regards
> > Philipp
> >
> 
> 


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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Phillipp

I've just tried those commands on my work machine where we allow
(need) git access and I get the same errors as I did at home.

Thanks

On Mon, Mar 6, 2017 at 8:39 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> On Sat, 2017-03-04 at 14:36 +0000, Dan MacDonald wrote:
>> Hi Phillip
>>
>> $ git fetch https://git.pengutronix.de/git/pza/linux.git
>> tags/v4.10-ipu-dp-plane-fix
>> fatal: Not a git repository (or any of the parent directories): .git
>>
>>
>> I get the same error for:
>>
>> git fetch https://git.pengutronix.de/git/pza/linux.git
>> tags/v4.10-ipu-dp-plane-fix
>
> That's strange. I've just tried this with both https and git protocols
> from an external network:
>
> git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> git fetch git://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>
> Does the error persist? Could you try git:// instead of https://?
>
> regards
> Philipp
>
>> Thanks
>>
>> On Mon, Feb 27, 2017 at 1:13 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> > Hi Dan,
>> >
>> > On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
>> >> Hi Phillipp
>> >>
>> >> It sounds like you need me to test a new kernel build with these patches now?
>> >
>> > if you could find the time, that would be helpful.
>> >
>> >> I'm new round here so could you please give me the git commands to
>> >> check out your patches / tree as well as any kernel config options
>> >> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.
>> >
>> > If you are willing to test on top of drm-next, try
>> >
>> >     git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
>> >     git checkout -b "test-branch" FETCH_HEAD
>> >     make imx_v6_v7_defconfig
>> >
>> > I think the defconfig should include everything necessary for SABRE Lite
>> > in your git kernel repository. If you prefer testing on a release
>> > kernel, the patches are trivially rebased onto v4.10:
>> >
>> >     git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>> >     git checkout -b "test-branch" FETCH_HEAD
>> >     make imx_v6_v7_defconfig
>> >
>> >> I started moving house yesterday and that continues today and tomorrow
>> >> so the soonest I am going to be able to build and test a new kernel
>> >> will be Wednesday but Thursday or this upcoming weekend is more
>> >> likely.
>> >
>> > Ok, there's no hurry. Let me know if you have any problems.
>> >
>> > regards
>> > Philipp
>> >
>>
>>
>
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

On Mon, 2017-03-06 at 09:55 +0000, Dan MacDonald wrote:
> Hi Phillipp
> 
> I've just tried those commands on my work machine where we allow
> (need) git access and I get the same errors as I did at home.
> 
> Thanks
>
> On Mon, Mar 6, 2017 at 8:39 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> > On Sat, 2017-03-04 at 14:36 +0000, Dan MacDonald wrote:
> >> Hi Phillip
> >>
> >> $ git fetch https://git.pengutronix.de/git/pza/linux.git
> >> tags/v4.10-ipu-dp-plane-fix
> >> fatal: Not a git repository (or any of the parent directories): .git

Oh, I'm slow. This is a local error message.

Sorry, I should have mentioned that this must be called from inside an
existing kernel git repository. The idea is that you don't have to clone
the whole kernel through our pipe, but can use the upstream repository,
which has a much better internet connection, for most of the data:

git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
cd linux
git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
git checkout -b "branchname" FETCH_HEAD

regards
Philipp

> >> I get the same error for:
> >>
> >> git fetch https://git.pengutronix.de/git/pza/linux.git
> >> tags/v4.10-ipu-dp-plane-fix
> >
> > That's strange. I've just tried this with both https and git protocols
> > from an external network:
> >
> > git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> > git fetch git://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> >
> > Does the error persist? Could you try git:// instead of https://?
> >
> > regards
> > Philipp
> >
> >> Thanks
> >>
> >> On Mon, Feb 27, 2017 at 1:13 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> >> > Hi Dan,
> >> >
> >> > On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
> >> >> Hi Phillipp
> >> >>
> >> >> It sounds like you need me to test a new kernel build with these patches now?
> >> >
> >> > if you could find the time, that would be helpful.
> >> >
> >> >> I'm new round here so could you please give me the git commands to
> >> >> check out your patches / tree as well as any kernel config options
> >> >> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.
> >> >
> >> > If you are willing to test on top of drm-next, try
> >> >
> >> >     git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
> >> >     git checkout -b "test-branch" FETCH_HEAD
> >> >     make imx_v6_v7_defconfig
> >> >
> >> > I think the defconfig should include everything necessary for SABRE Lite
> >> > in your git kernel repository. If you prefer testing on a release
> >> > kernel, the patches are trivially rebased onto v4.10:
> >> >
> >> >     git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> >> >     git checkout -b "test-branch" FETCH_HEAD
> >> >     make imx_v6_v7_defconfig
> >> >
> >> >> I started moving house yesterday and that continues today and tomorrow
> >> >> so the soonest I am going to be able to build and test a new kernel
> >> >> will be Wednesday but Thursday or this upcoming weekend is more
> >> >> likely.
> >> >
> >> > Ok, there's no hurry. Let me know if you have any problems.
> >> >
> >> > regards
> >> > Philipp
> >> >
> >>
> >>
> >
> >
> 
> 


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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Phillipp

I did suspect I would have to check out another repo first but I
wasn't sure which. Is that 4th command:

git checkout -b "branchname" FETCH_HEAD

The exact command I should run? "branchname" sounds a bit generic.

Thanks

On Mon, Mar 6, 2017 at 1:50 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> On Mon, 2017-03-06 at 09:55 +0000, Dan MacDonald wrote:
>> Hi Phillipp
>>
>> I've just tried those commands on my work machine where we allow
>> (need) git access and I get the same errors as I did at home.
>>
>> Thanks
>>
>> On Mon, Mar 6, 2017 at 8:39 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> > On Sat, 2017-03-04 at 14:36 +0000, Dan MacDonald wrote:
>> >> Hi Phillip
>> >>
>> >> $ git fetch https://git.pengutronix.de/git/pza/linux.git
>> >> tags/v4.10-ipu-dp-plane-fix
>> >> fatal: Not a git repository (or any of the parent directories): .git
>
> Oh, I'm slow. This is a local error message.
>
> Sorry, I should have mentioned that this must be called from inside an
> existing kernel git repository. The idea is that you don't have to clone
> the whole kernel through our pipe, but can use the upstream repository,
> which has a much better internet connection, for most of the data:
>
> git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> cd linux
> git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> git checkout -b "branchname" FETCH_HEAD
>
> regards
> Philipp
>
>> >> I get the same error for:
>> >>
>> >> git fetch https://git.pengutronix.de/git/pza/linux.git
>> >> tags/v4.10-ipu-dp-plane-fix
>> >
>> > That's strange. I've just tried this with both https and git protocols
>> > from an external network:
>> >
>> > git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>> > git fetch git://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>> >
>> > Does the error persist? Could you try git:// instead of https://?
>> >
>> > regards
>> > Philipp
>> >
>> >> Thanks
>> >>
>> >> On Mon, Feb 27, 2017 at 1:13 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> >> > Hi Dan,
>> >> >
>> >> > On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
>> >> >> Hi Phillipp
>> >> >>
>> >> >> It sounds like you need me to test a new kernel build with these patches now?
>> >> >
>> >> > if you could find the time, that would be helpful.
>> >> >
>> >> >> I'm new round here so could you please give me the git commands to
>> >> >> check out your patches / tree as well as any kernel config options
>> >> >> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.
>> >> >
>> >> > If you are willing to test on top of drm-next, try
>> >> >
>> >> >     git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
>> >> >     git checkout -b "test-branch" FETCH_HEAD
>> >> >     make imx_v6_v7_defconfig
>> >> >
>> >> > I think the defconfig should include everything necessary for SABRE Lite
>> >> > in your git kernel repository. If you prefer testing on a release
>> >> > kernel, the patches are trivially rebased onto v4.10:
>> >> >
>> >> >     git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>> >> >     git checkout -b "test-branch" FETCH_HEAD
>> >> >     make imx_v6_v7_defconfig
>> >> >
>> >> >> I started moving house yesterday and that continues today and tomorrow
>> >> >> so the soonest I am going to be able to build and test a new kernel
>> >> >> will be Wednesday but Thursday or this upcoming weekend is more
>> >> >> likely.
>> >> >
>> >> > Ok, there's no hurry. Let me know if you have any problems.
>> >> >
>> >> > regards
>> >> > Philipp
>> >> >
>> >>
>> >>
>> >
>> >
>>
>>
>
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

On Mon, 2017-03-06 at 14:28 +0000, Dan MacDonald wrote:
> Hi Phillipp
> 
> I did suspect I would have to check out another repo first but I
> wasn't sure which. Is that 4th command:
> 
> git checkout -b "branchname" FETCH_HEAD
> 
> The exact command I should run? "branchname" sounds a bit generic.

It's a local branch name of your choosing. If you don't plan to modify
the repository and don't care about then later finding that state again
by its name, you can just check out the fetched commit without giving it
a (branch) name:

git checkout FETCH_HEAD

Branches in git are basically named pointers to specific commits, a lot
like tags are, except that branches follow you around when you add new
commits while they are checked out. If you feel like reading a lot more
about this, have a look at the Git book [1], chapter 3.1 [2].

[1] https://git-scm.com/book/en/v2
[2] https://git-scm.com/book/en/v2/Git-Branching-Branches-in-a-Nutshell

regards
Philipp

> Thanks
> 
> On Mon, Mar 6, 2017 at 1:50 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> > On Mon, 2017-03-06 at 09:55 +0000, Dan MacDonald wrote:
> >> Hi Phillipp
> >>
> >> I've just tried those commands on my work machine where we allow
> >> (need) git access and I get the same errors as I did at home.
> >>
> >> Thanks
> >>
> >> On Mon, Mar 6, 2017 at 8:39 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> >> > On Sat, 2017-03-04 at 14:36 +0000, Dan MacDonald wrote:
> >> >> Hi Phillip
> >> >>
> >> >> $ git fetch https://git.pengutronix.de/git/pza/linux.git
> >> >> tags/v4.10-ipu-dp-plane-fix
> >> >> fatal: Not a git repository (or any of the parent directories): .git
> >
> > Oh, I'm slow. This is a local error message.
> >
> > Sorry, I should have mentioned that this must be called from inside an
> > existing kernel git repository. The idea is that you don't have to clone
> > the whole kernel through our pipe, but can use the upstream repository,
> > which has a much better internet connection, for most of the data:
> >
> > git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> > cd linux
> > git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> > git checkout -b "branchname" FETCH_HEAD
> >
> > regards
> > Philipp
> >
> >> >> I get the same error for:
> >> >>
> >> >> git fetch https://git.pengutronix.de/git/pza/linux.git
> >> >> tags/v4.10-ipu-dp-plane-fix
> >> >
> >> > That's strange. I've just tried this with both https and git protocols
> >> > from an external network:
> >> >
> >> > git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> >> > git fetch git://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> >> >
> >> > Does the error persist? Could you try git:// instead of https://?
> >> >
> >> > regards
> >> > Philipp
> >> >
> >> >> Thanks
> >> >>
> >> >> On Mon, Feb 27, 2017 at 1:13 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> >> >> > Hi Dan,
> >> >> >
> >> >> > On Mon, 2017-02-27 at 11:43 +0000, Dan MacDonald wrote:
> >> >> >> Hi Phillipp
> >> >> >>
> >> >> >> It sounds like you need me to test a new kernel build with these patches now?
> >> >> >
> >> >> > if you could find the time, that would be helpful.
> >> >> >
> >> >> >> I'm new round here so could you please give me the git commands to
> >> >> >> check out your patches / tree as well as any kernel config options
> >> >> >> I'll need to ensure are enabled for full imxdrm / SABRE Lite support.
> >> >> >
> >> >> > If you are willing to test on top of drm-next, try
> >> >> >
> >> >> >     git fetch https://git.pengutronix.de/git/pza/linux.git imx-drm/next
> >> >> >     git checkout -b "test-branch" FETCH_HEAD
> >> >> >     make imx_v6_v7_defconfig
> >> >> >
> >> >> > I think the defconfig should include everything necessary for SABRE Lite
> >> >> > in your git kernel repository. If you prefer testing on a release
> >> >> > kernel, the patches are trivially rebased onto v4.10:
> >> >> >
> >> >> >     git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> >> >> >     git checkout -b "test-branch" FETCH_HEAD
> >> >> >     make imx_v6_v7_defconfig
> >> >> >
> >> >> >> I started moving house yesterday and that continues today and tomorrow
> >> >> >> so the soonest I am going to be able to build and test a new kernel
> >> >> >> will be Wednesday but Thursday or this upcoming weekend is more
> >> >> >> likely.
> >> >> >
> >> >> > Ok, there's no hurry. Let me know if you have any problems.
> >> >> >
> >> >> > regards
> >> >> > Philipp
> >> >> >
> >> >>
> >> >>
> >> >
> >> >
> >>
> >>
> >
> >
> 


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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Russell King - ARM Linux]

On Mon, Mar 06, 2017 at 02:50:58PM +0100, Philipp Zabel wrote:
> Sorry, I should have mentioned that this must be called from inside an
> existing kernel git repository. The idea is that you don't have to clone
> the whole kernel through our pipe, but can use the upstream repository,
> which has a much better internet connection, for most of the data:
> 
> git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> cd linux
> git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
> git checkout -b "branchname" FETCH_HEAD

If you have an existing tree which is based on Linus' tree, you can save
the server and download bandwidth by doing:

git clone --dissociate --reference /path/to/local/copy/of/linus/tree https://git.pengutronix.de/git/pza/linux.git
cd linux
git checkout tags/v4.10-ipu-dp-plane-fix

This will clone your tree, but make use of the objects already present
in /path/to/local/copy/of/linus/tree, making copies of them (so it
doesn't matter if you subsequently get rid of that reference tree.)

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Thanks for your tips and links Philipp and Russell!

My distro of choice is Arch and so really I should try to install the
patched git kernel "the Arch way" so my first question is, does anyone
on this list have an Arch PKGBUILD script to create a linux (4.x) git
kernel package for imx6 alikes?

If the answer to that is no then I think I'm most of the way to having
created one based upon https://aur.archlinux.org/packages/linux-git/
but I'm missing a suitable kernel .config file. I tried putting

make imx_v6_v7_defconfig

Into the PKGBUILD but that didn't work out and the ALARM imx6 kernel
config is for kernel 3.14 so I can't use that either.

Thanks



On Mon, Mar 6, 2017 at 4:29 PM, Russell King - ARM Linux
<linux@armlinux.org.uk> wrote:
> On Mon, Mar 06, 2017 at 02:50:58PM +0100, Philipp Zabel wrote:
>> Sorry, I should have mentioned that this must be called from inside an
>> existing kernel git repository. The idea is that you don't have to clone
>> the whole kernel through our pipe, but can use the upstream repository,
>> which has a much better internet connection, for most of the data:
>>
>> git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
>> cd linux
>> git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>> git checkout -b "branchname" FETCH_HEAD
>
> If you have an existing tree which is based on Linus' tree, you can save
> the server and download bandwidth by doing:
>
> git clone --dissociate --reference /path/to/local/copy/of/linus/tree https://git.pengutronix.de/git/pza/linux.git
> cd linux
> git checkout tags/v4.10-ipu-dp-plane-fix
>
> This will clone your tree, but make use of the objects already present
> in /path/to/local/copy/of/linus/tree, making copies of them (so it
> doesn't matter if you subsequently get rid of that reference tree.)
>
> --
> RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
> according to speedtest.net.
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

I think the easiest (if definitely not the fastest) way for me to test
these patches the Arch way

IF

they will apply cleanly against 4.11-rc1 is to patch the
linux-armv7-rc PKGBUILD so that it will apply Phillipp's patches
before it builds the kernel.

The linux-armv7-rc PKGBUILD is available from

git clone https://github.com/archlinuxarm/PKGBUILDs.git

under core/linux-armv7-rc. I think all I should need to do is add:

git fetch https://git.pengutronix.de/git/pza/linux.git
tags/v4.10-ipu-dp-plane-fix
git checkout FETCH_HEAD

To the prepare() section of the PKGBUILD, prob just after the last
`git apply ...` line

Should your patches work fine under 4.11-rc1 Phillipp or do I need to
test againt the very latest git? I realise that would be preferred.

If anyone can tell me how I would build linux git specifically for
Arch on the SABRE Lite, that'd be even better! I haven't needed to
build a kernel in a very long time!

Thanks

On Thu, Mar 9, 2017 at 10:00 AM, Dan MacDonald <allcoms@gmail.com> wrote:
> Thanks for your tips and links Philipp and Russell!
>
> My distro of choice is Arch and so really I should try to install the
> patched git kernel "the Arch way" so my first question is, does anyone
> on this list have an Arch PKGBUILD script to create a linux (4.x) git
> kernel package for imx6 alikes?
>
> If the answer to that is no then I think I'm most of the way to having
> created one based upon https://aur.archlinux.org/packages/linux-git/
> but I'm missing a suitable kernel .config file. I tried putting
>
> make imx_v6_v7_defconfig
>
> Into the PKGBUILD but that didn't work out and the ALARM imx6 kernel
> config is for kernel 3.14 so I can't use that either.
>
> Thanks
>
>
>
> On Mon, Mar 6, 2017 at 4:29 PM, Russell King - ARM Linux
> <linux@armlinux.org.uk> wrote:
>> On Mon, Mar 06, 2017 at 02:50:58PM +0100, Philipp Zabel wrote:
>>> Sorry, I should have mentioned that this must be called from inside an
>>> existing kernel git repository. The idea is that you don't have to clone
>>> the whole kernel through our pipe, but can use the upstream repository,
>>> which has a much better internet connection, for most of the data:
>>>
>>> git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
>>> cd linux
>>> git fetch https://git.pengutronix.de/git/pza/linux.git tags/v4.10-ipu-dp-plane-fix
>>> git checkout -b "branchname" FETCH_HEAD
>>
>> If you have an existing tree which is based on Linus' tree, you can save
>> the server and download bandwidth by doing:
>>
>> git clone --dissociate --reference /path/to/local/copy/of/linus/tree https://git.pengutronix.de/git/pza/linux.git
>> cd linux
>> git checkout tags/v4.10-ipu-dp-plane-fix
>>
>> This will clone your tree, but make use of the objects already present
>> in /path/to/local/copy/of/linus/tree, making copies of them (so it
>> doesn't matter if you subsequently get rid of that reference tree.)
>>
>> --
>> RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
>> FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
>> according to speedtest.net.
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

Hi Dan,

On Fri, 2017-03-10 at 11:11 +0000, Dan MacDonald wrote:
> Should your patches work fine under 4.11-rc1 Phillipp or do I need to
> test againt the very latest git? I realise that would be preferred.

The patches from the v4.10-ipu-dp-plane-fix-2 tag should work under
v4.11-rc1, they are applied on top of v4.11-rc1 in the imx-drm/next
branch.

regards
Philipp

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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Philipp

I moved house again on Sunday - that is the second time in two months.
I won't bore you with the details but it means I've not had much time
to myself recently and why I've not been able to test this patch.

As I was saying previously, the only way I can reliably test this is
to do it 'the Arch way' by creating a new kernel package with your
patch rolled in. Doing it that way means I can't directly use your git
repo in the PKGBUILD but instead we need to create a patch that can be
applied against
https://www.kernel.org/pub/linux/kernel/v4.x/testing/linux-4.11-rc3.tar.xz
which is what is downloaded and patched by the armv7-rc PKGBUILD as
feched from:

git clone https://github.com/archlinuxarm/PKGBUILDs.git

See the PKGBUILD under core/linux-armv7-rc. There is a short guide on
how Arch/ABS expects its patches to be formatted here:

https://wiki.archlinux.org/index.php/Patching_in_ABS

I'm surprised I'm the only Arch user on this list - I thought someone
else would already have a dev kernel PKGBUILD for me but apparently
not?

If you really don't have time to create a patch against the latest rc
tarball I can give it a go but I can see me making a royal mess of it!
:)

Thanks

On Mon, Mar 13, 2017 at 11:11 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> Hi Dan,
>
> On Fri, 2017-03-10 at 11:11 +0000, Dan MacDonald wrote:
>> Should your patches work fine under 4.11-rc1 Phillipp or do I need to
>> test againt the very latest git? I realise that would be preferred.
>
> The patches from the v4.10-ipu-dp-plane-fix-2 tag should work under
> v4.11-rc1, they are applied on top of v4.11-rc1 in the imx-drm/next
> branch.
>
> regards
> Philipp
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi all

Up until now I've only ever used the most basic features of git, so
I've had to do some research into how to best/cleanly extract
Phillipps patches so that I can include his changes into an Arch
kernel PKGBUILD.

I think the following should work:

git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
cd linux
git fetch https://git.pengutronix.de/git/pza/linux.git
tags/v4.10-ipu-dp-plane-fix
git checkout FETCH_HEAD
git whatchanged -p origin/master..FETCH_HEAD > sabre-lite.patch

I should then be able to include that patch in a 4.11-rc4 PKGBUILD -
I'll give it a go this weekend and see if it applies and builds OK but
please let me know if anyone sees any flaws in this procedure.

Thanks


On Wed, Mar 22, 2017 at 10:28 PM, Dan MacDonald <allcoms@gmail.com> wrote:
> Hi Philipp
>
> I moved house again on Sunday - that is the second time in two months.
> I won't bore you with the details but it means I've not had much time
> to myself recently and why I've not been able to test this patch.
>
> As I was saying previously, the only way I can reliably test this is
> to do it 'the Arch way' by creating a new kernel package with your
> patch rolled in. Doing it that way means I can't directly use your git
> repo in the PKGBUILD but instead we need to create a patch that can be
> applied against
> https://www.kernel.org/pub/linux/kernel/v4.x/testing/linux-4.11-rc3.tar.xz
> which is what is downloaded and patched by the armv7-rc PKGBUILD as
> feched from:
>
> git clone https://github.com/archlinuxarm/PKGBUILDs.git
>
> See the PKGBUILD under core/linux-armv7-rc. There is a short guide on
> how Arch/ABS expects its patches to be formatted here:
>
> https://wiki.archlinux.org/index.php/Patching_in_ABS
>
> I'm surprised I'm the only Arch user on this list - I thought someone
> else would already have a dev kernel PKGBUILD for me but apparently
> not?
>
> If you really don't have time to create a patch against the latest rc
> tarball I can give it a go but I can see me making a royal mess of it!
> :)
>
> Thanks
>
> On Mon, Mar 13, 2017 at 11:11 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> Hi Dan,
>>
>> On Fri, 2017-03-10 at 11:11 +0000, Dan MacDonald wrote:
>>> Should your patches work fine under 4.11-rc1 Phillipp or do I need to
>>> test againt the very latest git? I realise that would be preferred.
>>
>> The patches from the v4.10-ipu-dp-plane-fix-2 tag should work under
>> v4.11-rc1, they are applied on top of v4.11-rc1 in the imx-drm/next
>> branch.
>>
>> regards
>> Philipp
>>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Russell King - ARM Linux]

On Fri, Mar 31, 2017 at 02:36:31PM +0100, Dan MacDonald wrote:
> Hi all
> 
> Up until now I've only ever used the most basic features of git, so
> I've had to do some research into how to best/cleanly extract
> Phillipps patches so that I can include his changes into an Arch
> kernel PKGBUILD.
> 
> I think the following should work:
> 
> git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> cd linux
> git fetch https://git.pengutronix.de/git/pza/linux.git
> tags/v4.10-ipu-dp-plane-fix
> git checkout FETCH_HEAD
> git whatchanged -p origin/master..FETCH_HEAD > sabre-lite.patch

I don't think that will work, because it'll output the changes as
individual patches in reverse order (newest first) which will be
no good when trying to feed it into patch or git apply.

I think what you instead want is:

  git diff origin/master...FETCH_HEAD > sabre-lite.patch

which will be the changes that are in FETCH_HEAD that aren't in
origin/master as a single patch.

> I should then be able to include that patch in a 4.11-rc4 PKGBUILD -
> I'll give it a go this weekend and see if it applies and builds OK but
> please let me know if anyone sees any flaws in this procedure.

Thanks - one of the issues is that not everyone knows the details of
distribution package build systems (each distro seems to have their
own unique way of building and packaging stuff.)

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Thanks Russell!

I think the patch has applied OK - I've just started the build so it
could be a while yet. 12 hours maybe? Its building support for every
arm7 thing under the sun because I'm too lazy (sensible?) to try
hacking it down to size.

Adding the patch to the Arch rc kernel PKGBUILD was as simple as
adding the name of the patch to the source() section, adding a
corresponding 'SKIP' to the end of the md5sums() section and then
adding:

 git apply ../sabre-lite.patch

to the prepare() section of the PKGBUILD. I copied the patch into the
same dir as the PKGBUILD and then ran:

$ makepkg

In the same dir as the kernel PKGBUILD and patches.

Results at last! :D

On Fri, Mar 31, 2017 at 3:15 PM, Russell King - ARM Linux
<linux@armlinux.org.uk> wrote:
> On Fri, Mar 31, 2017 at 02:36:31PM +0100, Dan MacDonald wrote:
>> Hi all
>>
>> Up until now I've only ever used the most basic features of git, so
>> I've had to do some research into how to best/cleanly extract
>> Phillipps patches so that I can include his changes into an Arch
>> kernel PKGBUILD.
>>
>> I think the following should work:
>>
>> git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
>> cd linux
>> git fetch https://git.pengutronix.de/git/pza/linux.git
>> tags/v4.10-ipu-dp-plane-fix
>> git checkout FETCH_HEAD
>> git whatchanged -p origin/master..FETCH_HEAD > sabre-lite.patch
>
> I don't think that will work, because it'll output the changes as
> individual patches in reverse order (newest first) which will be
> no good when trying to feed it into patch or git apply.
>
> I think what you instead want is:
>
>   git diff origin/master...FETCH_HEAD > sabre-lite.patch
>
> which will be the changes that are in FETCH_HEAD that aren't in
> origin/master as a single patch.
>
>> I should then be able to include that patch in a 4.11-rc4 PKGBUILD -
>> I'll give it a go this weekend and see if it applies and builds OK but
>> please let me know if anyone sees any flaws in this procedure.
>
> Thanks - one of the issues is that not everyone knows the details of
> distribution package build systems (each distro seems to have their
> own unique way of building and packaging stuff.)
>
> --
> RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
> according to speedtest.net.
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

[-- Attachment #1: Type: text/plain, Size: 3106 bytes --]

No such luck.

The patch I used (against 4.11-rc4) is attached.

The error was:

SHIPPED arch/arm/boot/compressed/bswapsdi2.S
  AS      arch/arm/boot/compressed/bswapsdi2.o
  LD      arch/arm/boot/compressed/vmlinux
  OBJCOPY arch/arm/boot/zImage
  Kernel: arch/arm/boot/zImage is ready
  Building modules, stage 2.
  MODPOST 3341 modules
ERROR: "ipu_plane_disable_deferred" [drivers/gpu/drm/imx/imxdrm.ko] undefined!
make[1]: *** [scripts/Makefile.modpost:91: __modpost] Error 1
make: *** [Makefile:1200: modules] Error 2
==> ERROR: A failure occurred in build().
    Aborting...


On Sat, Apr 1, 2017 at 1:26 AM, Dan MacDonald <allcoms@gmail.com> wrote:
> Thanks Russell!
>
> I think the patch has applied OK - I've just started the build so it
> could be a while yet. 12 hours maybe? Its building support for every
> arm7 thing under the sun because I'm too lazy (sensible?) to try
> hacking it down to size.
>
> Adding the patch to the Arch rc kernel PKGBUILD was as simple as
> adding the name of the patch to the source() section, adding a
> corresponding 'SKIP' to the end of the md5sums() section and then
> adding:
>
>  git apply ../sabre-lite.patch
>
> to the prepare() section of the PKGBUILD. I copied the patch into the
> same dir as the PKGBUILD and then ran:
>
> $ makepkg
>
> In the same dir as the kernel PKGBUILD and patches.
>
> Results at last! :D
>
> On Fri, Mar 31, 2017 at 3:15 PM, Russell King - ARM Linux
> <linux@armlinux.org.uk> wrote:
>> On Fri, Mar 31, 2017 at 02:36:31PM +0100, Dan MacDonald wrote:
>>> Hi all
>>>
>>> Up until now I've only ever used the most basic features of git, so
>>> I've had to do some research into how to best/cleanly extract
>>> Phillipps patches so that I can include his changes into an Arch
>>> kernel PKGBUILD.
>>>
>>> I think the following should work:
>>>
>>> git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
>>> cd linux
>>> git fetch https://git.pengutronix.de/git/pza/linux.git
>>> tags/v4.10-ipu-dp-plane-fix
>>> git checkout FETCH_HEAD
>>> git whatchanged -p origin/master..FETCH_HEAD > sabre-lite.patch
>>
>> I don't think that will work, because it'll output the changes as
>> individual patches in reverse order (newest first) which will be
>> no good when trying to feed it into patch or git apply.
>>
>> I think what you instead want is:
>>
>>   git diff origin/master...FETCH_HEAD > sabre-lite.patch
>>
>> which will be the changes that are in FETCH_HEAD that aren't in
>> origin/master as a single patch.
>>
>>> I should then be able to include that patch in a 4.11-rc4 PKGBUILD -
>>> I'll give it a go this weekend and see if it applies and builds OK but
>>> please let me know if anyone sees any flaws in this procedure.
>>
>> Thanks - one of the issues is that not everyone knows the details of
>> distribution package build systems (each distro seems to have their
>> own unique way of building and packaging stuff.)
>>
>> --
>> RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
>> FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
>> according to speedtest.net.

[-- Attachment #2: sabre-lite.patch --]
[-- Type: text/x-patch, Size: 11741 bytes --]

diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index 33404295b447..b07499214c72 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -30,6 +30,7 @@
 #include <video/imx-ipu-v3.h>
 
 #include "imx-drm.h"
+#include "ipuv3-plane.h"
 
 #define MAX_CRTC	4
 
@@ -160,6 +161,9 @@ static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = {
 static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
 {
 	struct drm_device *dev = state->dev;
+	struct drm_plane *plane;
+	struct drm_plane_state *plane_state;
+	int i;
 
 	drm_atomic_helper_commit_modeset_disables(dev, state);
 
@@ -169,10 +173,13 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
 
 	drm_atomic_helper_commit_modeset_enables(dev, state);
 
-	drm_atomic_helper_commit_hw_done(state);
-
 	drm_atomic_helper_wait_for_vblanks(dev, state);
 
+	for_each_plane_in_state(state, plane, plane_state, i)
+		ipu_plane_disable_deferred(plane);
+
+	drm_atomic_helper_commit_hw_done(state);
+
 	drm_atomic_helper_cleanup_planes(dev, state);
 }
 
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index 6be515a9fb69..0f15f11f26e0 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -60,6 +60,26 @@ static void ipu_crtc_enable(struct drm_crtc *crtc)
 	ipu_di_enable(ipu_crtc->di);
 }
 
+static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
+				    struct drm_crtc_state *old_crtc_state)
+{
+	bool disable_partial = false;
+	bool disable_full = false;
+	struct drm_plane *plane;
+
+	drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
+		if (plane == &ipu_crtc->plane[0]->base)
+			disable_full = true;
+		if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
+			disable_partial = true;
+	}
+
+	if (disable_partial)
+		ipu_plane_disable(ipu_crtc->plane[1], true);
+	if (disable_full)
+		ipu_plane_disable(ipu_crtc->plane[0], false);
+}
+
 static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
 				    struct drm_crtc_state *old_crtc_state)
 {
@@ -73,7 +93,7 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
 	 * attached IDMACs will be left in undefined state, possibly hanging
 	 * the IPU or even system.
 	 */
-	drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
+	ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
 	ipu_dc_disable(ipu);
 
 	spin_lock_irq(&crtc->dev->event_lock);
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index e74a0ad52950..ec4f86295184 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -172,22 +172,28 @@ static void ipu_plane_enable(struct ipu_plane *ipu_plane)
 		ipu_dp_enable_channel(ipu_plane->dp);
 }
 
-static int ipu_disable_plane(struct drm_plane *plane)
+void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
 {
-	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
-
 	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
 
 	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
 
-	if (ipu_plane->dp)
-		ipu_dp_disable_channel(ipu_plane->dp);
+	if (ipu_plane->dp && disable_dp_channel)
+		ipu_dp_disable_channel(ipu_plane->dp, false);
 	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
 	ipu_dmfc_disable_channel(ipu_plane->dmfc);
 	if (ipu_plane->dp)
 		ipu_dp_disable(ipu_plane->ipu);
+}
 
-	return 0;
+void ipu_plane_disable_deferred(struct drm_plane *plane)
+{
+	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
+
+	if (ipu_plane->disabling) {
+		ipu_plane->disabling = false;
+		ipu_plane_disable(ipu_plane, false);
+	}
 }
 
 static void ipu_plane_destroy(struct drm_plane *plane)
@@ -361,7 +367,11 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
 static void ipu_plane_atomic_disable(struct drm_plane *plane,
 				     struct drm_plane_state *old_state)
 {
-	ipu_disable_plane(plane);
+	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
+
+	if (ipu_plane->dp)
+		ipu_dp_disable_channel(ipu_plane->dp, true);
+	ipu_plane->disabling = true;
 }
 
 static void ipu_plane_atomic_update(struct drm_plane *plane,
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
index 338b88a74eb6..0e2a723ff981 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.h
+++ b/drivers/gpu/drm/imx/ipuv3-plane.h
@@ -23,6 +23,8 @@ struct ipu_plane {
 
 	int			dma;
 	int			dp_flow;
+
+	bool			disabling;
 };
 
 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
@@ -42,4 +44,7 @@ void ipu_plane_put_resources(struct ipu_plane *plane);
 
 int ipu_plane_irq(struct ipu_plane *plane);
 
+void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
+void ipu_plane_disable_deferred(struct drm_plane *plane);
+
 #endif
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 97218af4fe75..b020d97e7699 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -51,15 +51,17 @@ int ipu_get_num(struct ipu_soc *ipu)
 }
 EXPORT_SYMBOL_GPL(ipu_get_num);
 
-void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
+void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync)
 {
 	u32 val;
 
 	val = ipu_cm_read(ipu, IPU_SRM_PRI2);
-	val |= 0x8;
+	val &= ~DP_S_SRM_MODE_MASK;
+	val |= sync ? DP_S_SRM_MODE_NEXT_FRAME :
+		      DP_S_SRM_MODE_NOW;
 	ipu_cm_write(ipu, val, IPU_SRM_PRI2);
 }
-EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
+EXPORT_SYMBOL_GPL(ipu_srm_dp_update);
 
 enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc)
 {
diff --git a/drivers/gpu/ipu-v3/ipu-dc.c b/drivers/gpu/ipu-v3/ipu-dc.c
index 659475c1e44a..7a4b8362dda8 100644
--- a/drivers/gpu/ipu-v3/ipu-dc.c
+++ b/drivers/gpu/ipu-v3/ipu-dc.c
@@ -112,8 +112,6 @@ struct ipu_dc_priv {
 	struct ipu_dc		channels[IPU_DC_NUM_CHANNELS];
 	struct mutex		mutex;
 	struct completion	comp;
-	int			dc_irq;
-	int			dp_irq;
 	int			use_count;
 };
 
@@ -262,47 +260,13 @@ void ipu_dc_enable_channel(struct ipu_dc *dc)
 }
 EXPORT_SYMBOL_GPL(ipu_dc_enable_channel);
 
-static irqreturn_t dc_irq_handler(int irq, void *dev_id)
-{
-	struct ipu_dc *dc = dev_id;
-	u32 reg;
-
-	reg = readl(dc->base + DC_WR_CH_CONF);
-	reg &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
-	writel(reg, dc->base + DC_WR_CH_CONF);
-
-	/* The Freescale BSP kernel clears DIx_COUNTER_RELEASE here */
-
-	complete(&dc->priv->comp);
-	return IRQ_HANDLED;
-}
-
 void ipu_dc_disable_channel(struct ipu_dc *dc)
 {
-	struct ipu_dc_priv *priv = dc->priv;
-	int irq;
-	unsigned long ret;
 	u32 val;
 
-	/* TODO: Handle MEM_FG_SYNC differently from MEM_BG_SYNC */
-	if (dc->chno == 1)
-		irq = priv->dc_irq;
-	else if (dc->chno == 5)
-		irq = priv->dp_irq;
-	else
-		return;
-
-	init_completion(&priv->comp);
-	enable_irq(irq);
-	ret = wait_for_completion_timeout(&priv->comp, msecs_to_jiffies(50));
-	disable_irq(irq);
-	if (ret == 0) {
-		dev_warn(priv->dev, "DC stop timeout after 50 ms\n");
-
-		val = readl(dc->base + DC_WR_CH_CONF);
-		val &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
-		writel(val, dc->base + DC_WR_CH_CONF);
-	}
+	val = readl(dc->base + DC_WR_CH_CONF);
+	val &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
+	writel(val, dc->base + DC_WR_CH_CONF);
 }
 EXPORT_SYMBOL_GPL(ipu_dc_disable_channel);
 
@@ -389,7 +353,7 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
 	struct ipu_dc_priv *priv;
 	static int channel_offsets[] = { 0, 0x1c, 0x38, 0x54, 0x58, 0x5c,
 		0x78, 0, 0x94, 0xb4};
-	int i, ret;
+	int i;
 
 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)
@@ -410,23 +374,6 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
 		priv->channels[i].base = priv->dc_reg + channel_offsets[i];
 	}
 
-	priv->dc_irq = ipu_map_irq(ipu, IPU_IRQ_DC_FC_1);
-	if (!priv->dc_irq)
-		return -EINVAL;
-	ret = devm_request_irq(dev, priv->dc_irq, dc_irq_handler, 0, NULL,
-			       &priv->channels[1]);
-	if (ret < 0)
-		return ret;
-	disable_irq(priv->dc_irq);
-	priv->dp_irq = ipu_map_irq(ipu, IPU_IRQ_DP_SF_END);
-	if (!priv->dp_irq)
-		return -EINVAL;
-	ret = devm_request_irq(dev, priv->dp_irq, dc_irq_handler, 0, NULL,
-			       &priv->channels[5]);
-	if (ret < 0)
-		return ret;
-	disable_irq(priv->dp_irq);
-
 	writel(DC_WR_CH_CONF_WORD_SIZE_24 | DC_WR_CH_CONF_DISP_ID_PARALLEL(1) |
 			DC_WR_CH_CONF_PROG_DI_ID,
 			priv->channels[1].base + DC_WR_CH_CONF);
diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
index 98686edbcdbb..9b2b3fa479c4 100644
--- a/drivers/gpu/ipu-v3/ipu-dp.c
+++ b/drivers/gpu/ipu-v3/ipu-dp.c
@@ -112,7 +112,7 @@ int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
 		writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
 	}
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -127,7 +127,7 @@ int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
 
 	writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	return 0;
 }
@@ -207,7 +207,7 @@ int ipu_dp_setup_channel(struct ipu_dp *dp,
 					flow->out_cs, DP_COM_CONF_CSC_DEF_FG);
 	}
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -247,7 +247,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
 	reg |= DP_COM_CONF_FG_EN;
 	writel(reg, flow->base + DP_COM_CONF);
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -255,7 +255,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
 }
 EXPORT_SYMBOL_GPL(ipu_dp_enable_channel);
 
-void ipu_dp_disable_channel(struct ipu_dp *dp)
+void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
 {
 	struct ipu_flow *flow = to_flow(dp);
 	struct ipu_dp_priv *priv = flow->priv;
@@ -275,10 +275,7 @@ void ipu_dp_disable_channel(struct ipu_dp *dp)
 	writel(reg, flow->base + DP_COM_CONF);
 
 	writel(0, flow->base + DP_FG_POS);
-	ipu_srm_dp_sync_update(priv->ipu);
-
-	if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
-		ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
+	ipu_srm_dp_update(priv->ipu, sync);
 
 	mutex_unlock(&priv->mutex);
 }
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 22e47b68b14a..285595702ee0 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -75,6 +75,11 @@ struct ipu_soc;
 #define IPU_INT_CTRL(n)		IPU_CM_REG(0x003C + 4 * (n))
 #define IPU_INT_STAT(n)		IPU_CM_REG(0x0200 + 4 * (n))
 
+/* SRM_PRI2 */
+#define DP_S_SRM_MODE_MASK		(0x3 << 3)
+#define DP_S_SRM_MODE_NOW		(0x3 << 3)
+#define DP_S_SRM_MODE_NEXT_FRAME	(0x1 << 3)
+
 /* FS_PROC_FLOW1 */
 #define FS_PRPENC_ROT_SRC_SEL_MASK	(0xf << 0)
 #define FS_PRPENC_ROT_SRC_SEL_ENC		(0x7 << 0)
@@ -215,7 +220,7 @@ static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
 	writel(value, ipu->idmac_reg + offset);
 }
 
-void ipu_srm_dp_sync_update(struct ipu_soc *ipu);
+void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync);
 
 int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
 int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 53cd07ccaa4c..899d2b00ad6d 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -300,7 +300,7 @@ struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow);
 void ipu_dp_put(struct ipu_dp *);
 int ipu_dp_enable(struct ipu_soc *ipu);
 int ipu_dp_enable_channel(struct ipu_dp *dp);
-void ipu_dp_disable_channel(struct ipu_dp *dp);
+void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync);
 void ipu_dp_disable(struct ipu_soc *ipu);
 int ipu_dp_setup_channel(struct ipu_dp *dp,
 		enum ipu_color_space in, enum ipu_color_space out);

[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

[-- Attachment #1: Type: text/plain, Size: 428 bytes --]

Hi Dan,

On Sat, 2017-04-01 at 11:50 +0100, Dan MacDonald wrote:
> No such luck.

I am sorry, I forgot to fix the old patches for modular builds. I have
added the updated patches as tags v4.9-ipu-dp-plane-fix-2,
v4.10-ipu-dp-plane-fix-3, and v4.11-ipu-dp-plane-fix. For example:

    git://git.pengutronix.de/git/pza/linux.git tags/v4.11-ipu-dp-plane-fix

The changes are attached as a patch against v4.11-rc1.

regards
Philipp

[-- Attachment #2: v4.11-rc1-ipu-dp-plane-fix.patch --]
[-- Type: text/x-patch, Size: 14956 bytes --]

diff --git a/drivers/gpu/drm/imx/Kconfig b/drivers/gpu/drm/imx/Kconfig
index f2c9ae822149c..c9e439c82241c 100644
--- a/drivers/gpu/drm/imx/Kconfig
+++ b/drivers/gpu/drm/imx/Kconfig
@@ -31,13 +31,6 @@ config DRM_IMX_LDB
 	  Choose this to enable the internal LVDS Display Bridge (LDB)
 	  found on i.MX53 and i.MX6 processors.
 
-config DRM_IMX_IPUV3
-	tristate
-	depends on DRM_IMX
-	depends on IMX_IPUV3_CORE
-	default y if DRM_IMX=y
-	default m if DRM_IMX=m
-
 config DRM_IMX_HDMI
 	tristate "Freescale i.MX DRM HDMI"
 	select DRM_DW_HDMI
diff --git a/drivers/gpu/drm/imx/Makefile b/drivers/gpu/drm/imx/Makefile
index f3ecd8903d973..16ecef33e0089 100644
--- a/drivers/gpu/drm/imx/Makefile
+++ b/drivers/gpu/drm/imx/Makefile
@@ -1,5 +1,5 @@
 
-imxdrm-objs := imx-drm-core.o
+imxdrm-objs := imx-drm-core.o ipuv3-crtc.o ipuv3-plane.o
 
 obj-$(CONFIG_DRM_IMX) += imxdrm.o
 
@@ -7,6 +7,5 @@ obj-$(CONFIG_DRM_IMX_PARALLEL_DISPLAY) += parallel-display.o
 obj-$(CONFIG_DRM_IMX_TVE) += imx-tve.o
 obj-$(CONFIG_DRM_IMX_LDB) += imx-ldb.o
 
-imx-ipuv3-crtc-objs  := ipuv3-crtc.o ipuv3-plane.o
 obj-$(CONFIG_DRM_IMX_IPUV3)	+= imx-ipuv3-crtc.o
 obj-$(CONFIG_DRM_IMX_HDMI) += dw_hdmi-imx.o
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index f562cb7964b08..056743d26e800 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -30,6 +30,7 @@
 #include <video/imx-ipu-v3.h>
 
 #include "imx-drm.h"
+#include "ipuv3-plane.h"
 
 #define MAX_CRTC	4
 
@@ -160,6 +161,10 @@ static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = {
 static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
 {
 	struct drm_device *dev = state->dev;
+	struct drm_plane *plane;
+	struct drm_plane_state *old_plane_state;
+	bool plane_disabling = false;
+	int i;
 
 	drm_atomic_helper_commit_modeset_disables(dev, state);
 
@@ -169,11 +174,20 @@ static void imx_drm_atomic_commit_tail(struct drm_atomic_state *state)
 
 	drm_atomic_helper_commit_modeset_enables(dev, state);
 
-	drm_atomic_helper_commit_hw_done(state);
+	for_each_plane_in_state(state, plane, old_plane_state, i) {
+		if (drm_atomic_plane_disabling(plane, old_plane_state))
+			plane_disabling = true;
+	}
 
-	drm_atomic_helper_wait_for_vblanks(dev, state);
+	if (plane_disabling) {
+		drm_atomic_helper_wait_for_vblanks(dev, state);
 
-	drm_atomic_helper_cleanup_planes(dev, state);
+		for_each_plane_in_state(state, plane, old_plane_state, i)
+			ipu_plane_disable_deferred(plane);
+
+	}
+
+	drm_atomic_helper_commit_hw_done(state);
 }
 
 static struct drm_mode_config_helper_funcs imx_drm_mode_config_helpers = {
@@ -519,7 +533,23 @@ static struct platform_driver imx_drm_pdrv = {
 		.of_match_table = imx_drm_dt_ids,
 	},
 };
-module_platform_driver(imx_drm_pdrv);
+
+static struct platform_driver * const drivers[] = {
+	&imx_drm_pdrv,
+	&ipu_drm_driver,
+};
+
+static int __init imx_drm_init(void)
+{
+	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
+}
+module_init(imx_drm_init);
+
+static void __exit imx_drm_exit(void)
+{
+	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
+}
+module_exit(imx_drm_exit);
 
 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
 MODULE_DESCRIPTION("i.MX drm driver core");
diff --git a/drivers/gpu/drm/imx/imx-drm.h b/drivers/gpu/drm/imx/imx-drm.h
index 5a91cb16c8fa5..98ee8a4e62971 100644
--- a/drivers/gpu/drm/imx/imx-drm.h
+++ b/drivers/gpu/drm/imx/imx-drm.h
@@ -42,6 +42,8 @@ int imx_drm_init_drm(struct platform_device *pdev,
 		int preferred_bpp);
 int imx_drm_exit_drm(void);
 
+extern struct platform_driver ipu_drm_driver;
+
 void imx_drm_mode_config_init(struct drm_device *drm);
 
 struct drm_gem_cma_object *imx_drm_fb_get_obj(struct drm_framebuffer *fb);
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index 6be515a9fb694..19df599d45714 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -60,6 +60,26 @@ static void ipu_crtc_enable(struct drm_crtc *crtc)
 	ipu_di_enable(ipu_crtc->di);
 }
 
+static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
+				    struct drm_crtc_state *old_crtc_state)
+{
+	bool disable_partial = false;
+	bool disable_full = false;
+	struct drm_plane *plane;
+
+	drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
+		if (plane == &ipu_crtc->plane[0]->base)
+			disable_full = true;
+		if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
+			disable_partial = true;
+	}
+
+	if (disable_partial)
+		ipu_plane_disable(ipu_crtc->plane[1], true);
+	if (disable_full)
+		ipu_plane_disable(ipu_crtc->plane[0], false);
+}
+
 static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
 				    struct drm_crtc_state *old_crtc_state)
 {
@@ -73,7 +93,7 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
 	 * attached IDMACs will be left in undefined state, possibly hanging
 	 * the IPU or even system.
 	 */
-	drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
+	ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
 	ipu_dc_disable(ipu);
 
 	spin_lock_irq(&crtc->dev->event_lock);
@@ -457,16 +477,10 @@ static int ipu_drm_remove(struct platform_device *pdev)
 	return 0;
 }
 
-static struct platform_driver ipu_drm_driver = {
+struct platform_driver ipu_drm_driver = {
 	.driver = {
 		.name = "imx-ipuv3-crtc",
 	},
 	.probe = ipu_drm_probe,
 	.remove = ipu_drm_remove,
 };
-module_platform_driver(ipu_drm_driver);
-
-MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:imx-ipuv3-crtc");
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 8b5294d47ceee..5023bbd21dd1e 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -172,23 +172,30 @@ static void ipu_plane_enable(struct ipu_plane *ipu_plane)
 		ipu_dp_enable_channel(ipu_plane->dp);
 }
 
-static int ipu_disable_plane(struct drm_plane *plane)
+void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
 {
-	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
-
 	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
 
 	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
 
-	if (ipu_plane->dp)
-		ipu_dp_disable_channel(ipu_plane->dp);
+	if (ipu_plane->dp && disable_dp_channel)
+		ipu_dp_disable_channel(ipu_plane->dp, false);
 	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
 	ipu_dmfc_disable_channel(ipu_plane->dmfc);
 	if (ipu_plane->dp)
 		ipu_dp_disable(ipu_plane->ipu);
+}
 
-	return 0;
+void ipu_plane_disable_deferred(struct drm_plane *plane)
+{
+	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
+
+	if (ipu_plane->disabling) {
+		ipu_plane->disabling = false;
+		ipu_plane_disable(ipu_plane, false);
+	}
 }
+EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
 
 static void ipu_plane_destroy(struct drm_plane *plane)
 {
@@ -361,7 +368,11 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
 static void ipu_plane_atomic_disable(struct drm_plane *plane,
 				     struct drm_plane_state *old_state)
 {
-	ipu_disable_plane(plane);
+	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
+
+	if (ipu_plane->dp)
+		ipu_dp_disable_channel(ipu_plane->dp, true);
+	ipu_plane->disabling = true;
 }
 
 static void ipu_plane_atomic_update(struct drm_plane *plane,
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
index 338b88a74eb6e..0e2a723ff9816 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.h
+++ b/drivers/gpu/drm/imx/ipuv3-plane.h
@@ -23,6 +23,8 @@ struct ipu_plane {
 
 	int			dma;
 	int			dp_flow;
+
+	bool			disabling;
 };
 
 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
@@ -42,4 +44,7 @@ void ipu_plane_put_resources(struct ipu_plane *plane);
 
 int ipu_plane_irq(struct ipu_plane *plane);
 
+void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
+void ipu_plane_disable_deferred(struct drm_plane *plane);
+
 #endif
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 8368e6f766ee5..8a32ed25a1c29 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -51,15 +51,17 @@ int ipu_get_num(struct ipu_soc *ipu)
 }
 EXPORT_SYMBOL_GPL(ipu_get_num);
 
-void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
+void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync)
 {
 	u32 val;
 
 	val = ipu_cm_read(ipu, IPU_SRM_PRI2);
-	val |= 0x8;
+	val &= ~DP_S_SRM_MODE_MASK;
+	val |= sync ? DP_S_SRM_MODE_NEXT_FRAME :
+		      DP_S_SRM_MODE_NOW;
 	ipu_cm_write(ipu, val, IPU_SRM_PRI2);
 }
-EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
+EXPORT_SYMBOL_GPL(ipu_srm_dp_update);
 
 enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc)
 {
diff --git a/drivers/gpu/ipu-v3/ipu-dc.c b/drivers/gpu/ipu-v3/ipu-dc.c
index 659475c1e44ab..7a4b8362dda8f 100644
--- a/drivers/gpu/ipu-v3/ipu-dc.c
+++ b/drivers/gpu/ipu-v3/ipu-dc.c
@@ -112,8 +112,6 @@ struct ipu_dc_priv {
 	struct ipu_dc		channels[IPU_DC_NUM_CHANNELS];
 	struct mutex		mutex;
 	struct completion	comp;
-	int			dc_irq;
-	int			dp_irq;
 	int			use_count;
 };
 
@@ -262,47 +260,13 @@ void ipu_dc_enable_channel(struct ipu_dc *dc)
 }
 EXPORT_SYMBOL_GPL(ipu_dc_enable_channel);
 
-static irqreturn_t dc_irq_handler(int irq, void *dev_id)
-{
-	struct ipu_dc *dc = dev_id;
-	u32 reg;
-
-	reg = readl(dc->base + DC_WR_CH_CONF);
-	reg &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
-	writel(reg, dc->base + DC_WR_CH_CONF);
-
-	/* The Freescale BSP kernel clears DIx_COUNTER_RELEASE here */
-
-	complete(&dc->priv->comp);
-	return IRQ_HANDLED;
-}
-
 void ipu_dc_disable_channel(struct ipu_dc *dc)
 {
-	struct ipu_dc_priv *priv = dc->priv;
-	int irq;
-	unsigned long ret;
 	u32 val;
 
-	/* TODO: Handle MEM_FG_SYNC differently from MEM_BG_SYNC */
-	if (dc->chno == 1)
-		irq = priv->dc_irq;
-	else if (dc->chno == 5)
-		irq = priv->dp_irq;
-	else
-		return;
-
-	init_completion(&priv->comp);
-	enable_irq(irq);
-	ret = wait_for_completion_timeout(&priv->comp, msecs_to_jiffies(50));
-	disable_irq(irq);
-	if (ret == 0) {
-		dev_warn(priv->dev, "DC stop timeout after 50 ms\n");
-
-		val = readl(dc->base + DC_WR_CH_CONF);
-		val &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
-		writel(val, dc->base + DC_WR_CH_CONF);
-	}
+	val = readl(dc->base + DC_WR_CH_CONF);
+	val &= ~DC_WR_CH_CONF_PROG_TYPE_MASK;
+	writel(val, dc->base + DC_WR_CH_CONF);
 }
 EXPORT_SYMBOL_GPL(ipu_dc_disable_channel);
 
@@ -389,7 +353,7 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
 	struct ipu_dc_priv *priv;
 	static int channel_offsets[] = { 0, 0x1c, 0x38, 0x54, 0x58, 0x5c,
 		0x78, 0, 0x94, 0xb4};
-	int i, ret;
+	int i;
 
 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)
@@ -410,23 +374,6 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
 		priv->channels[i].base = priv->dc_reg + channel_offsets[i];
 	}
 
-	priv->dc_irq = ipu_map_irq(ipu, IPU_IRQ_DC_FC_1);
-	if (!priv->dc_irq)
-		return -EINVAL;
-	ret = devm_request_irq(dev, priv->dc_irq, dc_irq_handler, 0, NULL,
-			       &priv->channels[1]);
-	if (ret < 0)
-		return ret;
-	disable_irq(priv->dc_irq);
-	priv->dp_irq = ipu_map_irq(ipu, IPU_IRQ_DP_SF_END);
-	if (!priv->dp_irq)
-		return -EINVAL;
-	ret = devm_request_irq(dev, priv->dp_irq, dc_irq_handler, 0, NULL,
-			       &priv->channels[5]);
-	if (ret < 0)
-		return ret;
-	disable_irq(priv->dp_irq);
-
 	writel(DC_WR_CH_CONF_WORD_SIZE_24 | DC_WR_CH_CONF_DISP_ID_PARALLEL(1) |
 			DC_WR_CH_CONF_PROG_DI_ID,
 			priv->channels[1].base + DC_WR_CH_CONF);
diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
index 98686edbcdbb0..9b2b3fa479c46 100644
--- a/drivers/gpu/ipu-v3/ipu-dp.c
+++ b/drivers/gpu/ipu-v3/ipu-dp.c
@@ -112,7 +112,7 @@ int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
 		writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
 	}
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -127,7 +127,7 @@ int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
 
 	writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	return 0;
 }
@@ -207,7 +207,7 @@ int ipu_dp_setup_channel(struct ipu_dp *dp,
 					flow->out_cs, DP_COM_CONF_CSC_DEF_FG);
 	}
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -247,7 +247,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
 	reg |= DP_COM_CONF_FG_EN;
 	writel(reg, flow->base + DP_COM_CONF);
 
-	ipu_srm_dp_sync_update(priv->ipu);
+	ipu_srm_dp_update(priv->ipu, true);
 
 	mutex_unlock(&priv->mutex);
 
@@ -255,7 +255,7 @@ int ipu_dp_enable_channel(struct ipu_dp *dp)
 }
 EXPORT_SYMBOL_GPL(ipu_dp_enable_channel);
 
-void ipu_dp_disable_channel(struct ipu_dp *dp)
+void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync)
 {
 	struct ipu_flow *flow = to_flow(dp);
 	struct ipu_dp_priv *priv = flow->priv;
@@ -275,10 +275,7 @@ void ipu_dp_disable_channel(struct ipu_dp *dp)
 	writel(reg, flow->base + DP_COM_CONF);
 
 	writel(0, flow->base + DP_FG_POS);
-	ipu_srm_dp_sync_update(priv->ipu);
-
-	if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC))
-		ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50);
+	ipu_srm_dp_update(priv->ipu, sync);
 
 	mutex_unlock(&priv->mutex);
 }
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 22e47b68b14a2..285595702ee0f 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -75,6 +75,11 @@ struct ipu_soc;
 #define IPU_INT_CTRL(n)		IPU_CM_REG(0x003C + 4 * (n))
 #define IPU_INT_STAT(n)		IPU_CM_REG(0x0200 + 4 * (n))
 
+/* SRM_PRI2 */
+#define DP_S_SRM_MODE_MASK		(0x3 << 3)
+#define DP_S_SRM_MODE_NOW		(0x3 << 3)
+#define DP_S_SRM_MODE_NEXT_FRAME	(0x1 << 3)
+
 /* FS_PROC_FLOW1 */
 #define FS_PRPENC_ROT_SRC_SEL_MASK	(0xf << 0)
 #define FS_PRPENC_ROT_SRC_SEL_ENC		(0x7 << 0)
@@ -215,7 +220,7 @@ static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
 	writel(value, ipu->idmac_reg + offset);
 }
 
-void ipu_srm_dp_sync_update(struct ipu_soc *ipu);
+void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync);
 
 int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
 int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 53cd07ccaa4ce..899d2b00ad6d4 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -300,7 +300,7 @@ struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow);
 void ipu_dp_put(struct ipu_dp *);
 int ipu_dp_enable(struct ipu_soc *ipu);
 int ipu_dp_enable_channel(struct ipu_dp *dp);
-void ipu_dp_disable_channel(struct ipu_dp *dp);
+void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync);
 void ipu_dp_disable(struct ipu_soc *ipu);
 int ipu_dp_setup_channel(struct ipu_dp *dp,
 		enum ipu_color_space in, enum ipu_color_space out);

[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Phillipp

Thanks for the patch, but did you mean v4.11-rc4 or is it really/only
for v4.11-rc1, if it makes a difference? I was trying to build rc4.

Thanks

On Mon, Apr 3, 2017 at 12:46 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> Hi Dan,
>
> On Sat, 2017-04-01 at 11:50 +0100, Dan MacDonald wrote:
>> No such luck.
>
> I am sorry, I forgot to fix the old patches for modular builds. I have
> added the updated patches as tags v4.9-ipu-dp-plane-fix-2,
> v4.10-ipu-dp-plane-fix-3, and v4.11-ipu-dp-plane-fix. For example:
>
>     git://git.pengutronix.de/git/pza/linux.git tags/v4.11-ipu-dp-plane-fix
>
> The changes are attached as a patch against v4.11-rc1.
>
> regards
> Philipp
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

On Mon, 2017-04-03 at 12:54 +0100, Dan MacDonald wrote:
> Hi Phillipp
> 
> Thanks for the patch, but did you mean v4.11-rc4 or is it really/only
> for v4.11-rc1, if it makes a difference? I was trying to build rc4.

The patch applies on v4.11-rc4 (or -rc5) as well.

regards
Philipp

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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

It took just under 11 hours to build the Arch 4.11 armv7h kernel on my
SL. The good news is that the patch both applied and built OK this
time, and the kernel package installed fine. What didn't seem right is
that boot pauses for a minute or so on these lines:

[ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
using dummy regulator
[ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
found, using dummy regulator


The other concerning lines are:

[ 55.774400] [drm:drm_atomic_helper_commit_cleanup_done] *ERROR*
[CRTC:29:crtc-1] flip_done timed out
[ 66.014419] [drm:drm_atomic_helper_commit_cleanup_done] *ERROR*
[CRTC:29:crtc-1] flip_done timed out

The full boot log is here:

https://gist.github.com/danboid/ee163c489c38a476eea0c8be8f8726a0

Thanks

On Mon, Apr 3, 2017 at 1:06 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> On Mon, 2017-04-03 at 12:54 +0100, Dan MacDonald wrote:
>> Hi Phillipp
>>
>> Thanks for the patch, but did you mean v4.11-rc4 or is it really/only
>> for v4.11-rc1, if it makes a difference? I was trying to build rc4.
>
> The patch applies on v4.11-rc4 (or -rc5) as well.
>
> regards
> Philipp
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

I should've said that 4.10 didn't pause at:

[ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
using dummy regulator
[ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
found, using dummy regulator

If it showed those lines at all and I've never seen those flip_done
errors before.

This revision of the patch has made my SL's display situation worse as
I'm not getting any HDMI output now.

PS I should have another go at getting cross-compiling to work.
Failing that, I'll buy an Odroid or something and build stuff in a
chroot. 11 hour builds are a bit much!

Thanks

On Tue, Apr 4, 2017 at 7:25 PM, Dan MacDonald <allcoms@gmail.com> wrote:
> It took just under 11 hours to build the Arch 4.11 armv7h kernel on my
> SL. The good news is that the patch both applied and built OK this
> time, and the kernel package installed fine. What didn't seem right is
> that boot pauses for a minute or so on these lines:
>
> [ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
> using dummy regulator
> [ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
> found, using dummy regulator
>
>
> The other concerning lines are:
>
> [ 55.774400] [drm:drm_atomic_helper_commit_cleanup_done] *ERROR*
> [CRTC:29:crtc-1] flip_done timed out
> [ 66.014419] [drm:drm_atomic_helper_commit_cleanup_done] *ERROR*
> [CRTC:29:crtc-1] flip_done timed out
>
> The full boot log is here:
>
> https://gist.github.com/danboid/ee163c489c38a476eea0c8be8f8726a0
>
> Thanks
>
> On Mon, Apr 3, 2017 at 1:06 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> On Mon, 2017-04-03 at 12:54 +0100, Dan MacDonald wrote:
>>> Hi Phillipp
>>>
>>> Thanks for the patch, but did you mean v4.11-rc4 or is it really/only
>>> for v4.11-rc1, if it makes a difference? I was trying to build rc4.
>>
>> The patch applies on v4.11-rc4 (or -rc5) as well.
>>
>> regards
>> Philipp
>>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Philipp Zabel]

On Tue, 2017-04-04 at 19:25 +0100, Dan MacDonald wrote:
> It took just under 11 hours to build the Arch 4.11 armv7h kernel on my
> SL. The good news is that the patch both applied and built OK this
> time, and the kernel package installed fine. What didn't seem right is
> that boot pauses for a minute or so on these lines:
> 
> [ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
> using dummy regulator
> [ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
> found, using dummy regulator

I have no idea where that delay comes from, but do you have the Okaya
RS800480T-7x0GP parallel panel or the Hannstar HSD100PXN1 LVDS panel
that are described in imx6qdl-sabrelite.dtsi connected to the SABRE Lite
board? If not, could you try disabling them or the one that you don't
have:

----------8<----------
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 84131794e97b6..c291c2821345f 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -159,7 +159,7 @@
 		brightness-levels = <0 4 8 16 32 64 128 255>;
 		default-brightness-level = <7>;
 		power-supply = <&reg_3p3v>;
-		status = "okay";
+		status = "disabled";
 	};
 
 	backlight_lvds: backlight-lvds {
@@ -168,7 +168,7 @@
 		brightness-levels = <0 4 8 16 32 64 128 255>;
 		default-brightness-level = <7>;
 		power-supply = <&reg_3p3v>;
-		status = "okay";
+		status = "disabled";
 	};
 
 	lcd_display: display@di0 {
@@ -178,7 +178,7 @@
 		interface-pix-fmt = "bgr666";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_j15>;
-		status = "okay";
+		status = "disabled";
 
 		port@0 {
 			reg = <0>;
@@ -200,6 +200,7 @@
 	panel-lcd {
 		compatible = "okaya,rs800480t-7x0gp";
 		backlight = <&backlight_lcd>;
+		status = "disabled";
 
 		port {
 			lcd_panel_in: endpoint {
@@ -211,6 +212,7 @@
 	panel-lvds0 {
 		compatible = "hannstar,hsd100pxn1";
 		backlight = <&backlight_lvds>;
+		status = "disabled";
 
 		port {
 			panel_in: endpoint {
---------->8----------

regards
Philipp


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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Phillipp

My SL was attached to a 27" UHD Acer S277HK Monitor.

I can disable those for the next patch but I get the impression thats
not the only issue here as I've gone from being able to get a picture
(but not the right res) in 4.10 to not getting any HDMI signal at all
with this patch.

Those flip errors have to be another bad sign, right?

Thanks

On Wed, Apr 5, 2017 at 2:51 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> On Tue, 2017-04-04 at 19:25 +0100, Dan MacDonald wrote:
>> It took just under 11 hours to build the Arch 4.11 armv7h kernel on my
>> SL. The good news is that the patch both applied and built OK this
>> time, and the kernel package installed fine. What didn't seem right is
>> that boot pauses for a minute or so on these lines:
>>
>> [ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
>> using dummy regulator
>> [ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
>> found, using dummy regulator
>
> I have no idea where that delay comes from, but do you have the Okaya
> RS800480T-7x0GP parallel panel or the Hannstar HSD100PXN1 LVDS panel
> that are described in imx6qdl-sabrelite.dtsi connected to the SABRE Lite
> board? If not, could you try disabling them or the one that you don't
> have:
>
> ----------8<----------
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> index 84131794e97b6..c291c2821345f 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> @@ -159,7 +159,7 @@
>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>                 default-brightness-level = <7>;
>                 power-supply = <&reg_3p3v>;
> -               status = "okay";
> +               status = "disabled";
>         };
>
>         backlight_lvds: backlight-lvds {
> @@ -168,7 +168,7 @@
>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>                 default-brightness-level = <7>;
>                 power-supply = <&reg_3p3v>;
> -               status = "okay";
> +               status = "disabled";
>         };
>
>         lcd_display: display@di0 {
> @@ -178,7 +178,7 @@
>                 interface-pix-fmt = "bgr666";
>                 pinctrl-names = "default";
>                 pinctrl-0 = <&pinctrl_j15>;
> -               status = "okay";
> +               status = "disabled";
>
>                 port@0 {
>                         reg = <0>;
> @@ -200,6 +200,7 @@
>         panel-lcd {
>                 compatible = "okaya,rs800480t-7x0gp";
>                 backlight = <&backlight_lcd>;
> +               status = "disabled";
>
>                 port {
>                         lcd_panel_in: endpoint {
> @@ -211,6 +212,7 @@
>         panel-lvds0 {
>                 compatible = "hannstar,hsd100pxn1";
>                 backlight = <&backlight_lvds>;
> +               status = "disabled";
>
>                 port {
>                         panel_in: endpoint {
> ---------->8----------
>
> regards
> Philipp
>
>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Philipp

Is there any more info regarding my display probs that you need from me?

Are you working on or do you plan to create another revision of this patch?

I am presuming I'm the only person on this list who owns the Element14
version of the SABRE Lite?

Thanks

On Wed, Apr 5, 2017 at 3:18 PM, Dan MacDonald <allcoms@gmail.com> wrote:
> Hi Phillipp
>
> My SL was attached to a 27" UHD Acer S277HK Monitor.
>
> I can disable those for the next patch but I get the impression thats
> not the only issue here as I've gone from being able to get a picture
> (but not the right res) in 4.10 to not getting any HDMI signal at all
> with this patch.
>
> Those flip errors have to be another bad sign, right?
>
> Thanks
>
> On Wed, Apr 5, 2017 at 2:51 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> On Tue, 2017-04-04 at 19:25 +0100, Dan MacDonald wrote:
>>> It took just under 11 hours to build the Arch 4.11 armv7h kernel on my
>>> SL. The good news is that the patch both applied and built OK this
>>> time, and the kernel package installed fine. What didn't seem right is
>>> that boot pauses for a minute or so on these lines:
>>>
>>> [ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
>>> using dummy regulator
>>> [ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
>>> found, using dummy regulator
>>
>> I have no idea where that delay comes from, but do you have the Okaya
>> RS800480T-7x0GP parallel panel or the Hannstar HSD100PXN1 LVDS panel
>> that are described in imx6qdl-sabrelite.dtsi connected to the SABRE Lite
>> board? If not, could you try disabling them or the one that you don't
>> have:
>>
>> ----------8<----------
>> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>> index 84131794e97b6..c291c2821345f 100644
>> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>> @@ -159,7 +159,7 @@
>>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>>                 default-brightness-level = <7>;
>>                 power-supply = <&reg_3p3v>;
>> -               status = "okay";
>> +               status = "disabled";
>>         };
>>
>>         backlight_lvds: backlight-lvds {
>> @@ -168,7 +168,7 @@
>>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>>                 default-brightness-level = <7>;
>>                 power-supply = <&reg_3p3v>;
>> -               status = "okay";
>> +               status = "disabled";
>>         };
>>
>>         lcd_display: display@di0 {
>> @@ -178,7 +178,7 @@
>>                 interface-pix-fmt = "bgr666";
>>                 pinctrl-names = "default";
>>                 pinctrl-0 = <&pinctrl_j15>;
>> -               status = "okay";
>> +               status = "disabled";
>>
>>                 port@0 {
>>                         reg = <0>;
>> @@ -200,6 +200,7 @@
>>         panel-lcd {
>>                 compatible = "okaya,rs800480t-7x0gp";
>>                 backlight = <&backlight_lcd>;
>> +               status = "disabled";
>>
>>                 port {
>>                         lcd_panel_in: endpoint {
>> @@ -211,6 +212,7 @@
>>         panel-lvds0 {
>>                 compatible = "hannstar,hsd100pxn1";
>>                 backlight = <&backlight_lvds>;
>> +               status = "disabled";
>>
>>                 port {
>>                         panel_in: endpoint {
>> ---------->8----------
>>
>> regards
>> Philipp
>>
>>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Hi Phillip

Do you think there is any hope for us getting the GPU to work on my
Element14 SABRE Lite or is it a lost cause, with it being such a rare
board combined with my lack of of kernel dev skills and limited dev
time for this? I'm sure I'll find a non-GPU dependent use for the SL
if that is the case but its a shame as its the main reason I bought
it, in the hope of finally getting an ARM device with FLOSS drivers.
When I bought it I thought it I was under te mistaken impression it
would be exactly the same board as the Boundary devices SBC of the
same, which is a pretty reasonable chance to take I thought.

It seems to me that the best iMX6/Vivante SBCs that I could
potentially afford are the Wandboard Quad, the CuBox-i2eXw or the
Hummingboard i2eX? Is there anything better choice for someone who
really wants an (e)SATA port?

Does anyone on this list own any of these devices and can you confirm
they work with etnavivdrm and Armada?

Thanks

On Mon, Apr 10, 2017 at 6:54 PM, Dan MacDonald <allcoms@gmail.com> wrote:
> Hi Philipp
>
> Is there any more info regarding my display probs that you need from me?
>
> Are you working on or do you plan to create another revision of this patch?
>
> I am presuming I'm the only person on this list who owns the Element14
> version of the SABRE Lite?
>
> Thanks
>
> On Wed, Apr 5, 2017 at 3:18 PM, Dan MacDonald <allcoms@gmail.com> wrote:
>> Hi Phillipp
>>
>> My SL was attached to a 27" UHD Acer S277HK Monitor.
>>
>> I can disable those for the next patch but I get the impression thats
>> not the only issue here as I've gone from being able to get a picture
>> (but not the right res) in 4.10 to not getting any HDMI signal at all
>> with this patch.
>>
>> Those flip errors have to be another bad sign, right?
>>
>> Thanks
>>
>> On Wed, Apr 5, 2017 at 2:51 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>>> On Tue, 2017-04-04 at 19:25 +0100, Dan MacDonald wrote:
>>>> It took just under 11 hours to build the Arch 4.11 armv7h kernel on my
>>>> SL. The good news is that the patch both applied and built OK this
>>>> time, and the kernel package installed fine. What didn't seem right is
>>>> that boot pauses for a minute or so on these lines:
>>>>
>>>> [ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
>>>> using dummy regulator
>>>> [ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
>>>> found, using dummy regulator
>>>
>>> I have no idea where that delay comes from, but do you have the Okaya
>>> RS800480T-7x0GP parallel panel or the Hannstar HSD100PXN1 LVDS panel
>>> that are described in imx6qdl-sabrelite.dtsi connected to the SABRE Lite
>>> board? If not, could you try disabling them or the one that you don't
>>> have:
>>>
>>> ----------8<----------
>>> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>>> index 84131794e97b6..c291c2821345f 100644
>>> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>>> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>>> @@ -159,7 +159,7 @@
>>>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>>>                 default-brightness-level = <7>;
>>>                 power-supply = <&reg_3p3v>;
>>> -               status = "okay";
>>> +               status = "disabled";
>>>         };
>>>
>>>         backlight_lvds: backlight-lvds {
>>> @@ -168,7 +168,7 @@
>>>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>>>                 default-brightness-level = <7>;
>>>                 power-supply = <&reg_3p3v>;
>>> -               status = "okay";
>>> +               status = "disabled";
>>>         };
>>>
>>>         lcd_display: display@di0 {
>>> @@ -178,7 +178,7 @@
>>>                 interface-pix-fmt = "bgr666";
>>>                 pinctrl-names = "default";
>>>                 pinctrl-0 = <&pinctrl_j15>;
>>> -               status = "okay";
>>> +               status = "disabled";
>>>
>>>                 port@0 {
>>>                         reg = <0>;
>>> @@ -200,6 +200,7 @@
>>>         panel-lcd {
>>>                 compatible = "okaya,rs800480t-7x0gp";
>>>                 backlight = <&backlight_lcd>;
>>> +               status = "disabled";
>>>
>>>                 port {
>>>                         lcd_panel_in: endpoint {
>>> @@ -211,6 +212,7 @@
>>>         panel-lvds0 {
>>>                 compatible = "hannstar,hsd100pxn1";
>>>                 backlight = <&backlight_lvds>;
>>> +               status = "disabled";
>>>
>>>                 port {
>>>                         panel_in: endpoint {
>>> ---------->8----------
>>>
>>> regards
>>> Philipp
>>>
>>>
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Re: [PATCH 0/4] Fix DP busy wait and defer disabling overlay plane

[Dan MacDonald]

Having another quick search now had revealed the Hummingboard Edge,
which has 2GB RAM and M.2, although I've not found a UK reseller yet.

That seems like it could be another good choice?

On Mon, Apr 24, 2017 at 10:18 AM, Dan MacDonald <allcoms@gmail.com> wrote:
> Hi Phillip
>
> Do you think there is any hope for us getting the GPU to work on my
> Element14 SABRE Lite or is it a lost cause, with it being such a rare
> board combined with my lack of of kernel dev skills and limited dev
> time for this? I'm sure I'll find a non-GPU dependent use for the SL
> if that is the case but its a shame as its the main reason I bought
> it, in the hope of finally getting an ARM device with FLOSS drivers.
> When I bought it I thought it I was under te mistaken impression it
> would be exactly the same board as the Boundary devices SBC of the
> same, which is a pretty reasonable chance to take I thought.
>
> It seems to me that the best iMX6/Vivante SBCs that I could
> potentially afford are the Wandboard Quad, the CuBox-i2eXw or the
> Hummingboard i2eX? Is there anything better choice for someone who
> really wants an (e)SATA port?
>
> Does anyone on this list own any of these devices and can you confirm
> they work with etnavivdrm and Armada?
>
> Thanks
>
> On Mon, Apr 10, 2017 at 6:54 PM, Dan MacDonald <allcoms@gmail.com> wrote:
>> Hi Philipp
>>
>> Is there any more info regarding my display probs that you need from me?
>>
>> Are you working on or do you plan to create another revision of this patch?
>>
>> I am presuming I'm the only person on this list who owns the Element14
>> version of the SABRE Lite?
>>
>> Thanks
>>
>> On Wed, Apr 5, 2017 at 3:18 PM, Dan MacDonald <allcoms@gmail.com> wrote:
>>> Hi Phillipp
>>>
>>> My SL was attached to a 27" UHD Acer S277HK Monitor.
>>>
>>> I can disable those for the next patch but I get the impression thats
>>> not the only issue here as I've gone from being able to get a picture
>>> (but not the right res) in 4.10 to not getting any HDMI signal at all
>>> with this patch.
>>>
>>> Those flip errors have to be another bad sign, right?
>>>
>>> Thanks
>>>
>>> On Wed, Apr 5, 2017 at 2:51 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>>>> On Tue, 2017-04-04 at 19:25 +0100, Dan MacDonald wrote:
>>>>> It took just under 11 hours to build the Arch 4.11 armv7h kernel on my
>>>>> SL. The good news is that the patch both applied and built OK this
>>>>> time, and the kernel package installed fine. What didn't seem right is
>>>>> that boot pauses for a minute or so on these lines:
>>>>>
>>>>> [ 4.458572] panel-simple panel-lcd: panel-lcd supply power not found,
>>>>> using dummy regulator
>>>>> [ 4.467736] panel-simple panel-lvds0: panel-lvds0 supply power not
>>>>> found, using dummy regulator
>>>>
>>>> I have no idea where that delay comes from, but do you have the Okaya
>>>> RS800480T-7x0GP parallel panel or the Hannstar HSD100PXN1 LVDS panel
>>>> that are described in imx6qdl-sabrelite.dtsi connected to the SABRE Lite
>>>> board? If not, could you try disabling them or the one that you don't
>>>> have:
>>>>
>>>> ----------8<----------
>>>> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>>>> index 84131794e97b6..c291c2821345f 100644
>>>> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>>>> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>>>> @@ -159,7 +159,7 @@
>>>>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>>>>                 default-brightness-level = <7>;
>>>>                 power-supply = <&reg_3p3v>;
>>>> -               status = "okay";
>>>> +               status = "disabled";
>>>>         };
>>>>
>>>>         backlight_lvds: backlight-lvds {
>>>> @@ -168,7 +168,7 @@
>>>>                 brightness-levels = <0 4 8 16 32 64 128 255>;
>>>>                 default-brightness-level = <7>;
>>>>                 power-supply = <&reg_3p3v>;
>>>> -               status = "okay";
>>>> +               status = "disabled";
>>>>         };
>>>>
>>>>         lcd_display: display@di0 {
>>>> @@ -178,7 +178,7 @@
>>>>                 interface-pix-fmt = "bgr666";
>>>>                 pinctrl-names = "default";
>>>>                 pinctrl-0 = <&pinctrl_j15>;
>>>> -               status = "okay";
>>>> +               status = "disabled";
>>>>
>>>>                 port@0 {
>>>>                         reg = <0>;
>>>> @@ -200,6 +200,7 @@
>>>>         panel-lcd {
>>>>                 compatible = "okaya,rs800480t-7x0gp";
>>>>                 backlight = <&backlight_lcd>;
>>>> +               status = "disabled";
>>>>
>>>>                 port {
>>>>                         lcd_panel_in: endpoint {
>>>> @@ -211,6 +212,7 @@
>>>>         panel-lvds0 {
>>>>                 compatible = "hannstar,hsd100pxn1";
>>>>                 backlight = <&backlight_lvds>;
>>>> +               status = "disabled";
>>>>
>>>>                 port {
>>>>                         panel_in: endpoint {
>>>> ---------->8----------
>>>>
>>>> regards
>>>> Philipp
>>>>
>>>>
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