* [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch
@ 2022-05-11 2:38 Wanpeng Li
2022-05-11 2:38 ` [PATCH v2 2/2] x86/kvm: handle the failure of __pv_cpu_mask allocation Wanpeng Li
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Wanpeng Li @ 2022-05-11 2:38 UTC (permalink / raw)
To: linux-kernel, kvm
Cc: Paolo Bonzini, Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li,
Jim Mattson, Joerg Roedel
From: Wanpeng Li <wanpengli@tencent.com>
The timer is disarmed when switching between TSC deadline and other modes,
however, the pending timer is still in-flight, so let's accurately set
everything to a disarmed state, this patch does it by clearing pending
when canceling the timer.
Fixes: 4427593258 (KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch)
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
---
v1 -> v2:
* clear pending in cancel_apic_timer
arch/x86/kvm/lapic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 66b0eb0bda94..6268880c8eed 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1548,6 +1548,7 @@ static void cancel_apic_timer(struct kvm_lapic *apic)
if (apic->lapic_timer.hv_timer_in_use)
cancel_hv_timer(apic);
preempt_enable();
+ atomic_set(&apic->lapic_timer.pending, 0);
}
static void apic_update_lvtt(struct kvm_lapic *apic)
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] x86/kvm: handle the failure of __pv_cpu_mask allocation
2022-05-11 2:38 [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Wanpeng Li
@ 2022-05-11 2:38 ` Wanpeng Li
2022-05-11 13:53 ` [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Paolo Bonzini
2022-05-19 8:50 ` Wanpeng Li
2 siblings, 0 replies; 5+ messages in thread
From: Wanpeng Li @ 2022-05-11 2:38 UTC (permalink / raw)
To: linux-kernel, kvm
Cc: Paolo Bonzini, Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li,
Jim Mattson, Joerg Roedel
From: Wanpeng Li <wanpengli@tencent.com>
Fallback to native ipis/tlb flush if fails to allocate __pv_cpu_mask.
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
---
v1 -> v2:
* move orig_apic under CONFIG_SMP
arch/x86/kernel/kvm.c | 26 ++++++++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 8b1c45c9cda8..ce03121d038b 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -457,6 +457,7 @@ static int kvm_cpu_online(unsigned int cpu)
#ifdef CONFIG_SMP
+static struct apic orig_apic;
static DEFINE_PER_CPU(cpumask_var_t, __pv_cpu_mask);
static bool pv_tlb_flush_supported(void)
@@ -543,6 +544,11 @@ static void __send_ipi_mask(const struct cpumask *mask, int vector)
static void kvm_send_ipi_mask(const struct cpumask *mask, int vector)
{
+ if (unlikely(!this_cpu_cpumask_var_ptr(__pv_cpu_mask))) {
+ orig_apic.send_IPI_mask(mask, vector);
+ return;
+ }
+
__send_ipi_mask(mask, vector);
}
@@ -552,6 +558,11 @@ static void kvm_send_ipi_mask_allbutself(const struct cpumask *mask, int vector)
struct cpumask *new_mask = this_cpu_cpumask_var_ptr(__pv_cpu_mask);
const struct cpumask *local_mask;
+ if (unlikely(!new_mask)) {
+ orig_apic.send_IPI_mask_allbutself(mask, vector);
+ return;
+ }
+
cpumask_copy(new_mask, mask);
cpumask_clear_cpu(this_cpu, new_mask);
local_mask = new_mask;
@@ -612,6 +623,7 @@ late_initcall(setup_efi_kvm_sev_migration);
*/
static void kvm_setup_pv_ipi(void)
{
+ orig_apic = *apic;
apic->send_IPI_mask = kvm_send_ipi_mask;
apic->send_IPI_mask_allbutself = kvm_send_ipi_mask_allbutself;
pr_info("setup PV IPIs\n");
@@ -640,6 +652,11 @@ static void kvm_flush_tlb_multi(const struct cpumask *cpumask,
struct kvm_steal_time *src;
struct cpumask *flushmask = this_cpu_cpumask_var_ptr(__pv_cpu_mask);
+ if (unlikely(!flushmask)) {
+ native_flush_tlb_multi(cpumask, info);
+ return;
+ }
+
cpumask_copy(flushmask, cpumask);
/*
* We have to call flush only on online vCPUs. And
@@ -672,11 +689,16 @@ static __init int kvm_alloc_cpumask(void)
if (pv_tlb_flush_supported() || pv_ipi_supported())
for_each_possible_cpu(cpu) {
- zalloc_cpumask_var_node(per_cpu_ptr(&__pv_cpu_mask, cpu),
- GFP_KERNEL, cpu_to_node(cpu));
+ if (!zalloc_cpumask_var_node(&per_cpu(__pv_cpu_mask, cpu),
+ GFP_KERNEL, cpu_to_node(cpu)))
+ goto err_out;
}
return 0;
+err_out:
+ for_each_possible_cpu(cpu)
+ free_cpumask_var(per_cpu(__pv_cpu_mask, cpu));
+ return -ENOMEM;
}
arch_initcall(kvm_alloc_cpumask);
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch
2022-05-11 2:38 [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Wanpeng Li
2022-05-11 2:38 ` [PATCH v2 2/2] x86/kvm: handle the failure of __pv_cpu_mask allocation Wanpeng Li
@ 2022-05-11 13:53 ` Paolo Bonzini
2022-05-12 8:23 ` Wanpeng Li
2022-05-19 8:50 ` Wanpeng Li
2 siblings, 1 reply; 5+ messages in thread
From: Paolo Bonzini @ 2022-05-11 13:53 UTC (permalink / raw)
To: Wanpeng Li, linux-kernel, kvm
Cc: Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li, Jim Mattson,
Joerg Roedel
On 5/11/22 04:38, Wanpeng Li wrote:
>
> Fixes: 4427593258 (KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch)
> Signed-off-by: Wanpeng Li<wanpengli@tencent.com>
> ---
Please write a testcase for this.
Paolo
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch
2022-05-11 13:53 ` [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Paolo Bonzini
@ 2022-05-12 8:23 ` Wanpeng Li
0 siblings, 0 replies; 5+ messages in thread
From: Wanpeng Li @ 2022-05-12 8:23 UTC (permalink / raw)
To: Paolo Bonzini
Cc: LKML, kvm, Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li,
Jim Mattson, Joerg Roedel
On Wed, 11 May 2022 at 21:54, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> On 5/11/22 04:38, Wanpeng Li wrote:
> >
> > Fixes: 4427593258 (KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch)
> > Signed-off-by: Wanpeng Li<wanpengli@tencent.com>
> > ---
>
> Please write a testcase for this.
Something like this, however, it is not easy to catch the pending
timer in this scenario.
diff --git a/x86/apic.c b/x86/apic.c
index 23508ad..108c1c8 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -22,7 +22,7 @@ static void test_lapic_existence(void)
#define TSC_DEADLINE_TIMER_VECTOR 0xef
#define BROADCAST_VECTOR 0xcf
-static int tdt_count;
+static int volatile tdt_count;
static void tsc_deadline_timer_isr(isr_regs_t *regs)
{
@@ -672,6 +672,18 @@ static void test_apic_change_mode(void)
/* now tmcct == 0 and tmict != 0 */
apic_change_mode(APIC_LVT_TIMER_PERIODIC);
report(!apic_read(APIC_TMCCT), "TMCCT should stay at zero");
+
+ handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
+ irq_enable();
+
+ apic_write(APIC_LVTT, APIC_LVT_TIMER_ONESHOT |
+ APIC_LVT_TIMER_VECTOR);
+ /* Divider == 1 */
+ apic_write(APIC_TDCR, 0x0000000b);
+
+ apic_write(APIC_TMICT, 0x999999);
+ enable_tsc_deadline_timer();
+ while(tdt_count == 1);
}
#define KVM_HC_SEND_IPI 10
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch
2022-05-11 2:38 [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Wanpeng Li
2022-05-11 2:38 ` [PATCH v2 2/2] x86/kvm: handle the failure of __pv_cpu_mask allocation Wanpeng Li
2022-05-11 13:53 ` [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Paolo Bonzini
@ 2022-05-19 8:50 ` Wanpeng Li
2 siblings, 0 replies; 5+ messages in thread
From: Wanpeng Li @ 2022-05-19 8:50 UTC (permalink / raw)
To: LKML, kvm
Cc: Paolo Bonzini, Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li,
Jim Mattson, Joerg Roedel
ping,
On Wed, 11 May 2022 at 10:39, Wanpeng Li <kernellwp@gmail.com> wrote:
>
> From: Wanpeng Li <wanpengli@tencent.com>
>
> The timer is disarmed when switching between TSC deadline and other modes,
> however, the pending timer is still in-flight, so let's accurately set
> everything to a disarmed state, this patch does it by clearing pending
> when canceling the timer.
>
> Fixes: 4427593258 (KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch)
> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> ---
> v1 -> v2:
> * clear pending in cancel_apic_timer
>
> arch/x86/kvm/lapic.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 66b0eb0bda94..6268880c8eed 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1548,6 +1548,7 @@ static void cancel_apic_timer(struct kvm_lapic *apic)
> if (apic->lapic_timer.hv_timer_in_use)
> cancel_hv_timer(apic);
> preempt_enable();
> + atomic_set(&apic->lapic_timer.pending, 0);
> }
>
> static void apic_update_lvtt(struct kvm_lapic *apic)
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-05-19 8:51 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2022-05-11 2:38 [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Wanpeng Li
2022-05-11 2:38 ` [PATCH v2 2/2] x86/kvm: handle the failure of __pv_cpu_mask allocation Wanpeng Li
2022-05-11 13:53 ` [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Paolo Bonzini
2022-05-12 8:23 ` Wanpeng Li
2022-05-19 8:50 ` Wanpeng Li
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