[PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[PrasannaKumar Muralidharan]

This patch series adds support of pseudo random number generator found
in Ingenic's JZ4780 and X1000 SoC.

Create cgublock node which has CGU and RNG node as its children. The
cgublock node uses "simple-bus" compatible which helps in exposing CGU
and RNG nodes without changing CGU driver. Add 'syscon' compatible in
CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via
syscon interface to access the RNG registers. CGU driver is not
modified in this patch set as registers used by CGU driver and this
driver are different.

PrasannaKumar Muralidharan (4):
  crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
  crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
  crypto: jz4780-rng: Add RNG node to jz4780.dtsi
  crypto: jz4780-rng: Enable PRNG support in CI20 defconfig

 .../devicetree/bindings/rng/ingenic,jz4780-rng.txt |  21 +++
 MAINTAINERS                                        |   7 +
 arch/mips/boot/dts/ingenic/jz4780.dtsi             |  25 ++-
 arch/mips/configs/ci20_defconfig                   |   5 +
 drivers/crypto/Kconfig                             |  19 ++
 drivers/crypto/Makefile                            |   1 +
 drivers/crypto/jz4780-rng.c                        | 193 +++++++++++++++++++++
 7 files changed, 266 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
 create mode 100644 drivers/crypto/jz4780-rng.c

-- 
2.10.0

[PATCH v3 1/4] crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation

[PrasannaKumar Muralidharan]

Add devicetree bindings for hardware pseudo random number generator
present in Ingenic JZ4780 SoC.

Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
---
Changes in v3:
* Create a cgublock node with "simple-bus" compatible
* Make CGU and RNG node as children of cgublock node.

Changes in v2:                                                                   
* Add "syscon" in CGU node's compatible section                                  
* Make RNG child node of CGU.                                                    

 .../devicetree/bindings/rng/ingenic,jz4780-rng.txt  | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt

diff --git a/Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt b/Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
new file mode 100644
index 0000000..765df9c
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
@@ -0,0 +1,21 @@
+Ingenic jz4780 RNG driver
+
+Required properties:
+- compatible : Should be "ingenic,jz4780-rng"
+
+Example:
+
+cgublock {
+	compatible = "simple-bus";
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	reg = <0x10000000 0x100>;
+	ranges;
+
+	rng: rng@d8 {
+		compatible = "ingenic,jz4780-rng";
+		reg = <0x100000d8 0x8>;
+	};
+};
-- 
2.10.0

[PATCH v3 2/4] crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver

[PrasannaKumar Muralidharan]

JZ4780 SoC pseudo random number generator driver using crypto framework.

Adding a delay before reading RNG data and disabling RNG after reading
data was suggested by Jeffery Walton.

Tested-by: Mathieu Malaterre <malat@debian.org>
Suggested-by: Jeffrey Walton <noloader@gmail.com>
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
---
Changes in v3:
* Add seeding support
* Reduce delay

Changes in v2:                                                                      
* Fixed buffer overflow in generate function pointed out in Stephan's review        
* Fold patch that had only MAINTAINERS file change with this patch                  
* Removed unnecessary comment in code                                               

 MAINTAINERS                 |   7 ++
 drivers/crypto/Kconfig      |  19 +++++
 drivers/crypto/Makefile     |   1 +
 drivers/crypto/jz4780-rng.c | 193 ++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 220 insertions(+)
 create mode 100644 drivers/crypto/jz4780-rng.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 2093060..d2341a7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6783,6 +6783,13 @@ L:	linux-mtd@lists.infradead.org
 S:	Maintained
 F:	drivers/mtd/nand/jz4780_*
 
+INGENIC JZ4780 PRNG DRIVER
+M:	PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
+L:	linux-crypto@vger.kernel.org
+S:	Maintained
+F:	drivers/crypto/jz4780-rng.c
+F:	Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
+
 INOTIFY
 M:	Jan Kara <jack@suse.cz>
 R:	Amir Goldstein <amir73il@gmail.com>
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index fe33c19..f3ac1cd 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -613,6 +613,25 @@ config CRYPTO_DEV_IMGTEC_HASH
 	  hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
 	  hashing algorithms.
 
+config CRYPTO_DEV_JZ4780_RNG
+	tristate "JZ4780 HW pseudo random number generator support"
+	depends on MACH_JZ4780 || COMPILE_TEST
+	depends on HAS_IOMEM
+	select CRYPTO_RNG
+	select REGMAP
+	select SYSCON
+	select MFD_SYSCON
+	---help---
+	  This driver provides kernel-side support through the
+	  cryptographic API for the pseudo random number generator
+	  hardware found in ingenic JZ4780 and X1000 SoC. MIPS
+	  Creator CI20 uses JZ4780 SoC.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called jz4780-rng.
+
+	  If unsure, say Y.
+
 config CRYPTO_DEV_SUN4I_SS
 	tristate "Support for Allwinner Security System cryptographic accelerator"
 	depends on ARCH_SUNXI && !64BIT
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 808432b..a09d9f4 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o
 obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
 obj-$(CONFIG_CRYPTO_DEV_IMGTEC_HASH) += img-hash.o
 obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
+obj-$(CONFIG_CRYPTO_DEV_JZ4780_RNG) += jz4780-rng.o
 obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o
 obj-$(CONFIG_CRYPTO_DEV_MARVELL_CESA) += marvell/
 obj-$(CONFIG_CRYPTO_DEV_MEDIATEK) += mediatek/
diff --git a/drivers/crypto/jz4780-rng.c b/drivers/crypto/jz4780-rng.c
new file mode 100644
index 0000000..918ba94
--- /dev/null
+++ b/drivers/crypto/jz4780-rng.c
@@ -0,0 +1,193 @@
+/*
+ * jz4780-rng.c - Random Number Generator driver for the jz4780
+ *
+ * Copyright (c) 2017 PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/crypto.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#include <crypto/internal/rng.h>
+
+#define REG_RNG_CTRL	0xD8
+#define REG_RNG_DATA	0xDC
+
+/* Context for crypto */
+struct jz4780_rng_ctx {
+	struct jz4780_rng *rng;
+};
+
+/* Device associated memory */
+struct jz4780_rng {
+	struct device *dev;
+	struct regmap *regmap;
+	u32 seed;
+};
+
+static struct jz4780_rng *jz4780_rng;
+
+static int jz4780_rng_readl(struct jz4780_rng *rng, u32 offset)
+{
+	u32 val = 0;
+	int ret;
+
+	ret = regmap_read(rng->regmap, offset, &val);
+	if (!ret)
+		return val;
+
+	return ret;
+}
+
+static int jz4780_rng_writel(struct jz4780_rng *rng, u32 val, u32 offset)
+{
+	return regmap_write(rng->regmap, offset, val);
+}
+
+static int jz4780_rng_seed(struct crypto_rng *tfm, const u8 *seed,
+			   unsigned int slen)
+{
+	struct jz4780_rng_ctx *ctx = crypto_rng_ctx(tfm);
+	struct jz4780_rng *rng = ctx->rng;
+
+	memcpy((void *)&rng->seed, seed, slen);
+
+	return 0;
+}
+
+static int jz4780_rng_generate(struct crypto_rng *tfm,
+			       const u8 *src, unsigned int slen,
+			       u8 *dst, unsigned int dlen)
+{
+	struct jz4780_rng_ctx *ctx = crypto_rng_ctx(tfm);
+	struct jz4780_rng *rng = ctx->rng;
+	u32 data;
+
+	/*
+	 * A delay is required so that the current RNG data is not bit shifted
+	 * version of previous RNG data which could happen if random data is
+	 * read continuously from this device.
+	 */
+	jz4780_rng_writel(rng, 1, REG_RNG_CTRL);
+
+	/* Write seed */
+	jz4780_rng_writel(rng, rng->seed, REG_RNG_DATA);
+
+	while (dlen >= 4) {
+		udelay(2);
+		data = jz4780_rng_readl(rng, REG_RNG_DATA);
+		memcpy((void *)dst, (void *)&data, 4);
+		dlen -= 4;
+		dst += 4;
+	};
+
+	if (dlen > 0) {
+		udelay(2);
+		data = jz4780_rng_readl(rng, REG_RNG_DATA);
+		memcpy((void *)dst, (void *)&data, dlen);
+	}
+
+	udelay(2);
+	/* Update the seed */
+	data = jz4780_rng_readl(rng, REG_RNG_DATA);
+	rng->seed = data;
+
+	jz4780_rng_writel(rng, 0, REG_RNG_CTRL);
+
+	return 0;
+}
+
+static int jz4780_rng_kcapi_init(struct crypto_tfm *tfm)
+{
+	struct jz4780_rng_ctx *ctx = crypto_tfm_ctx(tfm);
+
+	ctx->rng = jz4780_rng;
+
+	return 0;
+}
+
+static struct rng_alg jz4780_rng_alg = {
+	.generate		= jz4780_rng_generate,
+	.seed			= jz4780_rng_seed,
+	.seedsize		= 4,
+	.base			= {
+		.cra_name		= "stdrng",
+		.cra_driver_name	= "jz4780_rng",
+		.cra_priority		= 100,
+		.cra_ctxsize		= sizeof(struct jz4780_rng_ctx),
+		.cra_module		= THIS_MODULE,
+		.cra_init		= jz4780_rng_kcapi_init,
+	}
+};
+
+static int jz4780_rng_probe(struct platform_device *pdev)
+{
+	struct jz4780_rng *rng;
+	struct resource *res;
+	int ret;
+
+	rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
+	if (!rng)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	rng->regmap = syscon_node_to_regmap(pdev->dev.parent->of_node);
+	if (IS_ERR(rng->regmap))
+		return PTR_ERR(rng->regmap);
+
+	jz4780_rng = rng;
+
+	ret = crypto_register_rng(&jz4780_rng_alg);
+	if (ret) {
+		dev_err(&pdev->dev,
+			"Couldn't register rng crypto alg: %d\n", ret);
+		jz4780_rng = NULL;
+	}
+
+	return ret;
+}
+
+static int jz4780_rng_remove(struct platform_device *pdev)
+{
+	crypto_unregister_rng(&jz4780_rng_alg);
+
+	jz4780_rng = NULL;
+
+	return 0;
+}
+
+static const struct of_device_id jz4780_rng_dt_match[] = {
+	{
+		.compatible = "ingenic,jz4780-rng",
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, jz4780_rng_dt_match);
+
+static struct platform_driver jz4780_rng_driver = {
+	.driver		= {
+		.name	= "jz4780-rng",
+		.of_match_table = jz4780_rng_dt_match,
+	},
+	.probe		= jz4780_rng_probe,
+	.remove		= jz4780_rng_remove,
+};
+
+module_platform_driver(jz4780_rng_driver);
+
+MODULE_DESCRIPTION("Ingenic JZ4780 H/W Pseudo Random Number Generator driver");
+MODULE_AUTHOR("PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>");
+MODULE_LICENSE("GPL");
-- 
2.10.0

[PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[PrasannaKumar Muralidharan]

Add RNG node to jz4780 dtsi. This driver uses registers that are part of
the register set used by Ingenic CGU driver. Use regmap in RNG driver to
access its register. Create 'simple-bus' node, make CGU and RNG node as
child of it so that both the nodes are visible without changing CGU
driver code.

Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
---
Changes in v3:
* Create a cgublock node with "simple-bus" compatible
* Make CGU and RNG node as children of cgublock node.

Changes in v2:                                                                   
* Add "syscon" in CGU node's compatible section                                  
* Make RNG child node of CGU.                                                    

 arch/mips/boot/dts/ingenic/jz4780.dtsi | 25 ++++++++++++++++++++-----
 1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 4853ef6..5953b97 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -34,14 +34,29 @@
 		clock-frequency = <32768>;
 	};
 
-	cgu: jz4780-cgu@10000000 {
-		compatible = "ingenic,jz4780-cgu";
+	cgublock {
+		compatible = "simple-bus";
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
 		reg = <0x10000000 0x100>;
+		ranges;
 
-		clocks = <&ext>, <&rtc>;
-		clock-names = "ext", "rtc";
+		cgu: jz4780-cgu@0 {
+			compatible = "ingenic,jz4780-cgu";
+			reg = <0x10000000 0x100>;
 
-		#clock-cells = <1>;
+			clocks = <&ext>, <&rtc>;
+			clock-names = "ext", "rtc";
+
+			#clock-cells = <1>;
+		};
+
+		rng: rng@d8 {
+			compatible = "ingenic,jz4780-rng";
+			reg = <0x100000d8 0x8>;
+		};
 	};
 
 	pinctrl: pin-controller@10010000 {
-- 
2.10.0

[PATCH v3 4/4] crypto: jz4780-rng: Enable PRNG support in CI20 defconfig

[PrasannaKumar Muralidharan]

Enable PRNG driver support in MIPS Creator CI20 default config.

Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
---
No changes in v3

No changes in v2

 arch/mips/configs/ci20_defconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index b42cfa7..9f48f2c 100644
--- a/arch/mips/configs/ci20_defconfig
+++ b/arch/mips/configs/ci20_defconfig
@@ -88,6 +88,11 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=5
 CONFIG_SERIAL_8250_INGENIC=y
 CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_HW_RANDOM is not set
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_USER_API=y
+CONFIG_CRYPTO_USER_API_RNG=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_JZ4780_RNG=y
 CONFIG_I2C=y
 CONFIG_I2C_JZ4780=y
 CONFIG_GPIO_SYSFS=y
-- 
2.10.0

Re: [PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[Herbert Xu]

On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
> This patch series adds support of pseudo random number generator found
> in Ingenic's JZ4780 and X1000 SoC.
> 
> Create cgublock node which has CGU and RNG node as its children. The
> cgublock node uses "simple-bus" compatible which helps in exposing CGU
> and RNG nodes without changing CGU driver. Add 'syscon' compatible in
> CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via
> syscon interface to access the RNG registers. CGU driver is not
> modified in this patch set as registers used by CGU driver and this
> driver are different.
> 
> PrasannaKumar Muralidharan (4):
>   crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
>   crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
>   crypto: jz4780-rng: Add RNG node to jz4780.dtsi
>   crypto: jz4780-rng: Enable PRNG support in CI20 defconfig

Please indicate which patches are intended to go through the crypto
trees.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[PrasannaKumar Muralidharan]

Hi Herbert,

On 12 October 2017 at 20:00, Herbert Xu <herbert@gondor.apana.org.au> wrote:
> On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
>> This patch series adds support of pseudo random number generator found
>> in Ingenic's JZ4780 and X1000 SoC.
>>
>> Create cgublock node which has CGU and RNG node as its children. The
>> cgublock node uses "simple-bus" compatible which helps in exposing CGU
>> and RNG nodes without changing CGU driver. Add 'syscon' compatible in
>> CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via
>> syscon interface to access the RNG registers. CGU driver is not
>> modified in this patch set as registers used by CGU driver and this
>> driver are different.
>>
>> PrasannaKumar Muralidharan (4):
>>   crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
>>   crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
>>   crypto: jz4780-rng: Add RNG node to jz4780.dtsi
>>   crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
>
> Please indicate which patches are intended to go through the crypto
> trees.

>From https://patchwork.linux-mips.org/patch/17162/ I expect the same.
Either all patches go via crypto tree or via mips tree.
The dtsi changes is not yet acked by MIPS / JZ4780 maintainer. Let's
wait for it.

Thanks,
PrasannaKumar

Re: [PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[PrasannaKumar Muralidharan]

Hi Herbert,

On 12 October 2017 at 20:00, Herbert Xu <herbert@gondor.apana.org.au> wrote:
> On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
>> This patch series adds support of pseudo random number generator found
>> in Ingenic's JZ4780 and X1000 SoC.
>>
>> Create cgublock node which has CGU and RNG node as its children. The
>> cgublock node uses "simple-bus" compatible which helps in exposing CGU
>> and RNG nodes without changing CGU driver. Add 'syscon' compatible in
>> CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via
>> syscon interface to access the RNG registers. CGU driver is not
>> modified in this patch set as registers used by CGU driver and this
>> driver are different.
>>
>> PrasannaKumar Muralidharan (4):
>>   crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
>>   crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
>>   crypto: jz4780-rng: Add RNG node to jz4780.dtsi
>>   crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
>
> Please indicate which patches are intended to go through the crypto
> trees.

From https://patchwork.linux-mips.org/patch/17162/ I expect the same.
Either all patches go via crypto tree or via mips tree.
The dtsi changes is not yet acked by MIPS / JZ4780 maintainer. Let's
wait for it.

Thanks,
PrasannaKumar

Re: [PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[PrasannaKumar Muralidharan]

Hi Herbert,

On 12 October 2017 at 20:00, Herbert Xu <herbert@gondor.apana.org.au> wrote:
> On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
>> This patch series adds support of pseudo random number generator found
>> in Ingenic's JZ4780 and X1000 SoC.
>>
>> Create cgublock node which has CGU and RNG node as its children. The
>> cgublock node uses "simple-bus" compatible which helps in exposing CGU
>> and RNG nodes without changing CGU driver. Add 'syscon' compatible in
>> CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via
>> syscon interface to access the RNG registers. CGU driver is not
>> modified in this patch set as registers used by CGU driver and this
>> driver are different.
>>
>> PrasannaKumar Muralidharan (4):
>>   crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
>>   crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
>>   crypto: jz4780-rng: Add RNG node to jz4780.dtsi
>>   crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
>
> Please indicate which patches are intended to go through the crypto
> trees.

Re: [PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[PrasannaKumar Muralidharan]

Hi Ralf,

On 12 October 2017 at 22:59, PrasannaKumar Muralidharan
<prasannatsmkumar@gmail.com> wrote:
> Hi Herbert,
>
> On 12 October 2017 at 20:00, Herbert Xu <herbert@gondor.apana.org.au> wrote:
>> On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
>>> This patch series adds support of pseudo random number generator found
>>> in Ingenic's JZ4780 and X1000 SoC.
>>>
>>> Create cgublock node which has CGU and RNG node as its children. The
>>> cgublock node uses "simple-bus" compatible which helps in exposing CGU
>>> and RNG nodes without changing CGU driver. Add 'syscon' compatible in
>>> CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via
>>> syscon interface to access the RNG registers. CGU driver is not
>>> modified in this patch set as registers used by CGU driver and this
>>> driver are different.
>>>
>>> PrasannaKumar Muralidharan (4):
>>>   crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
>>>   crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
>>>   crypto: jz4780-rng: Add RNG node to jz4780.dtsi
>>>   crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
>>
>> Please indicate which patches are intended to go through the crypto
>> trees.
>
> From https://patchwork.linux-mips.org/patch/17162/ I expect the same.
> Either all patches go via crypto tree or via mips tree.
> The dtsi changes is not yet acked by MIPS / JZ4780 maintainer. Let's
> wait for it.
>
> Thanks,
> PrasannaKumar

Should I do anything more for this series?

Thanks,
PrasannaKumar

Re: [PATCH v3 0/4] crypto: Add driver for JZ4780 PRNG

[PrasannaKumar Muralidharan]

Hi Ralf,

On 12 October 2017 at 22:59, PrasannaKumar Muralidharan
<prasannatsmkumar@gmail.com> wrote:
> Hi Herbert,
>
> On 12 October 2017 at 20:00, Herbert Xu <herbert@gondor.apana.org.au> wrote:
>> On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
>>> This patch series adds support of pseudo random number generator found
>>> in Ingenic's JZ4780 and X1000 SoC.
>>>
>>> Create cgublock node which has CGU and RNG node as its children. The
>>> cgublock node uses "simple-bus" compatible which helps in exposing CGU
>>> and RNG nodes without changing CGU driver. Add 'syscon' compatible in
>>> CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via
>>> syscon interface to access the RNG registers. CGU driver is not
>>> modified in this patch set as registers used by CGU driver and this
>>> driver are different.
>>>
>>> PrasannaKumar Muralidharan (4):
>>>   crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
>>>   crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
>>>   crypto: jz4780-rng: Add RNG node to jz4780.dtsi
>>>   crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
>>
>> Please indicate which patches are intended to go through the crypto
>> trees.
>
> From https://patchwork.linux-mips.org/patch/17162/ I expect the same.
> Either all patches go via crypto tree or via mips tree.
> The dtsi changes is not yet acked by MIPS / JZ4780 maintainer. Let's
> wait for it.
>
> Thanks,
> PrasannaKumar

Should I do anything more for this series?

Thanks,
PrasannaKumar

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[James Hogan]

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On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
> access its register. Create 'simple-bus' node, make CGU and RNG node as
> child of it so that both the nodes are visible without changing CGU
> driver code.
> 
> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>

Better late than never:
Acked-by: James Hogan <jhogan@kernel.org>

(I presume its okay for the reg ranges to overlap, ISTR that being an
issue a few years ago, but maybe thats fixed now).

Cheers
James

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Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[Rob Herring]

On Tue, Mar 6, 2018 at 3:32 AM, James Hogan <jhogan@kernel.org> wrote:
> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>> child of it so that both the nodes are visible without changing CGU
>> driver code.

The goal should be to avoid changing the DT (because the h/w hasn't
changed), not avoid changing a driver.

>>
>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
>
> Better late than never:
> Acked-by: James Hogan <jhogan@kernel.org>
>
> (I presume its okay for the reg ranges to overlap, ISTR that being an
> issue a few years ago, but maybe thats fixed now).

No, that should be avoided. It does work because we have existing
cases that have to be supported.

>
> Cheers
> James

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[Rob Herring]

On Tue, Mar 6, 2018 at 3:32 AM, James Hogan <jhogan@kernel.org> wrote:
> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>> child of it so that both the nodes are visible without changing CGU
>> driver code.

The goal should be to avoid changing the DT (because the h/w hasn't
changed), not avoid changing a driver.

>>
>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
>
> Better late than never:
> Acked-by: James Hogan <jhogan@kernel.org>
>
> (I presume its okay for the reg ranges to overlap, ISTR that being an
> issue a few years ago, but maybe thats fixed now).

No, that should be avoided. It does work because we have existing
cases that have to be supported.

>
> Cheers
> James

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi,

[Paul Cercueil]

Le 2018-03-06 10:32, James Hogan a écrit :
> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan 
> wrote:
>> Add RNG node to jz4780 dtsi. This driver uses registers that are part 
>> of
>> the register set used by Ingenic CGU driver. Use regmap in RNG driver 
>> to
>> access its register. Create 'simple-bus' node, make CGU and RNG node 
>> as
>> child of it so that both the nodes are visible without changing CGU
>> driver code.
>> 
>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
> 
> Better late than never:
> Acked-by: James Hogan <jhogan@kernel.org>
> 
> (I presume its okay for the reg ranges to overlap, ISTR that being an
> issue a few years ago, but maybe thats fixed now).
> 
> Cheers
> James

What bothers me is that the CGU code has not been modified to use 
regmap, so the
registers area is actually mapped twice (once in the CGU driver, once 
with regmap).

Besides, regmap would be useful if the RNG registers were actually 
located in the
middle of the register area used by the CGU driver, which is not the 
case here.
The CGU block does have some registers after the RNG ones on the X1000 
SoC, but
I don't think they will ever be used (and if they are it won't be by the 
CGU driver).

Regards,
-Paul

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[PrasannaKumar Muralidharan]

Hi Paul,

On 7 March 2018 at 04:31, Paul Cercueil <paul@crapouillou.net> wrote:
> Le 2018-03-06 10:32, James Hogan a écrit :
>>
>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan
>> wrote:
>>>
>>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>>> child of it so that both the nodes are visible without changing CGU
>>> driver code.
>>>
>>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
>>
>>
>> Better late than never:
>> Acked-by: James Hogan <jhogan@kernel.org>
>>
>> (I presume its okay for the reg ranges to overlap, ISTR that being an
>> issue a few years ago, but maybe thats fixed now).
>>
>> Cheers
>> James
>
>
> What bothers me is that the CGU code has not been modified to use regmap, so
> the
> registers area is actually mapped twice (once in the CGU driver, once with
> regmap).

One of my previous versions changed CGU code to use regmap. I got a
review comment saying that is not required
(https://patchwork.kernel.org/patch/9906889/). The points in the
comment were valid so I reverted the change. Please have a look at the
discussion.

> Besides, regmap would be useful if the RNG registers were actually located
> in the
> middle of the register area used by the CGU driver, which is not the case
> here.
> The CGU block does have some registers after the RNG ones on the X1000 SoC,
> but
> I don't think they will ever be used (and if they are it won't be by the CGU
> driver).
>
> Regards,
> -Paul

Ingenic M200 SoC's CGU has clock and power related registers after the
RNG registers. Paul Burton suggested using regmap to expose registers
to CGU and RNG drivers
(https://patchwork.linux-mips.org/patch/14094/).

Regards,
PrasannaKumar

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[PrasannaKumar Muralidharan]

Hi Paul,

On 7 March 2018 at 04:31, Paul Cercueil <paul@crapouillou.net> wrote:
> Le 2018-03-06 10:32, James Hogan a écrit :
>>
>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan
>> wrote:
>>>
>>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>>> child of it so that both the nodes are visible without changing CGU
>>> driver code.
>>>
>>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
>>
>>
>> Better late than never:
>> Acked-by: James Hogan <jhogan@kernel.org>
>>
>> (I presume its okay for the reg ranges to overlap, ISTR that being an
>> issue a few years ago, but maybe thats fixed now).
>>
>> Cheers
>> James
>
>
> What bothers me is that the CGU code has not been modified to use regmap, so
> the
> registers area is actually mapped twice (once in the CGU driver, once with
> regmap).

One of my previous versions changed CGU code to use regmap. I got a
review comment saying that is not required
(https://patchwork.kernel.org/patch/9906889/). The points in the
comment were valid so I reverted the change. Please have a look at the
discussion.

> Besides, regmap would be useful if the RNG registers were actually located
> in the
> middle of the register area used by the CGU driver, which is not the case
> here.
> The CGU block does have some registers after the RNG ones on the X1000 SoC,
> but
> I don't think they will ever be used (and if they are it won't be by the CGU
> driver).
>
> Regards,
> -Paul

Ingenic M200 SoC's CGU has clock and power related registers after the
RNG registers. Paul Burton suggested using regmap to expose registers
to CGU and RNG drivers
(https://patchwork.linux-mips.org/patch/14094/).

Regards,
PrasannaKumar

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[PrasannaKumar Muralidharan]

Hi Rob,

On 6 March 2018 at 19:25, Rob Herring <robh+dt@kernel.org> wrote:
> On Tue, Mar 6, 2018 at 3:32 AM, James Hogan <jhogan@kernel.org> wrote:
>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>>> child of it so that both the nodes are visible without changing CGU
>>> driver code.
>
> The goal should be to avoid changing the DT (because the h/w hasn't
> changed), not avoid changing a driver.

Please have a look at the discussion happened at
https://patchwork.linux-mips.org/patch/14094/. Looks like there is a
difference in though process between you and mips folks. I am not an
expert in DT so please suggest me the correct way to go about this.

>>>
>>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
>>
>> Better late than never:
>> Acked-by: James Hogan <jhogan@kernel.org>
>>
>> (I presume its okay for the reg ranges to overlap, ISTR that being an
>> issue a few years ago, but maybe thats fixed now).
>
> No, that should be avoided. It does work because we have existing
> cases that have to be supported.

I am sorry but I require guidance here. Do you have any suggestion on
how this should be.

>>
>> Cheers
>> James

Thanks and regards,
PrasannaKumar

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[PrasannaKumar Muralidharan]

Hi Rob,

On 6 March 2018 at 19:25, Rob Herring <robh+dt@kernel.org> wrote:
> On Tue, Mar 6, 2018 at 3:32 AM, James Hogan <jhogan@kernel.org> wrote:
>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>>> child of it so that both the nodes are visible without changing CGU
>>> driver code.
>
> The goal should be to avoid changing the DT (because the h/w hasn't
> changed), not avoid changing a driver.

Please have a look at the discussion happened at
https://patchwork.linux-mips.org/patch/14094/. Looks like there is a
difference in though process between you and mips folks. I am not an
expert in DT so please suggest me the correct way to go about this.

>>>
>>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
>>
>> Better late than never:
>> Acked-by: James Hogan <jhogan@kernel.org>
>>
>> (I presume its okay for the reg ranges to overlap, ISTR that being an
>> issue a few years ago, but maybe thats fixed now).
>
> No, that should be avoided. It does work because we have existing
> cases that have to be supported.

I am sorry but I require guidance here. Do you have any suggestion on
how this should be.

>>
>> Cheers
>> James

Thanks and regards,
PrasannaKumar

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi,

[Paul Cercueil]

Hi PrasannaKumar,

Le 2018-03-07 15:51, PrasannaKumar Muralidharan a écrit :
> Hi Paul,
> 
> On 7 March 2018 at 04:31, Paul Cercueil <paul@crapouillou.net> wrote:
>> Le 2018-03-06 10:32, James Hogan a écrit :
>>> 
>>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan
>>> wrote:
>>>> 
>>>> Add RNG node to jz4780 dtsi. This driver uses registers that are 
>>>> part of
>>>> the register set used by Ingenic CGU driver. Use regmap in RNG 
>>>> driver to
>>>> access its register. Create 'simple-bus' node, make CGU and RNG node 
>>>> as
>>>> child of it so that both the nodes are visible without changing CGU
>>>> driver code.
>>>> 
>>>> Signed-off-by: PrasannaKumar Muralidharan 
>>>> <prasannatsmkumar@gmail.com>
>>> 
>>> 
>>> Better late than never:
>>> Acked-by: James Hogan <jhogan@kernel.org>
>>> 
>>> (I presume its okay for the reg ranges to overlap, ISTR that being an
>>> issue a few years ago, but maybe thats fixed now).
>>> 
>>> Cheers
>>> James
>> 
>> 
>> What bothers me is that the CGU code has not been modified to use 
>> regmap, so
>> the
>> registers area is actually mapped twice (once in the CGU driver, once 
>> with
>> regmap).
> 
> One of my previous versions changed CGU code to use regmap. I got a
> review comment saying that is not required
> (https://patchwork.kernel.org/patch/9906889/). The points in the
> comment were valid so I reverted the change. Please have a look at the
> discussion.

I don't know, the point of regmap is for when a register area is shared. 
It
does not make sense to me to have one driver use regmap and not the 
other one.

>> Besides, regmap would be useful if the RNG registers were actually 
>> located
>> in the
>> middle of the register area used by the CGU driver, which is not the 
>> case
>> here.
>> The CGU block does have some registers after the RNG ones on the X1000 
>> SoC,
>> but
>> I don't think they will ever be used (and if they are it won't be by 
>> the CGU
>> driver).
>> 
>> Regards,
>> -Paul
> 
> Ingenic M200 SoC's CGU has clock and power related registers after the
> RNG registers. Paul Burton suggested using regmap to expose registers
> to CGU and RNG drivers
> (https://patchwork.linux-mips.org/patch/14094/).

Where can I find the M200 programming manual? The M200's CGU might have 
some
registers located after the RNG ones, but that does not mean that they 
will
be used by the clocks driver.

Thanks,
-Paul

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi,

[Paul Cercueil]

Hi PrasannaKumar,

Le 2018-03-07 15:51, PrasannaKumar Muralidharan a écrit :
> Hi Paul,
> 
> On 7 March 2018 at 04:31, Paul Cercueil <paul@crapouillou.net> wrote:
>> Le 2018-03-06 10:32, James Hogan a écrit :
>>> 
>>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan
>>> wrote:
>>>> 
>>>> Add RNG node to jz4780 dtsi. This driver uses registers that are 
>>>> part of
>>>> the register set used by Ingenic CGU driver. Use regmap in RNG 
>>>> driver to
>>>> access its register. Create 'simple-bus' node, make CGU and RNG node 
>>>> as
>>>> child of it so that both the nodes are visible without changing CGU
>>>> driver code.
>>>> 
>>>> Signed-off-by: PrasannaKumar Muralidharan 
>>>> <prasannatsmkumar@gmail.com>
>>> 
>>> 
>>> Better late than never:
>>> Acked-by: James Hogan <jhogan@kernel.org>
>>> 
>>> (I presume its okay for the reg ranges to overlap, ISTR that being an
>>> issue a few years ago, but maybe thats fixed now).
>>> 
>>> Cheers
>>> James
>> 
>> 
>> What bothers me is that the CGU code has not been modified to use 
>> regmap, so
>> the
>> registers area is actually mapped twice (once in the CGU driver, once 
>> with
>> regmap).
> 
> One of my previous versions changed CGU code to use regmap. I got a
> review comment saying that is not required
> (https://patchwork.kernel.org/patch/9906889/). The points in the
> comment were valid so I reverted the change. Please have a look at the
> discussion.

I don't know, the point of regmap is for when a register area is shared. 
It
does not make sense to me to have one driver use regmap and not the 
other one.

>> Besides, regmap would be useful if the RNG registers were actually 
>> located
>> in the
>> middle of the register area used by the CGU driver, which is not the 
>> case
>> here.
>> The CGU block does have some registers after the RNG ones on the X1000 
>> SoC,
>> but
>> I don't think they will ever be used (and if they are it won't be by 
>> the CGU
>> driver).
>> 
>> Regards,
>> -Paul
> 
> Ingenic M200 SoC's CGU has clock and power related registers after the
> RNG registers. Paul Burton suggested using regmap to expose registers
> to CGU and RNG drivers
> (https://patchwork.linux-mips.org/patch/14094/).

Where can I find the M200 programming manual? The M200's CGU might have 
some
registers located after the RNG ones, but that does not mean that they 
will
be used by the clocks driver.

Thanks,
-Paul

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[Rob Herring]

On Wed, Mar 7, 2018 at 8:54 AM, PrasannaKumar Muralidharan
<prasannatsmkumar@gmail.com> wrote:
> Hi Rob,
>
> On 6 March 2018 at 19:25, Rob Herring <robh+dt@kernel.org> wrote:
>> On Tue, Mar 6, 2018 at 3:32 AM, James Hogan <jhogan@kernel.org> wrote:
>>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>>>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>>>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>>>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>>>> child of it so that both the nodes are visible without changing CGU
>>>> driver code.
>>
>> The goal should be to avoid changing the DT (because the h/w hasn't
>> changed), not avoid changing a driver.
>
> Please have a look at the discussion happened at
> https://patchwork.linux-mips.org/patch/14094/. Looks like there is a
> difference in though process between you and mips folks. I am not an
> expert in DT so please suggest me the correct way to go about this.

Those comments are correct too.

Simply, there is no reason you have to add a rng node to add an RNG
driver. The driver that probes the existing node can register both
clocks and as an RNG provider.

Rob

Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi

[Rob Herring]

On Wed, Mar 7, 2018 at 8:54 AM, PrasannaKumar Muralidharan
<prasannatsmkumar@gmail.com> wrote:
> Hi Rob,
>
> On 6 March 2018 at 19:25, Rob Herring <robh+dt@kernel.org> wrote:
>> On Tue, Mar 6, 2018 at 3:32 AM, James Hogan <jhogan@kernel.org> wrote:
>>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>>>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>>>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>>>> access its register. Create 'simple-bus' node, make CGU and RNG node as
>>>> child of it so that both the nodes are visible without changing CGU
>>>> driver code.
>>
>> The goal should be to avoid changing the DT (because the h/w hasn't
>> changed), not avoid changing a driver.
>
> Please have a look at the discussion happened at
> https://patchwork.linux-mips.org/patch/14094/. Looks like there is a
> difference in though process between you and mips folks. I am not an
> expert in DT so please suggest me the correct way to go about this.

Those comments are correct too.

Simply, there is no reason you have to add a rng node to add an RNG
driver. The driver that probes the existing node can register both
clocks and as an RNG provider.

Rob