* [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState.
@ 2022-08-19 7:11 Tommy Wu
2022-08-22 2:53 ` Jim Shu
2022-08-22 3:33 ` Alistair Francis
0 siblings, 2 replies; 5+ messages in thread
From: Tommy Wu @ 2022-08-19 7:11 UTC (permalink / raw)
To: qemu-devel, qemu-riscv
Cc: Tommy Wu, Alistair Francis, Bin Meng, Palmer Dabbelt
Fix the type of parent_obj of SiFiveEState from 'SysBusDevice'
to 'MachineState'. Because the parent of SiFiveEState is 'MachineState'.
Signed-off-by: Tommy Wu <tommy.wu@sifive.com>
---
include/hw/riscv/sifive_e.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 83604da805..24359f9fe5 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -41,7 +41,7 @@ typedef struct SiFiveESoCState {
typedef struct SiFiveEState {
/*< private >*/
- SysBusDevice parent_obj;
+ MachineState parent_obj;
/*< public >*/
SiFiveESoCState soc;
--
2.27.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState.
2022-08-19 7:11 [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState Tommy Wu
@ 2022-08-22 2:53 ` Jim Shu
2022-08-22 3:33 ` Alistair Francis
1 sibling, 0 replies; 5+ messages in thread
From: Jim Shu @ 2022-08-22 2:53 UTC (permalink / raw)
To: Tommy Wu
Cc: qemu-devel, qemu-riscv, Alistair Francis, Bin Meng, Palmer Dabbelt
Reviewed-by: Jim Shu <jim.shu@sifive.com>
On Fri, Aug 19, 2022 at 3:11 PM Tommy Wu <tommy.wu@sifive.com> wrote:
>
> Fix the type of parent_obj of SiFiveEState from 'SysBusDevice'
> to 'MachineState'. Because the parent of SiFiveEState is 'MachineState'.
>
> Signed-off-by: Tommy Wu <tommy.wu@sifive.com>
> ---
> include/hw/riscv/sifive_e.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> index 83604da805..24359f9fe5 100644
> --- a/include/hw/riscv/sifive_e.h
> +++ b/include/hw/riscv/sifive_e.h
> @@ -41,7 +41,7 @@ typedef struct SiFiveESoCState {
>
> typedef struct SiFiveEState {
> /*< private >*/
> - SysBusDevice parent_obj;
> + MachineState parent_obj;
>
> /*< public >*/
> SiFiveESoCState soc;
> --
> 2.27.0
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState.
2022-08-19 7:11 [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState Tommy Wu
2022-08-22 2:53 ` Jim Shu
@ 2022-08-22 3:33 ` Alistair Francis
2022-09-22 8:12 ` Tommy Wu
1 sibling, 1 reply; 5+ messages in thread
From: Alistair Francis @ 2022-08-22 3:33 UTC (permalink / raw)
To: Tommy Wu
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V,
Alistair Francis, Bin Meng, Palmer Dabbelt
On Fri, Aug 19, 2022 at 5:12 PM Tommy Wu <tommy.wu@sifive.com> wrote:
>
> Fix the type of parent_obj of SiFiveEState from 'SysBusDevice'
> to 'MachineState'. Because the parent of SiFiveEState is 'MachineState'.
>
> Signed-off-by: Tommy Wu <tommy.wu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/riscv/sifive_e.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> index 83604da805..24359f9fe5 100644
> --- a/include/hw/riscv/sifive_e.h
> +++ b/include/hw/riscv/sifive_e.h
> @@ -41,7 +41,7 @@ typedef struct SiFiveESoCState {
>
> typedef struct SiFiveEState {
> /*< private >*/
> - SysBusDevice parent_obj;
> + MachineState parent_obj;
>
> /*< public >*/
> SiFiveESoCState soc;
> --
> 2.27.0
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState.
2022-08-22 3:33 ` Alistair Francis
@ 2022-09-22 8:12 ` Tommy Wu
2022-09-23 5:17 ` Alistair Francis
0 siblings, 1 reply; 5+ messages in thread
From: Tommy Wu @ 2022-09-22 8:12 UTC (permalink / raw)
To: Alistair Francis
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V,
Alistair Francis, Bin Meng, Palmer Dabbelt
[-- Attachment #1: Type: text/plain, Size: 1299 bytes --]
To the maintainers:
Thank Alistair and Jim for the review.
Bernhard Beschow sent the same patch :
https://lists.gnu.org/archive/html/qemu-riscv/2022-09/msg00126.html
It seems that this simple patch is helpful. Could you help us to merge this
patch?
Thanks for your great help!
Regards,
Tommy Wu
On Mon, Aug 22, 2022 at 11:33 AM Alistair Francis <alistair23@gmail.com>
wrote:
> On Fri, Aug 19, 2022 at 5:12 PM Tommy Wu <tommy.wu@sifive.com> wrote:
> >
> > Fix the type of parent_obj of SiFiveEState from 'SysBusDevice'
> > to 'MachineState'. Because the parent of SiFiveEState is 'MachineState'.
> >
> > Signed-off-by: Tommy Wu <tommy.wu@sifive.com>
>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
>
> Alistair
>
> > ---
> > include/hw/riscv/sifive_e.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> > index 83604da805..24359f9fe5 100644
> > --- a/include/hw/riscv/sifive_e.h
> > +++ b/include/hw/riscv/sifive_e.h
> > @@ -41,7 +41,7 @@ typedef struct SiFiveESoCState {
> >
> > typedef struct SiFiveEState {
> > /*< private >*/
> > - SysBusDevice parent_obj;
> > + MachineState parent_obj;
> >
> > /*< public >*/
> > SiFiveESoCState soc;
> > --
> > 2.27.0
> >
> >
>
[-- Attachment #2: Type: text/html, Size: 2210 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState.
2022-09-22 8:12 ` Tommy Wu
@ 2022-09-23 5:17 ` Alistair Francis
0 siblings, 0 replies; 5+ messages in thread
From: Alistair Francis @ 2022-09-23 5:17 UTC (permalink / raw)
To: Tommy Wu
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V,
Alistair Francis, Bin Meng, Palmer Dabbelt
On Thu, Sep 22, 2022 at 6:12 PM Tommy Wu <tommy.wu@sifive.com> wrote:
>
> To the maintainers:
>
> Thank Alistair and Jim for the review.
> Bernhard Beschow sent the same patch : https://lists.gnu.org/archive/html/qemu-riscv/2022-09/msg00126.html
>
> It seems that this simple patch is helpful. Could you help us to merge this patch?
> Thanks for your great help!
Hey Tommy,
Sorry for the mixup!
This patch fell through the cracks after I had reviewed it. I just
applied the other patch as I had already run it through my testing
before I saw this.
This is my fault, I'm sorry your patch didn't get applied.
For next time, feel free to ping your patch if it hasn't had any
movement in a week. That helps ensure I don't miss anything
Alistair
>
> Regards,
> Tommy Wu
>
>
>
> On Mon, Aug 22, 2022 at 11:33 AM Alistair Francis <alistair23@gmail.com> wrote:
>>
>> On Fri, Aug 19, 2022 at 5:12 PM Tommy Wu <tommy.wu@sifive.com> wrote:
>> >
>> > Fix the type of parent_obj of SiFiveEState from 'SysBusDevice'
>> > to 'MachineState'. Because the parent of SiFiveEState is 'MachineState'.
>> >
>> > Signed-off-by: Tommy Wu <tommy.wu@sifive.com>
>>
>> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
>>
>> Alistair
>>
>> > ---
>> > include/hw/riscv/sifive_e.h | 2 +-
>> > 1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
>> > index 83604da805..24359f9fe5 100644
>> > --- a/include/hw/riscv/sifive_e.h
>> > +++ b/include/hw/riscv/sifive_e.h
>> > @@ -41,7 +41,7 @@ typedef struct SiFiveESoCState {
>> >
>> > typedef struct SiFiveEState {
>> > /*< private >*/
>> > - SysBusDevice parent_obj;
>> > + MachineState parent_obj;
>> >
>> > /*< public >*/
>> > SiFiveESoCState soc;
>> > --
>> > 2.27.0
>> >
>> >
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-09-23 5:19 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2022-08-19 7:11 [PATCH] include/hw/riscv/sifive_e.h: Fix the type of parent_obj of SiFiveEState Tommy Wu
2022-08-22 2:53 ` Jim Shu
2022-08-22 3:33 ` Alistair Francis
2022-09-22 8:12 ` Tommy Wu
2022-09-23 5:17 ` Alistair Francis
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