Question about riscv-qemu trace

Question about riscv-qemu trace

[Zahra Azad]

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Hi all,

I want to use riscv-qemu to get a trace of the guest executed instructions
of a vectorized program. I'm using the following command:
qemu-riscv64 -cpu rv64,x-v=true,x-k=true,vlen=256,elen=64,vext_spec=v1.0 -D
logfile.log -d in_asm,cpu,fpu program

Although the program is executed correctly without throwing any error, in
the trace log all the vector instructions are shown as illegal
instructions. Any ideas what is going wrong?

I built riscv toolchain and llvm from the main branch (following sifive
instructions <https://github.com/sifive/riscv-llvm>), and riscv qemu is
built from https://github.com/sifive/qemu/tree/v5.2.0-rvv-rvb-zfh.

Thank you!

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Re: Question about riscv-qemu trace

[Frank Chang]

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Zahra Azad <zazad@bu.edu> 於 2021年9月12日 週日 下午12:33寫道：

> Hi all,
>
> I want to use riscv-qemu to get a trace of the guest executed instructions
> of a vectorized program. I'm using the following command:
> qemu-riscv64 -cpu rv64,x-v=true,x-k=true,vlen=256,elen=64,vext_spec=v1.0
> -D logfile.log -d in_asm,cpu,fpu program
>
> Although the program is executed correctly without throwing any error, in
> the trace log all the vector instructions are shown as illegal
> instructions. Any ideas what is going wrong?
>
> I built riscv toolchain and llvm from the main branch (following sifive
> instructions <https://github.com/sifive/riscv-llvm>), and riscv qemu is
> built from https://github.com/sifive/qemu/tree/v5.2.0-rvv-rvb-zfh.
>
> Thank you!
>

Hi Zahra,

We are missing RVV related instructions disassembler in QEMU.
The illegal instruction messages for vector instructions in the trace log
are just false alarms for now.
We need to update disas/riscv.c to decode RVV instructions properly.

Regards,
Frank Chang

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Re: Question about riscv-qemu trace

[Zahra Azad]

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I see, thanks Frank!

On Sun, Sep 12, 2021 at 8:54 AM Frank Chang <frank.chang@sifive.com> wrote:

> Zahra Azad <zazad@bu.edu> 於 2021年9月12日 週日 下午12:33寫道：
>
>> Hi all,
>>
>> I want to use riscv-qemu to get a trace of the guest executed
>> instructions of a vectorized program. I'm using the following command:
>> qemu-riscv64 -cpu rv64,x-v=true,x-k=true,vlen=256,elen=64,vext_spec=v1.0
>> -D logfile.log -d in_asm,cpu,fpu program
>>
>> Although the program is executed correctly without throwing any error, in
>> the trace log all the vector instructions are shown as illegal
>> instructions. Any ideas what is going wrong?
>>
>> I built riscv toolchain and llvm from the main branch (following sifive
>> instructions <https://github.com/sifive/riscv-llvm>), and riscv qemu is
>> built from https://github.com/sifive/qemu/tree/v5.2.0-rvv-rvb-zfh.
>>
>> Thank you!
>>
>
> Hi Zahra,
>
> We are missing RVV related instructions disassembler in QEMU.
> The illegal instruction messages for vector instructions in the trace log
> are just false alarms for now.
> We need to update disas/riscv.c to decode RVV instructions properly.
>
> Regards,
> Frank Chang
>

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