* [PATCH v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware
@ 2021-09-12 12:43 frank.chang
2021-09-12 13:05 ` Frank Chang
0 siblings, 1 reply; 3+ messages in thread
From: frank.chang @ 2021-09-12 12:43 UTC (permalink / raw)
To: qemu-devel, qemu-riscv; +Cc: Frank Chang
From: Frank Chang <frank.chang@sifive.com>
Current QEMU PDMA doesn't align with real PDMA's behavior. This would
result in Linux dmatest failed. This patchest aligns with real PDMA's
behavior we tested on the real board. The golden results are performed
in U-Boot on the Unmatched board with PDMA supported.
Changelog:
v2:
* Add comment to describe document errors.
Frank Chang (3):
hw/dma: sifive_pdma: reset Next* registers when Control.claim is set
hw/dma: sifive_pdma: claim bit must be set before DMA transactions
hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer
Green Wan (1):
hw/dma: sifive_pdma: allow non-multiple transaction size transactions
hw/dma/sifive_pdma.c | 54 +++++++++++++++++++++++++++++++++++---------
1 file changed, 43 insertions(+), 11 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware
2021-09-12 12:43 [PATCH v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware frank.chang
@ 2021-09-12 13:05 ` Frank Chang
0 siblings, 0 replies; 3+ messages in thread
From: Frank Chang @ 2021-09-12 13:05 UTC (permalink / raw)
To: Frank Chang; +Cc: open list:RISC-V, qemu-devel@nongnu.org Developers
[-- Attachment #1: Type: text/plain, Size: 1124 bytes --]
<frank.chang@sifive.com> 於 2021年9月12日 週日 下午8:46寫道:
> From: Frank Chang <frank.chang@sifive.com>
>
> Current QEMU PDMA doesn't align with real PDMA's behavior. This would
> result in Linux dmatest failed. This patchest aligns with real PDMA's
> behavior we tested on the real board. The golden results are performed
> in U-Boot on the Unmatched board with PDMA supported.
>
> Changelog:
>
> v2:
> * Add comment to describe document errors.
>
> Frank Chang (3):
> hw/dma: sifive_pdma: reset Next* registers when Control.claim is set
> hw/dma: sifive_pdma: claim bit must be set before DMA transactions
> hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer
>
> Green Wan (1):
> hw/dma: sifive_pdma: allow non-multiple transaction size transactions
>
> hw/dma/sifive_pdma.c | 54 +++++++++++++++++++++++++++++++++++---------
> 1 file changed, 43 insertions(+), 11 deletions(-)
>
> --
> 2.25.1
>
>
>
I made a mistake while sending the patchset.
Please ignore this series, I will resend it again.
Sorry for the confusion.
Regards,
Frank Chang
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware
@ 2021-09-12 13:05 ` Frank Chang
0 siblings, 0 replies; 3+ messages in thread
From: Frank Chang @ 2021-09-12 13:05 UTC (permalink / raw)
To: Frank Chang; +Cc: qemu-devel@nongnu.org Developers, open list:RISC-V
[-- Attachment #1: Type: text/plain, Size: 1124 bytes --]
<frank.chang@sifive.com> 於 2021年9月12日 週日 下午8:46寫道:
> From: Frank Chang <frank.chang@sifive.com>
>
> Current QEMU PDMA doesn't align with real PDMA's behavior. This would
> result in Linux dmatest failed. This patchest aligns with real PDMA's
> behavior we tested on the real board. The golden results are performed
> in U-Boot on the Unmatched board with PDMA supported.
>
> Changelog:
>
> v2:
> * Add comment to describe document errors.
>
> Frank Chang (3):
> hw/dma: sifive_pdma: reset Next* registers when Control.claim is set
> hw/dma: sifive_pdma: claim bit must be set before DMA transactions
> hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer
>
> Green Wan (1):
> hw/dma: sifive_pdma: allow non-multiple transaction size transactions
>
> hw/dma/sifive_pdma.c | 54 +++++++++++++++++++++++++++++++++++---------
> 1 file changed, 43 insertions(+), 11 deletions(-)
>
> --
> 2.25.1
>
>
>
I made a mistake while sending the patchset.
Please ignore this series, I will resend it again.
Sorry for the confusion.
Regards,
Frank Chang
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^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-09-12 13:07 UTC | newest]
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2021-09-12 12:43 [PATCH v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware frank.chang
2021-09-12 13:05 ` Frank Chang
2021-09-12 13:05 ` Frank Chang
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