From: Jason Ekstrand <jason@jlekstrand.net> To: Matthew Brost <matthew.brost@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com>, Intel GFX <intel-gfx@lists.freedesktop.org>, Maling list - DRI developers <dri-devel@lists.freedesktop.org> Subject: Re: [Intel-gfx] [PATCH 3/9] drm/i915: Add i915_sched_engine_reset_on_empty function Date: Fri, 4 Jun 2021 13:31:42 -0500 [thread overview] Message-ID: <CAOFGe95CkXy03G5oDEHBLHB2XNbLc2K_Uxx-rdW=Cg9RsKrYWA@mail.gmail.com> (raw) In-Reply-To: <20210603212722.59719-4-matthew.brost@intel.com> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost <matthew.brost@intel.com> wrote: > > Rather than touching schedule state in the generic PM code, reset the > priolist allocation when empty in the submission code. Add a wrapper > function to do this and update the backends to call it in the correct > place. Seems reasonable, I think. I'm by no means an expert but Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> anyway. My one suggestion would be to tweak the commit message to talk about the functional change rather than the helper. Something like drm/i915: Reset sched_engine.no_priolist immediately after dequeue Typically patches which say "add a helper function" don't come with a non-trivial functional change. --Jason > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 -- > drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 1 + > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 ++ > drivers/gpu/drm/i915/i915_scheduler.h | 7 +++++++ > 4 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > index b6a00dd72808..1f07ac4e0672 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > @@ -280,8 +280,6 @@ static int __engine_park(struct intel_wakeref *wf) > if (engine->park) > engine->park(engine); > > - engine->sched_engine->no_priolist = false; > - > /* While gt calls i915_vma_parked(), we have to break the lock cycle */ > intel_gt_pm_put_async(engine->gt); > return 0; > diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > index 2326a73af6d3..609753b5401a 100644 > --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > @@ -1553,6 +1553,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) > * interrupt for secondary ports). > */ > sched_engine->queue_priority_hint = queue_prio(sched_engine); > + i915_sched_engine_reset_on_empty(sched_engine); > spin_unlock(&engine->active.lock); > > /* > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index 5d00f2e3c1de..f4a6fbfaf82e 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -263,6 +263,8 @@ static void guc_submission_tasklet(struct tasklet_struct *t) > > __guc_dequeue(engine); > > + i915_sched_engine_reset_on_empty(engine->sched_engine); > + > spin_unlock_irqrestore(&engine->active.lock, flags); > } > > diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h > index 5bec7b3b8456..713c38c99de9 100644 > --- a/drivers/gpu/drm/i915/i915_scheduler.h > +++ b/drivers/gpu/drm/i915/i915_scheduler.h > @@ -72,6 +72,13 @@ i915_sched_engine_is_empty(struct i915_sched_engine *sched_engine) > return RB_EMPTY_ROOT(&sched_engine->queue.rb_root); > } > > +static inline void > +i915_sched_engine_reset_on_empty(struct i915_sched_engine *sched_engine) > +{ > + if (i915_sched_engine_is_empty(sched_engine)) > + sched_engine->no_priolist = false; > +} > + > void i915_request_show_with_schedule(struct drm_printer *m, > const struct i915_request *rq, > const char *prefix, > -- > 2.28.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Jason Ekstrand <jason@jlekstrand.net> To: Matthew Brost <matthew.brost@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com>, Intel GFX <intel-gfx@lists.freedesktop.org>, Maling list - DRI developers <dri-devel@lists.freedesktop.org> Subject: Re: [Intel-gfx] [PATCH 3/9] drm/i915: Add i915_sched_engine_reset_on_empty function Date: Fri, 4 Jun 2021 13:31:42 -0500 [thread overview] Message-ID: <CAOFGe95CkXy03G5oDEHBLHB2XNbLc2K_Uxx-rdW=Cg9RsKrYWA@mail.gmail.com> (raw) In-Reply-To: <20210603212722.59719-4-matthew.brost@intel.com> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost <matthew.brost@intel.com> wrote: > > Rather than touching schedule state in the generic PM code, reset the > priolist allocation when empty in the submission code. Add a wrapper > function to do this and update the backends to call it in the correct > place. Seems reasonable, I think. I'm by no means an expert but Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> anyway. My one suggestion would be to tweak the commit message to talk about the functional change rather than the helper. Something like drm/i915: Reset sched_engine.no_priolist immediately after dequeue Typically patches which say "add a helper function" don't come with a non-trivial functional change. --Jason > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 -- > drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 1 + > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 ++ > drivers/gpu/drm/i915/i915_scheduler.h | 7 +++++++ > 4 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > index b6a00dd72808..1f07ac4e0672 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > @@ -280,8 +280,6 @@ static int __engine_park(struct intel_wakeref *wf) > if (engine->park) > engine->park(engine); > > - engine->sched_engine->no_priolist = false; > - > /* While gt calls i915_vma_parked(), we have to break the lock cycle */ > intel_gt_pm_put_async(engine->gt); > return 0; > diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > index 2326a73af6d3..609753b5401a 100644 > --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > @@ -1553,6 +1553,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) > * interrupt for secondary ports). > */ > sched_engine->queue_priority_hint = queue_prio(sched_engine); > + i915_sched_engine_reset_on_empty(sched_engine); > spin_unlock(&engine->active.lock); > > /* > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index 5d00f2e3c1de..f4a6fbfaf82e 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -263,6 +263,8 @@ static void guc_submission_tasklet(struct tasklet_struct *t) > > __guc_dequeue(engine); > > + i915_sched_engine_reset_on_empty(engine->sched_engine); > + > spin_unlock_irqrestore(&engine->active.lock, flags); > } > > diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h > index 5bec7b3b8456..713c38c99de9 100644 > --- a/drivers/gpu/drm/i915/i915_scheduler.h > +++ b/drivers/gpu/drm/i915/i915_scheduler.h > @@ -72,6 +72,13 @@ i915_sched_engine_is_empty(struct i915_sched_engine *sched_engine) > return RB_EMPTY_ROOT(&sched_engine->queue.rb_root); > } > > +static inline void > +i915_sched_engine_reset_on_empty(struct i915_sched_engine *sched_engine) > +{ > + if (i915_sched_engine_is_empty(sched_engine)) > + sched_engine->no_priolist = false; > +} > + > void i915_request_show_with_schedule(struct drm_printer *m, > const struct i915_request *rq, > const char *prefix, > -- > 2.28.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-06-04 18:31 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-03 21:27 [PATCH 0/9] Introduce i915_sched_engine object Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-03 21:27 ` [PATCH 1/9] drm/i915: Move priolist to new " Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 17:38 ` Jason Ekstrand 2021-06-04 17:38 ` [Intel-gfx] " Jason Ekstrand 2021-06-04 17:35 ` Matthew Brost 2021-06-04 17:35 ` [Intel-gfx] " Matthew Brost 2021-06-04 17:51 ` Jason Ekstrand 2021-06-04 17:51 ` [Intel-gfx] " Jason Ekstrand 2021-06-04 17:51 ` Matthew Brost 2021-06-04 17:51 ` [Intel-gfx] " Matthew Brost 2021-06-04 18:14 ` Jason Ekstrand 2021-06-04 18:14 ` [Intel-gfx] " Jason Ekstrand 2021-06-03 21:27 ` [PATCH 2/9] drm/i915: Add i915_sched_engine_is_empty function Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 17:50 ` Jason Ekstrand 2021-06-04 17:50 ` Jason Ekstrand 2021-06-03 21:27 ` [PATCH 3/9] drm/i915: Add i915_sched_engine_reset_on_empty function Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 18:31 ` Jason Ekstrand [this message] 2021-06-04 18:31 ` Jason Ekstrand 2021-06-04 18:49 ` Matthew Brost 2021-06-04 18:49 ` Matthew Brost 2021-06-03 21:27 ` [PATCH 4/9] drm/i915: Move active tracking to i915_sched_engine Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 19:00 ` Jason Ekstrand 2021-06-04 19:00 ` [Intel-gfx] " Jason Ekstrand 2021-06-04 19:12 ` Matthew Brost 2021-06-04 19:12 ` [Intel-gfx] " Matthew Brost 2021-06-03 21:27 ` [PATCH 5/9] drm/i915: Move engine->schedule " Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 19:03 ` Jason Ekstrand 2021-06-04 19:03 ` Jason Ekstrand 2021-06-04 20:06 ` Matthew Brost 2021-06-04 20:06 ` Matthew Brost 2021-06-03 21:27 ` [PATCH 6/9] drm/i915: Add kick_backend function " Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 19:09 ` Jason Ekstrand 2021-06-04 19:09 ` [Intel-gfx] " Jason Ekstrand 2021-06-04 19:19 ` Matthew Brost 2021-06-04 19:19 ` [Intel-gfx] " Matthew Brost 2021-06-03 21:27 ` [PATCH 7/9] drm/i915: Update i915_scheduler to operate on i915_sched_engine Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 19:17 ` Jason Ekstrand 2021-06-04 19:17 ` Jason Ekstrand 2021-06-04 19:14 ` Matthew Brost 2021-06-04 19:14 ` Matthew Brost 2021-06-03 21:27 ` [PATCH 8/9] drm/i915: Move submission tasklet to i915_sched_engine Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 19:26 ` Jason Ekstrand 2021-06-04 19:26 ` [Intel-gfx] " Jason Ekstrand 2021-06-04 19:55 ` Matthew Brost 2021-06-04 19:55 ` [Intel-gfx] " Matthew Brost 2021-06-03 21:27 ` [PATCH 9/9] drm/i915/doc: Add kernel doc for i915_sched_engine Matthew Brost 2021-06-03 21:27 ` [Intel-gfx] " Matthew Brost 2021-06-04 17:20 ` Jason Ekstrand 2021-06-04 17:20 ` Jason Ekstrand 2021-06-04 17:26 ` Matthew Brost 2021-06-04 17:26 ` Matthew Brost 2021-06-03 23:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce i915_sched_engine object (rev2) Patchwork 2021-06-03 23:37 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork 2021-06-04 0:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-06-04 2:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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