* [PATCH] ASoC: extend FLL function
@ 2016-01-06 7:27 John Hsu
2016-01-07 1:26 ` Anatol Pomozov
0 siblings, 1 reply; 10+ messages in thread
From: John Hsu @ 2016-01-06 7:27 UTC (permalink / raw)
To: broonie
Cc: alsa-devel, anatol.pomozov, benzh, lgirdwood, YHCHuang, CTLIN0, yong.zhi
Extend FLL clock source from MCLK/BCLK/FS.
Modify FLL calculation and parameter setting.
Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
---
sound/soc/codecs/nau8825.c | 128 ++++++++++++++++++++++++++++++++-------------
sound/soc/codecs/nau8825.h | 21 ++++++--
2 files changed, 108 insertions(+), 41 deletions(-)
diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c
index c1b87c5..504c969 100644
--- a/sound/soc/codecs/nau8825.c
+++ b/sound/soc/codecs/nau8825.c
@@ -31,7 +31,7 @@
#include "nau8825.h"
#define NAU_FREF_MAX 13500000
-#define NAU_FVCO_MAX 100000000
+#define NAU_FVCO_MAX 124000000
#define NAU_FVCO_MIN 90000000
struct nau8825_fll {
@@ -874,8 +874,8 @@ static int nau8825_codec_probe(struct snd_soc_codec *codec)
static int nau8825_calc_fll_param(unsigned int fll_in, unsigned int fs,
struct nau8825_fll *fll_param)
{
- u64 fvco;
- unsigned int fref, i;
+ u64 fvco, fvco_max;
+ unsigned int fref, i, fvco_sel;
/* Ensure the reference clock frequency (FREF) is <= 13.5MHz by dividing
* freq_in by 1, 2, 4, or 8 using FLL pre-scalar.
@@ -900,18 +900,23 @@ static int nau8825_calc_fll_param(unsigned int fll_in, unsigned int fs,
fll_param->ratio = fll_ratio[i].val;
/* Calculate the frequency of DCO (FDCO) given freq_out = 256 * Fs.
- * FDCO must be within the 90MHz - 100MHz or the FFL cannot be
+ * FDCO must be within the 90MHz - 124MHz or the FFL cannot be
* guaranteed across the full range of operation.
* FDCO = freq_out * 2 * mclk_src_scaling
*/
+ fvco_max = 0;
+ fvco_sel = ARRAY_SIZE(mclk_src_scaling);
for (i = 0; i < ARRAY_SIZE(mclk_src_scaling); i++) {
fvco = 256 * fs * 2 * mclk_src_scaling[i].param;
- if (NAU_FVCO_MIN < fvco && fvco < NAU_FVCO_MAX)
- break;
+ if (fvco > NAU_FVCO_MIN && fvco < NAU_FVCO_MAX &&
+ fvco_max < fvco) {
+ fvco_max = fvco;
+ fvco_sel = i;
+ }
}
- if (i == ARRAY_SIZE(mclk_src_scaling))
+ if (ARRAY_SIZE(mclk_src_scaling) == fvco_sel)
return -EINVAL;
- fll_param->mclk_src = mclk_src_scaling[i].val;
+ fll_param->mclk_src = mclk_src_scaling[fvco_sel].val;
/* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional
* input based on FDCO, FREF and FLL ratio.
@@ -926,7 +931,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
struct nau8825_fll *fll_param)
{
regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
- NAU8825_CLK_MCLK_SRC_MASK, fll_param->mclk_src);
+ NAU8825_CLK_SRC_MASK | NAU8825_CLK_MCLK_SRC_MASK,
+ NAU8825_CLK_SRC_MCLK | fll_param->mclk_src);
regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
NAU8825_FLL_RATIO_MASK, fll_param->ratio);
/* FLL 16-bit fractional input */
@@ -939,10 +945,25 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div);
/* select divided VCO input */
regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
- NAU8825_FLL_FILTER_SW_MASK, 0x0000);
- /* FLL sigma delta modulator enable */
- regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
- NAU8825_SDM_EN_MASK, NAU8825_SDM_EN);
+ NAU8825_FLL_CLK_SW_MASK, NAU8825_FLL_CLK_SW_REF);
+ /* Disable free-running mode */
+ regmap_update_bits(nau8825->regmap,
+ NAU8825_REG_FLL6, NAU8825_DCO_EN, 0);
+ if (fll_param->fll_frac) {
+ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
+ NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
+ NAU8825_FLL_FTR_SW_MASK,
+ NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
+ NAU8825_FLL_FTR_SW_FILTER);
+ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
+ NAU8825_SDM_EN, NAU8825_SDM_EN);
+ } else {
+ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
+ NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
+ NAU8825_FLL_FTR_SW_MASK, NAU8825_FLL_FTR_SW_ACCU);
+ regmap_update_bits(nau8825->regmap,
+ NAU8825_REG_FLL6, NAU8825_SDM_EN, 0);
+ }
}
/* freq_out must be 256*Fs in order to achieve the best performance */
@@ -970,6 +991,36 @@ static int nau8825_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
return 0;
}
+static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq)
+{
+ int ret = 0;
+
+ /* We selected MCLK source but the clock itself managed externally */
+ if (!nau8825->mclk)
+ return 0;
+
+ if (!nau8825->mclk_freq) {
+ ret = clk_prepare_enable(nau8825->mclk);
+ if (ret) {
+ dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
+ return ret;
+ }
+ }
+
+ if (nau8825->mclk_freq != freq) {
+ nau8825->mclk_freq = freq;
+
+ freq = clk_round_rate(nau8825->mclk, freq);
+ ret = clk_set_rate(nau8825->mclk, freq);
+ if (ret) {
+ dev_err(nau8825->dev, "Unable to set mclk rate\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
unsigned int freq)
{
@@ -981,29 +1032,9 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER,
NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK);
regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0);
-
- /* We selected MCLK source but the clock itself managed externally */
- if (!nau8825->mclk)
- break;
-
- if (!nau8825->mclk_freq) {
- ret = clk_prepare_enable(nau8825->mclk);
- if (ret) {
- dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
- return ret;
- }
- }
-
- if (nau8825->mclk_freq != freq) {
- nau8825->mclk_freq = freq;
-
- freq = clk_round_rate(nau8825->mclk, freq);
- ret = clk_set_rate(nau8825->mclk, freq);
- if (ret) {
- dev_err(nau8825->dev, "Unable to set mclk rate\n");
- return ret;
- }
- }
+ ret = nau8825_mclk_prepare(nau8825, freq);
+ if (ret)
+ return ret;
break;
case NAU8825_CLK_INTERNAL:
@@ -1011,7 +1042,32 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
NAU8825_DCO_EN);
regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER,
NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO);
+ if (nau8825->mclk_freq) {
+ clk_disable_unprepare(nau8825->mclk);
+ nau8825->mclk_freq = 0;
+ }
+
+ break;
+ case NAU8825_CLK_FLL_MCLK:
+ regmap_update_bits(regmap, NAU8825_REG_FLL3,
+ NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_MCLK);
+ ret = nau8825_mclk_prepare(nau8825, freq);
+ if (ret)
+ return ret;
+
+ break;
+ case NAU8825_CLK_FLL_BLK:
+ regmap_update_bits(regmap, NAU8825_REG_FLL3,
+ NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_BLK);
+ if (nau8825->mclk_freq) {
+ clk_disable_unprepare(nau8825->mclk);
+ nau8825->mclk_freq = 0;
+ }
+ break;
+ case NAU8825_CLK_FLL_FS:
+ regmap_update_bits(regmap, NAU8825_REG_FLL3,
+ NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_FS);
if (nau8825->mclk_freq) {
clk_disable_unprepare(nau8825->mclk);
nau8825->mclk_freq = 0;
diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h
index dff8edb..8237693 100644
--- a/sound/soc/codecs/nau8825.h
+++ b/sound/soc/codecs/nau8825.h
@@ -112,20 +112,28 @@
/* FLL3 (0x06) */
#define NAU8825_FLL_INTEGER_MASK (0x3ff << 0)
+#define NAU8825_FLL_CLK_SRC_SFT 10
+#define NAU8825_FLL_CLK_SRC_MASK (0x3 << NAU8825_FLL_CLK_SRC_SFT)
+#define NAU8825_FLL_CLK_SRC_MCLK (0 << NAU8825_FLL_CLK_SRC_SFT)
+#define NAU8825_FLL_CLK_SRC_BLK (0x2 << NAU8825_FLL_CLK_SRC_SFT)
+#define NAU8825_FLL_CLK_SRC_FS (0x3 << NAU8825_FLL_CLK_SRC_SFT)
/* FLL4 (0x07) */
#define NAU8825_FLL_REF_DIV_MASK (0x3 << 10)
/* FLL5 (0x08) */
-#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 14)
+#define NAU8825_FLL_PDB_DAC_EN (0x1 << 15)
+#define NAU8825_FLL_LOOP_FTR_EN (0x1 << 14)
+#define NAU8825_FLL_CLK_SW_MASK (0x1 << 13)
+#define NAU8825_FLL_CLK_SW_N2 (0x1 << 13)
+#define NAU8825_FLL_CLK_SW_REF (0x0 << 13)
+#define NAU8825_FLL_FTR_SW_MASK (0x1 << 12)
+#define NAU8825_FLL_FTR_SW_ACCU (0x1 << 12)
+#define NAU8825_FLL_FTR_SW_FILTER (0x0 << 12)
/* FLL6 (0x9) */
-#define NAU8825_DCO_EN_MASK (0x1 << 15)
#define NAU8825_DCO_EN (0x1 << 15)
-#define NAU8825_DCO_DIS (0x0 << 15)
-#define NAU8825_SDM_EN_MASK (0x1 << 14)
#define NAU8825_SDM_EN (0x1 << 14)
-#define NAU8825_SDM_DIS (0x0 << 14)
/* HSD_CTRL (0xc) */
#define NAU8825_HSD_AUTO_MODE (1 << 6)
@@ -306,6 +314,9 @@
enum {
NAU8825_CLK_MCLK = 0,
NAU8825_CLK_INTERNAL,
+ NAU8825_CLK_FLL_MCLK,
+ NAU8825_CLK_FLL_BLK,
+ NAU8825_CLK_FLL_FS,
};
struct nau8825 {
--
2.6.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: extend FLL function
2016-01-06 7:27 [PATCH] ASoC: extend FLL function John Hsu
@ 2016-01-07 1:26 ` Anatol Pomozov
0 siblings, 0 replies; 10+ messages in thread
From: Anatol Pomozov @ 2016-01-07 1:26 UTC (permalink / raw)
To: John Hsu
Cc: alsa-devel, Ben Zhang, Liam Girdwood, YHCHuang, Mark Brown,
CTLIN0, Yong Zhi
Hi
On Tue, Jan 5, 2016 at 11:27 PM, John Hsu <KCHSU0@nuvoton.com> wrote:
> Extend FLL clock source from MCLK/BCLK/FS.
> Modify FLL calculation and parameter setting.
>
> Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
The code looks good to me. Please add
Acked-by: Anatol Pomozov <anatol.pomozov@gmail.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: Extend FLL function
2016-02-26 1:34 ` Mark Brown
@ 2016-02-26 16:16 ` John Hsu
0 siblings, 0 replies; 10+ messages in thread
From: John Hsu @ 2016-02-26 16:16 UTC (permalink / raw)
To: Mark Brown
Cc: alsa-devel, Anatol Pomozov, Ben Zhang, Liam Girdwood, YHCHuang,
CTLIN0, Yong Zhi
Hi
On 2/26/2016 9:34 AM, Mark Brown wrote:
> On Fri, Feb 26, 2016 at 01:34:19AM +0800, John Hsu wrote:
>
>> On 2/25/2016 9:55 AM, Mark Brown wrote:
>>
>
>
>>> I don't have whatever this patch is (I suspect the fact that there were
>>> concerns raised meant I expected a new version). Please do try to use
>>> subject lines reflecting the style to the subsystem.
>>>
>
>
>> Do you mean I need to resubmit this patch and in-reply-to Message-ID of this
>> mail?
>>
>
> Yes, you need to resubmit the patch. No, you do not need to do it in
> reply to this e-mail.
>
>
I'll submit it again with proper subject.
>> I don't really catch the meaning of "use subject lines reflecting the style
>> to the subsystem".
>> Could you tell me more detail about it? Thank you very much.
>>
>
> If you look at all the other driver commits you'll see that their
> subject lines start "ASoC: driver: " .
>
Yes, I get it. I forgot to do that. Thanks for your remind.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: Extend FLL function
2016-02-25 17:34 ` John Hsu
@ 2016-02-26 1:34 ` Mark Brown
2016-02-26 16:16 ` John Hsu
0 siblings, 1 reply; 10+ messages in thread
From: Mark Brown @ 2016-02-26 1:34 UTC (permalink / raw)
To: John Hsu
Cc: alsa-devel, Anatol Pomozov, Ben Zhang, Liam Girdwood, YHCHuang,
CTLIN0, Yong Zhi
[-- Attachment #1.1: Type: text/plain, Size: 756 bytes --]
On Fri, Feb 26, 2016 at 01:34:19AM +0800, John Hsu wrote:
> On 2/25/2016 9:55 AM, Mark Brown wrote:
> >I don't have whatever this patch is (I suspect the fact that there were
> >concerns raised meant I expected a new version). Please do try to use
> >subject lines reflecting the style to the subsystem.
> Do you mean I need to resubmit this patch and in-reply-to Message-ID of this
> mail?
Yes, you need to resubmit the patch. No, you do not need to do it in
reply to this e-mail.
> I don't really catch the meaning of "use subject lines reflecting the style
> to the subsystem".
> Could you tell me more detail about it? Thank you very much.
If you look at all the other driver commits you'll see that their
subject lines start "ASoC: driver: " .
[-- Attachment #1.2: signature.asc --]
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: Extend FLL function
2016-02-25 1:55 ` Mark Brown
@ 2016-02-25 17:34 ` John Hsu
2016-02-26 1:34 ` Mark Brown
0 siblings, 1 reply; 10+ messages in thread
From: John Hsu @ 2016-02-25 17:34 UTC (permalink / raw)
To: Mark Brown
Cc: alsa-devel, Anatol Pomozov, Ben Zhang, Liam Girdwood, YHCHuang,
CTLIN0, Yong Zhi
Hi
On 2/25/2016 9:55 AM, Mark Brown wrote:
> On Thu, Feb 25, 2016 at 06:51:00AM +0800, John Hsu wrote:
>
>> Hi Mark,
>> Could you help to review and merge this patch?
>> Some patches later about nau8825 driver will patch base on it. Thank you
>> very much.
>>
>
> Please don't top post, reply in line with needed context. This allows
> readers to readily follow the flow of conversation and understand what
> you are talking about and also helps ensure that everything in the
> discussion is being addressed.
>
>
I see and follow it in the future patch and review. Thanks for your
information.
> I don't have whatever this patch is (I suspect the fact that there were
> concerns raised meant I expected a new version). Please do try to use
> subject lines reflecting the style to the subsystem.
>
Do you mean I need to resubmit this patch and in-reply-to Message-ID of
this mail?
I don't really catch the meaning of "use subject lines reflecting the
style to the subsystem".
Could you tell me more detail about it? Thank you very much.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: Extend FLL function
2016-02-24 22:51 ` John Hsu
@ 2016-02-25 1:55 ` Mark Brown
2016-02-25 17:34 ` John Hsu
0 siblings, 1 reply; 10+ messages in thread
From: Mark Brown @ 2016-02-25 1:55 UTC (permalink / raw)
To: John Hsu
Cc: alsa-devel, Anatol Pomozov, Ben Zhang, Liam Girdwood, YHCHuang,
CTLIN0, Yong Zhi
[-- Attachment #1.1: Type: text/plain, Size: 644 bytes --]
On Thu, Feb 25, 2016 at 06:51:00AM +0800, John Hsu wrote:
> Hi Mark,
> Could you help to review and merge this patch?
> Some patches later about nau8825 driver will patch base on it. Thank you
> very much.
Please don't top post, reply in line with needed context. This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being addressed.
I don't have whatever this patch is (I suspect the fact that there were
concerns raised meant I expected a new version). Please do try to use
subject lines reflecting the style to the subsystem.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 473 bytes --]
[-- Attachment #2: Type: text/plain, Size: 0 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: Extend FLL function
2015-12-31 9:14 ` Anatol Pomozov
2016-01-04 10:04 ` John Hsu
@ 2016-02-24 22:51 ` John Hsu
2016-02-25 1:55 ` Mark Brown
1 sibling, 1 reply; 10+ messages in thread
From: John Hsu @ 2016-02-24 22:51 UTC (permalink / raw)
To: Anatol Pomozov
Cc: alsa-devel, Ben Zhang, Liam Girdwood, YHCHuang, Mark Brown,
CTLIN0, Yong Zhi
Hi Mark,
Could you help to review and merge this patch?
Some patches later about nau8825 driver will patch base on it. Thank you
very much.
BR.
John
On 12/31/2015 5:14 PM, Anatol Pomozov wrote:
> Hi
>
> On Wed, Dec 30, 2015 at 11:55 PM, John Hsu <KCHSU0@nuvoton.com> wrote:
>
>> Extend FFL clock source from MCLK/BCLK/FS;
>> And modify some FLL parameter setting.
>>
>> Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
>> ---
>> sound/soc/codecs/nau8825.c | 100 +++++++++++++++++++++++++++++++++------------
>> sound/soc/codecs/nau8825.h | 14 ++++++-
>> 2 files changed, 86 insertions(+), 28 deletions(-)
>>
>> diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c
>> index 7fc7b4e..16da8ef 100644
>> --- a/sound/soc/codecs/nau8825.c
>> +++ b/sound/soc/codecs/nau8825.c
>> @@ -926,7 +926,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
>> struct nau8825_fll *fll_param)
>> {
>> regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
>> - NAU8825_CLK_MCLK_SRC_MASK, fll_param->mclk_src);
>> + NAU8825_CLK_SRC_MASK | NAU8825_CLK_MCLK_SRC_MASK,
>> + NAU8825_CLK_SRC_MCLK | fll_param->mclk_src);
>> regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
>> NAU8825_FLL_RATIO_MASK, fll_param->ratio);
>> /* FLL 16-bit fractional input */
>> @@ -939,10 +940,20 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
>> NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div);
>> /* select divided VCO input */
>> regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
>> - NAU8825_FLL_FILTER_SW_MASK, 0x0000);
>> - /* FLL sigma delta modulator enable */
>> + NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
>> + NAU8825_FLL_FILTER_SW_MASK,
>> + NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
>> + NAU8825_FLL_FILTER_SW_REF);
>> + /* Disable free-running mode */
>> regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
>> - NAU8825_SDM_EN_MASK, NAU8825_SDM_EN);
>> + NAU8825_DCO_EN, 0);
>> + /* FLL sigma delta modulator enable */
>> + if (fll_param->fll_frac)
>> + regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
>> + NAU8825_SDM_EN_MASK, NAU8825_SDM_EN);
>> + else
>> + regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
>> + NAU8825_SDM_EN_MASK, 0);
>> }
>>
>> /* freq_out must be 256*Fs in order to achieve the best performance */
>> @@ -970,6 +981,37 @@ static int nau8825_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
>> return 0;
>> }
>>
>> +static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq)
>> +{
>> + int ret = 0;
>> +
>> + /* We selected MCLK source but the clock itself managed externally */
>> + if (!nau8825->mclk)
>> + goto done;
>>
>
> A nitpick.
>
> This "goto" style is used for recovering resources or something that
> should be restored in case of error. But in your case "done:" does not
> recover anything. It is cleaner remove "goto" and replace with "return
> 0" or "return err".
>
>
>> +
>> + if (!nau8825->mclk_freq) {
>> + ret = clk_prepare_enable(nau8825->mclk);
>> + if (ret) {
>> + dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
>> + goto done;
>> + }
>> + }
>> +
>> + if (nau8825->mclk_freq != freq) {
>> + nau8825->mclk_freq = freq;
>> +
>> + freq = clk_round_rate(nau8825->mclk, freq);
>> + ret = clk_set_rate(nau8825->mclk, freq);
>> + if (ret) {
>> + dev_err(nau8825->dev, "Unable to set mclk rate\n");
>> + goto done;
>> + }
>> + }
>> +
>> +done:
>> + return ret;
>> +}
>> +
>> static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
>> unsigned int freq)
>> {
>> @@ -981,29 +1023,9 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
>> regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER,
>> NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK);
>> regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0);
>> -
>> - /* We selected MCLK source but the clock itself managed externally */
>> - if (!nau8825->mclk)
>> - break;
>> -
>> - if (!nau8825->mclk_freq) {
>> - ret = clk_prepare_enable(nau8825->mclk);
>> - if (ret) {
>> - dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
>> - return ret;
>> - }
>> - }
>> -
>> - if (nau8825->mclk_freq != freq) {
>> - nau8825->mclk_freq = freq;
>> -
>> - freq = clk_round_rate(nau8825->mclk, freq);
>> - ret = clk_set_rate(nau8825->mclk, freq);
>> - if (ret) {
>> - dev_err(nau8825->dev, "Unable to set mclk rate\n");
>> - return ret;
>> - }
>> - }
>> + ret = nau8825_mclk_prepare(nau8825, freq);
>> + if (ret)
>> + return ret;
>>
>> break;
>> case NAU8825_CLK_INTERNAL:
>> @@ -1018,6 +1040,30 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
>> }
>>
>> break;
>> + case NAU8825_CLK_FLL_MCLK:
>> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
>> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_MCLK);
>> + ret = nau8825_mclk_prepare(nau8825, freq);
>> + if (ret)
>> + return ret;
>> +
>> + break;
>> + case NAU8825_CLK_FLL_BLK:
>> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
>> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_BLK);
>> + ret = nau8825_mclk_prepare(nau8825, freq);
>>
>
>
> Based on names for these constants I believe CODEC is going to use
> BCLK/FS signal of I2S bus as a clock signal reference.
>
> Do you still need MCLK signal in this case? If no then you should
> disable MCLK to save some power.
>
>
>
>> + if (ret)
>> + return ret;
>> +
>> + break;
>> + case NAU8825_CLK_FLL_FS:
>> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
>> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_FS);
>> + ret = nau8825_mclk_prepare(nau8825, freq);
>> + if (ret)
>> + return ret;
>> +
>> + break;
>> default:
>> dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id);
>> return -EINVAL;
>> diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h
>> index dff8edb..e8f7ca5 100644
>> --- a/sound/soc/codecs/nau8825.h
>> +++ b/sound/soc/codecs/nau8825.h
>> @@ -112,12 +112,21 @@
>>
>> /* FLL3 (0x06) */
>> #define NAU8825_FLL_INTEGER_MASK (0x3ff << 0)
>> +#define NAU8825_FLL_CLK_SRC_SFT 10
>> +#define NAU8825_FLL_CLK_SRC_MASK (0x3 << NAU8825_FLL_CLK_SRC_SFT)
>> +#define NAU8825_FLL_CLK_SRC_MCLK (0 << NAU8825_FLL_CLK_SRC_SFT)
>> +#define NAU8825_FLL_CLK_SRC_BLK (0x2 << NAU8825_FLL_CLK_SRC_SFT)
>> +#define NAU8825_FLL_CLK_SRC_FS (0x3 << NAU8825_FLL_CLK_SRC_SFT)
>>
>> /* FLL4 (0x07) */
>> #define NAU8825_FLL_REF_DIV_MASK (0x3 << 10)
>>
>> /* FLL5 (0x08) */
>> -#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 14)
>> +#define NAU8825_FLL_PDB_DAC_EN (0x1 << 15)
>> +#define NAU8825_FLL_LOOP_FTR_EN (0x1 << 14)
>> +#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 13)
>> +#define NAU8825_FLL_FILTER_SW_N2 (0x1 << 13)
>> +#define NAU8825_FLL_FILTER_SW_REF (0x0 << 13)
>>
>> /* FLL6 (0x9) */
>> #define NAU8825_DCO_EN_MASK (0x1 << 15)
>> @@ -306,6 +315,9 @@
>> enum {
>> NAU8825_CLK_MCLK = 0,
>> NAU8825_CLK_INTERNAL,
>> + NAU8825_CLK_FLL_MCLK,
>> + NAU8825_CLK_FLL_BLK,
>> + NAU8825_CLK_FLL_FS,
>> };
>>
>> struct nau8825 {
>> --
>> 1.9.1
>>
>>
> .
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: Extend FLL function
2015-12-31 9:14 ` Anatol Pomozov
@ 2016-01-04 10:04 ` John Hsu
2016-02-24 22:51 ` John Hsu
1 sibling, 0 replies; 10+ messages in thread
From: John Hsu @ 2016-01-04 10:04 UTC (permalink / raw)
To: Anatol Pomozov
Cc: alsa-devel, Ben Zhang, Liam Girdwood, YHCHuang, Mark Brown,
CTLIN0, Yong Zhi
Dear all,
Please check up in the following comment, and I cut off original mail.
On 12/31/2015 5:14 PM, Anatol Pomozov wrote:
>> /* freq_out must be 256*Fs in order to achieve the best performance */
>> @@ -970,6 +981,37 @@ static int nau8825_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
>> return 0;
>> }
>>
>> +static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq)
>> +{
>> + int ret = 0;
>> +
>> + /* We selected MCLK source but the clock itself managed externally */
>> + if (!nau8825->mclk)
>> + goto done;
>>
>
> A nitpick.
>
> This "goto" style is used for recovering resources or something that
> should be restored in case of error. But in your case "done:" does not
> recover anything. It is cleaner remove "goto" and replace with "return
> 0" or "return err".
>
>
OK, I'll change it.
>> +
>> + if (!nau8825->mclk_freq) {
>> + ret = clk_prepare_enable(nau8825->mclk);
>> + if (ret) {
>> + dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
>> + goto done;
>> + }
>> + }
>> +
>> + if (nau8825->mclk_freq != freq) {
>> + nau8825->mclk_freq = freq;
>> +
>> + freq = clk_round_rate(nau8825->mclk, freq);
>> + ret = clk_set_rate(nau8825->mclk, freq);
>> + if (ret) {
>> + dev_err(nau8825->dev, "Unable to set mclk rate\n");
>> + goto done;
>> + }
>> + }
>> +
>> +done:
>> + return ret;
>> +}
>> +
>>
>> break;
>> case NAU8825_CLK_INTERNAL:
>> @@ -1018,6 +1040,30 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
>> }
>>
>> break;
>> + case NAU8825_CLK_FLL_MCLK:
>> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
>> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_MCLK);
>> + ret = nau8825_mclk_prepare(nau8825, freq);
>> + if (ret)
>> + return ret;
>> +
>> + break;
>> + case NAU8825_CLK_FLL_BLK:
>> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
>> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_BLK);
>> + ret = nau8825_mclk_prepare(nau8825, freq);
>>
>
>
> Based on names for these constants I believe CODEC is going to use
> BCLK/FS signal of I2S bus as a clock signal reference.
>
> Do you still need MCLK signal in this case? If no then you should
> disable MCLK to save some power.
>
>
Yes, the MCLK should disable when FLL reference to BCLK/FS for power saving.
I'll disable it like internal clock case.
BR.
John
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ASoC: Extend FLL function
2015-12-31 7:55 [PATCH] ASoC: Extend " John Hsu
@ 2015-12-31 9:14 ` Anatol Pomozov
2016-01-04 10:04 ` John Hsu
2016-02-24 22:51 ` John Hsu
0 siblings, 2 replies; 10+ messages in thread
From: Anatol Pomozov @ 2015-12-31 9:14 UTC (permalink / raw)
To: John Hsu
Cc: alsa-devel, Ben Zhang, Liam Girdwood, YHCHuang, Mark Brown,
CTLIN0, Yong Zhi
Hi
On Wed, Dec 30, 2015 at 11:55 PM, John Hsu <KCHSU0@nuvoton.com> wrote:
> Extend FFL clock source from MCLK/BCLK/FS;
> And modify some FLL parameter setting.
>
> Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
> ---
> sound/soc/codecs/nau8825.c | 100 +++++++++++++++++++++++++++++++++------------
> sound/soc/codecs/nau8825.h | 14 ++++++-
> 2 files changed, 86 insertions(+), 28 deletions(-)
>
> diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c
> index 7fc7b4e..16da8ef 100644
> --- a/sound/soc/codecs/nau8825.c
> +++ b/sound/soc/codecs/nau8825.c
> @@ -926,7 +926,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
> struct nau8825_fll *fll_param)
> {
> regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
> - NAU8825_CLK_MCLK_SRC_MASK, fll_param->mclk_src);
> + NAU8825_CLK_SRC_MASK | NAU8825_CLK_MCLK_SRC_MASK,
> + NAU8825_CLK_SRC_MCLK | fll_param->mclk_src);
> regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
> NAU8825_FLL_RATIO_MASK, fll_param->ratio);
> /* FLL 16-bit fractional input */
> @@ -939,10 +940,20 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
> NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div);
> /* select divided VCO input */
> regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
> - NAU8825_FLL_FILTER_SW_MASK, 0x0000);
> - /* FLL sigma delta modulator enable */
> + NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
> + NAU8825_FLL_FILTER_SW_MASK,
> + NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
> + NAU8825_FLL_FILTER_SW_REF);
> + /* Disable free-running mode */
> regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
> - NAU8825_SDM_EN_MASK, NAU8825_SDM_EN);
> + NAU8825_DCO_EN, 0);
> + /* FLL sigma delta modulator enable */
> + if (fll_param->fll_frac)
> + regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
> + NAU8825_SDM_EN_MASK, NAU8825_SDM_EN);
> + else
> + regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
> + NAU8825_SDM_EN_MASK, 0);
> }
>
> /* freq_out must be 256*Fs in order to achieve the best performance */
> @@ -970,6 +981,37 @@ static int nau8825_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
> return 0;
> }
>
> +static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq)
> +{
> + int ret = 0;
> +
> + /* We selected MCLK source but the clock itself managed externally */
> + if (!nau8825->mclk)
> + goto done;
A nitpick.
This "goto" style is used for recovering resources or something that
should be restored in case of error. But in your case "done:" does not
recover anything. It is cleaner remove "goto" and replace with "return
0" or "return err".
> +
> + if (!nau8825->mclk_freq) {
> + ret = clk_prepare_enable(nau8825->mclk);
> + if (ret) {
> + dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
> + goto done;
> + }
> + }
> +
> + if (nau8825->mclk_freq != freq) {
> + nau8825->mclk_freq = freq;
> +
> + freq = clk_round_rate(nau8825->mclk, freq);
> + ret = clk_set_rate(nau8825->mclk, freq);
> + if (ret) {
> + dev_err(nau8825->dev, "Unable to set mclk rate\n");
> + goto done;
> + }
> + }
> +
> +done:
> + return ret;
> +}
> +
> static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
> unsigned int freq)
> {
> @@ -981,29 +1023,9 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
> regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER,
> NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK);
> regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0);
> -
> - /* We selected MCLK source but the clock itself managed externally */
> - if (!nau8825->mclk)
> - break;
> -
> - if (!nau8825->mclk_freq) {
> - ret = clk_prepare_enable(nau8825->mclk);
> - if (ret) {
> - dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
> - return ret;
> - }
> - }
> -
> - if (nau8825->mclk_freq != freq) {
> - nau8825->mclk_freq = freq;
> -
> - freq = clk_round_rate(nau8825->mclk, freq);
> - ret = clk_set_rate(nau8825->mclk, freq);
> - if (ret) {
> - dev_err(nau8825->dev, "Unable to set mclk rate\n");
> - return ret;
> - }
> - }
> + ret = nau8825_mclk_prepare(nau8825, freq);
> + if (ret)
> + return ret;
>
> break;
> case NAU8825_CLK_INTERNAL:
> @@ -1018,6 +1040,30 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
> }
>
> break;
> + case NAU8825_CLK_FLL_MCLK:
> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_MCLK);
> + ret = nau8825_mclk_prepare(nau8825, freq);
> + if (ret)
> + return ret;
> +
> + break;
> + case NAU8825_CLK_FLL_BLK:
> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_BLK);
> + ret = nau8825_mclk_prepare(nau8825, freq);
Based on names for these constants I believe CODEC is going to use
BCLK/FS signal of I2S bus as a clock signal reference.
Do you still need MCLK signal in this case? If no then you should
disable MCLK to save some power.
> + if (ret)
> + return ret;
> +
> + break;
> + case NAU8825_CLK_FLL_FS:
> + regmap_update_bits(regmap, NAU8825_REG_FLL3,
> + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_FS);
> + ret = nau8825_mclk_prepare(nau8825, freq);
> + if (ret)
> + return ret;
> +
> + break;
> default:
> dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id);
> return -EINVAL;
> diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h
> index dff8edb..e8f7ca5 100644
> --- a/sound/soc/codecs/nau8825.h
> +++ b/sound/soc/codecs/nau8825.h
> @@ -112,12 +112,21 @@
>
> /* FLL3 (0x06) */
> #define NAU8825_FLL_INTEGER_MASK (0x3ff << 0)
> +#define NAU8825_FLL_CLK_SRC_SFT 10
> +#define NAU8825_FLL_CLK_SRC_MASK (0x3 << NAU8825_FLL_CLK_SRC_SFT)
> +#define NAU8825_FLL_CLK_SRC_MCLK (0 << NAU8825_FLL_CLK_SRC_SFT)
> +#define NAU8825_FLL_CLK_SRC_BLK (0x2 << NAU8825_FLL_CLK_SRC_SFT)
> +#define NAU8825_FLL_CLK_SRC_FS (0x3 << NAU8825_FLL_CLK_SRC_SFT)
>
> /* FLL4 (0x07) */
> #define NAU8825_FLL_REF_DIV_MASK (0x3 << 10)
>
> /* FLL5 (0x08) */
> -#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 14)
> +#define NAU8825_FLL_PDB_DAC_EN (0x1 << 15)
> +#define NAU8825_FLL_LOOP_FTR_EN (0x1 << 14)
> +#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 13)
> +#define NAU8825_FLL_FILTER_SW_N2 (0x1 << 13)
> +#define NAU8825_FLL_FILTER_SW_REF (0x0 << 13)
>
> /* FLL6 (0x9) */
> #define NAU8825_DCO_EN_MASK (0x1 << 15)
> @@ -306,6 +315,9 @@
> enum {
> NAU8825_CLK_MCLK = 0,
> NAU8825_CLK_INTERNAL,
> + NAU8825_CLK_FLL_MCLK,
> + NAU8825_CLK_FLL_BLK,
> + NAU8825_CLK_FLL_FS,
> };
>
> struct nau8825 {
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] ASoC: Extend FLL function
@ 2015-12-31 7:55 John Hsu
2015-12-31 9:14 ` Anatol Pomozov
0 siblings, 1 reply; 10+ messages in thread
From: John Hsu @ 2015-12-31 7:55 UTC (permalink / raw)
To: broonie
Cc: alsa-devel, anatol.pomozov, benzh, lgirdwood, YHCHuang, CTLIN0, yong.zhi
Extend FFL clock source from MCLK/BCLK/FS;
And modify some FLL parameter setting.
Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
---
sound/soc/codecs/nau8825.c | 100 +++++++++++++++++++++++++++++++++------------
sound/soc/codecs/nau8825.h | 14 ++++++-
2 files changed, 86 insertions(+), 28 deletions(-)
diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c
index 7fc7b4e..16da8ef 100644
--- a/sound/soc/codecs/nau8825.c
+++ b/sound/soc/codecs/nau8825.c
@@ -926,7 +926,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
struct nau8825_fll *fll_param)
{
regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
- NAU8825_CLK_MCLK_SRC_MASK, fll_param->mclk_src);
+ NAU8825_CLK_SRC_MASK | NAU8825_CLK_MCLK_SRC_MASK,
+ NAU8825_CLK_SRC_MCLK | fll_param->mclk_src);
regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
NAU8825_FLL_RATIO_MASK, fll_param->ratio);
/* FLL 16-bit fractional input */
@@ -939,10 +940,20 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div);
/* select divided VCO input */
regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
- NAU8825_FLL_FILTER_SW_MASK, 0x0000);
- /* FLL sigma delta modulator enable */
+ NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
+ NAU8825_FLL_FILTER_SW_MASK,
+ NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN |
+ NAU8825_FLL_FILTER_SW_REF);
+ /* Disable free-running mode */
regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
- NAU8825_SDM_EN_MASK, NAU8825_SDM_EN);
+ NAU8825_DCO_EN, 0);
+ /* FLL sigma delta modulator enable */
+ if (fll_param->fll_frac)
+ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
+ NAU8825_SDM_EN_MASK, NAU8825_SDM_EN);
+ else
+ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
+ NAU8825_SDM_EN_MASK, 0);
}
/* freq_out must be 256*Fs in order to achieve the best performance */
@@ -970,6 +981,37 @@ static int nau8825_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
return 0;
}
+static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq)
+{
+ int ret = 0;
+
+ /* We selected MCLK source but the clock itself managed externally */
+ if (!nau8825->mclk)
+ goto done;
+
+ if (!nau8825->mclk_freq) {
+ ret = clk_prepare_enable(nau8825->mclk);
+ if (ret) {
+ dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
+ goto done;
+ }
+ }
+
+ if (nau8825->mclk_freq != freq) {
+ nau8825->mclk_freq = freq;
+
+ freq = clk_round_rate(nau8825->mclk, freq);
+ ret = clk_set_rate(nau8825->mclk, freq);
+ if (ret) {
+ dev_err(nau8825->dev, "Unable to set mclk rate\n");
+ goto done;
+ }
+ }
+
+done:
+ return ret;
+}
+
static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
unsigned int freq)
{
@@ -981,29 +1023,9 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER,
NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK);
regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0);
-
- /* We selected MCLK source but the clock itself managed externally */
- if (!nau8825->mclk)
- break;
-
- if (!nau8825->mclk_freq) {
- ret = clk_prepare_enable(nau8825->mclk);
- if (ret) {
- dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
- return ret;
- }
- }
-
- if (nau8825->mclk_freq != freq) {
- nau8825->mclk_freq = freq;
-
- freq = clk_round_rate(nau8825->mclk, freq);
- ret = clk_set_rate(nau8825->mclk, freq);
- if (ret) {
- dev_err(nau8825->dev, "Unable to set mclk rate\n");
- return ret;
- }
- }
+ ret = nau8825_mclk_prepare(nau8825, freq);
+ if (ret)
+ return ret;
break;
case NAU8825_CLK_INTERNAL:
@@ -1018,6 +1040,30 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
}
break;
+ case NAU8825_CLK_FLL_MCLK:
+ regmap_update_bits(regmap, NAU8825_REG_FLL3,
+ NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_MCLK);
+ ret = nau8825_mclk_prepare(nau8825, freq);
+ if (ret)
+ return ret;
+
+ break;
+ case NAU8825_CLK_FLL_BLK:
+ regmap_update_bits(regmap, NAU8825_REG_FLL3,
+ NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_BLK);
+ ret = nau8825_mclk_prepare(nau8825, freq);
+ if (ret)
+ return ret;
+
+ break;
+ case NAU8825_CLK_FLL_FS:
+ regmap_update_bits(regmap, NAU8825_REG_FLL3,
+ NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_FS);
+ ret = nau8825_mclk_prepare(nau8825, freq);
+ if (ret)
+ return ret;
+
+ break;
default:
dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id);
return -EINVAL;
diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h
index dff8edb..e8f7ca5 100644
--- a/sound/soc/codecs/nau8825.h
+++ b/sound/soc/codecs/nau8825.h
@@ -112,12 +112,21 @@
/* FLL3 (0x06) */
#define NAU8825_FLL_INTEGER_MASK (0x3ff << 0)
+#define NAU8825_FLL_CLK_SRC_SFT 10
+#define NAU8825_FLL_CLK_SRC_MASK (0x3 << NAU8825_FLL_CLK_SRC_SFT)
+#define NAU8825_FLL_CLK_SRC_MCLK (0 << NAU8825_FLL_CLK_SRC_SFT)
+#define NAU8825_FLL_CLK_SRC_BLK (0x2 << NAU8825_FLL_CLK_SRC_SFT)
+#define NAU8825_FLL_CLK_SRC_FS (0x3 << NAU8825_FLL_CLK_SRC_SFT)
/* FLL4 (0x07) */
#define NAU8825_FLL_REF_DIV_MASK (0x3 << 10)
/* FLL5 (0x08) */
-#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 14)
+#define NAU8825_FLL_PDB_DAC_EN (0x1 << 15)
+#define NAU8825_FLL_LOOP_FTR_EN (0x1 << 14)
+#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 13)
+#define NAU8825_FLL_FILTER_SW_N2 (0x1 << 13)
+#define NAU8825_FLL_FILTER_SW_REF (0x0 << 13)
/* FLL6 (0x9) */
#define NAU8825_DCO_EN_MASK (0x1 << 15)
@@ -306,6 +315,9 @@
enum {
NAU8825_CLK_MCLK = 0,
NAU8825_CLK_INTERNAL,
+ NAU8825_CLK_FLL_MCLK,
+ NAU8825_CLK_FLL_BLK,
+ NAU8825_CLK_FLL_FS,
};
struct nau8825 {
--
1.9.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-02-26 16:17 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-01-06 7:27 [PATCH] ASoC: extend FLL function John Hsu
2016-01-07 1:26 ` Anatol Pomozov
-- strict thread matches above, loose matches on Subject: below --
2015-12-31 7:55 [PATCH] ASoC: Extend " John Hsu
2015-12-31 9:14 ` Anatol Pomozov
2016-01-04 10:04 ` John Hsu
2016-02-24 22:51 ` John Hsu
2016-02-25 1:55 ` Mark Brown
2016-02-25 17:34 ` John Hsu
2016-02-26 1:34 ` Mark Brown
2016-02-26 16:16 ` John Hsu
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