* [PATCH] PCI: imx6: fix occasional link failure
@ 2014-08-08 6:36 Tim Harvey
2014-08-08 8:04 ` Hong-Xing.Zhu
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Tim Harvey @ 2014-08-08 6:36 UTC (permalink / raw)
To: l.stach; +Cc: Fabio Estevam, shawn.guo, stable, marex, bhelgaas, linux-pci
According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.
Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/pci/host/pci-imx6.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 1be6073..9b6bab9 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -256,11 +256,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
int ret;
- regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
- IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
- regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
- IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
-
ret = clk_prepare_enable(imx6_pcie->pcie_phy);
if (ret) {
dev_err(pp->dev, "unable to enable pcie_phy clock\n");
@@ -282,6 +277,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
/* allow the clocks to stabilize */
usleep_range(200, 500);
+ /* power up core phy and enable ref clock */
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+ IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+ IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
+
/* Some boards don't have PCIe reset GPIO. */
if (gpio_is_valid(imx6_pcie->reset_gpio)) {
gpio_set_value(imx6_pcie->reset_gpio, 0);
--
1.8.3.2
^ permalink raw reply related [flat|nested] 11+ messages in thread
* RE: [PATCH] PCI: imx6: fix occasional link failure
2014-08-08 6:36 [PATCH] PCI: imx6: fix occasional link failure Tim Harvey
@ 2014-08-08 8:04 ` Hong-Xing.Zhu
2014-08-08 13:24 ` Greg KH
` (3 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Hong-Xing.Zhu @ 2014-08-08 8:04 UTC (permalink / raw)
To: Tim Harvey, l.stach
Cc: Fabio Estevam, Shawn Guo, stable, marex, bhelgaas, linux-pci
Hi Tim:
> -----Original Message-----
> From: linux-pci-owner@vger.kernel.org [mailto:linux-pci-owner@vger.kernel.org]
> On Behalf Of Tim Harvey
> Sent: Friday, August 08, 2014 2:37 PM
> To: l.stach@pengutronix.de
> Cc: Fabio Estevam; Guo Shawn-R65073; stable@vger.kernel.org; marex@denx.de;
> bhelgaas@google.com; linux-pci@vger.kernel.org
> Subject: [PATCH] PCI: imx6: fix occasional link failure
>
> According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
> for SS function) must remain deasserted until the reference clock is running
> at the appropriate frequency.
>
> Without this patch we find a high link failure rate (>5%) on certain
> IMX6 boards at various temperatures.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> drivers/pci/host/pci-imx6.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index
> 1be6073..9b6bab9 100644
> --- a/drivers/pci/host/pci-imx6.c
> +++ b/drivers/pci/host/pci-imx6.c
> @@ -256,11 +256,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port
> *pp)
> struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
> int ret;
>
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> -
> ret = clk_prepare_enable(imx6_pcie->pcie_phy);
> if (ret) {
> dev_err(pp->dev, "unable to enable pcie_phy clock\n"); @@ -282,6
> +277,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
> /* allow the clocks to stabilize */
> usleep_range(200, 500);
>
> + /* power up core phy and enable ref clock */
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> + IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> + IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> +
[Richard] It's better add some comments into the codes, why
Enable_pcie_clock should be placed before ssp_en is set.
For example:
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
Best Regards
Richard Zhu
> /* Some boards don't have PCIe reset GPIO. */
> if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> gpio_set_value(imx6_pcie->reset_gpio, 0);
> --
> 1.8.3.2
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in the
> body of a message to majordomo@vger.kernel.org More majordomo info at
> http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-08-08 6:36 [PATCH] PCI: imx6: fix occasional link failure Tim Harvey
2014-08-08 8:04 ` Hong-Xing.Zhu
@ 2014-08-08 13:24 ` Greg KH
2014-08-08 15:59 ` Fabio Estevam
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Greg KH @ 2014-08-08 13:24 UTC (permalink / raw)
To: Tim Harvey
Cc: l.stach, Fabio Estevam, shawn.guo, stable, marex, bhelgaas, linux-pci
On Thu, Aug 07, 2014 at 11:36:40PM -0700, Tim Harvey wrote:
> According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
> for SS function) must remain deasserted until the reference clock is running
> at the appropriate frequency.
>
> Without this patch we find a high link failure rate (>5%) on certain
> IMX6 boards at various temperatures.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> drivers/pci/host/pci-imx6.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
<formletter>
This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read Documentation/stable_kernel_rules.txt
for how to do this properly.
</formletter>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-08-08 6:36 [PATCH] PCI: imx6: fix occasional link failure Tim Harvey
2014-08-08 8:04 ` Hong-Xing.Zhu
2014-08-08 13:24 ` Greg KH
@ 2014-08-08 15:59 ` Fabio Estevam
2014-08-11 17:15 ` Marek Vasut
2014-08-11 16:17 ` Fabio Estevam
2014-09-16 23:28 ` Bjorn Helgaas
4 siblings, 1 reply; 11+ messages in thread
From: Fabio Estevam @ 2014-08-08 15:59 UTC (permalink / raw)
To: Tim Harvey
Cc: Lucas Stach, Shawn Guo, Marek Vašut, Bjorn Helgaas, linux-pci
On Fri, Aug 8, 2014 at 3:36 AM, Tim Harvey <tharvey@gateworks.com> wrote:
> According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
> for SS function) must remain deasserted until the reference clock is running
> at the appropriate frequency.
>
> Without this patch we find a high link failure rate (>5%) on certain
> IMX6 boards at various temperatures.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Thanks, Tim.
Marek,
Does this fix the PCI linkup failures you reported earlier?
Regards,
Fabio Estevam
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-08-08 6:36 [PATCH] PCI: imx6: fix occasional link failure Tim Harvey
` (2 preceding siblings ...)
2014-08-08 15:59 ` Fabio Estevam
@ 2014-08-11 16:17 ` Fabio Estevam
2014-09-16 23:28 ` Bjorn Helgaas
4 siblings, 0 replies; 11+ messages in thread
From: Fabio Estevam @ 2014-08-11 16:17 UTC (permalink / raw)
To: Tim Harvey
Cc: Lucas Stach, Shawn Guo, Marek Vašut, Bjorn Helgaas,
linux-pci, Richard Zhu
On Fri, Aug 8, 2014 at 3:36 AM, Tim Harvey <tharvey@gateworks.com> wrote:
> According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
> for SS function) must remain deasserted until the reference clock is running
> at the appropriate frequency.
>
> Without this patch we find a high link failure rate (>5%) on certain
> IMX6 boards at various temperatures.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Thanks for the patch, Tim:
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-08-08 15:59 ` Fabio Estevam
@ 2014-08-11 17:15 ` Marek Vasut
0 siblings, 0 replies; 11+ messages in thread
From: Marek Vasut @ 2014-08-11 17:15 UTC (permalink / raw)
To: Fabio Estevam
Cc: Tim Harvey, Lucas Stach, Shawn Guo, Bjorn Helgaas, linux-pci
On Friday, August 08, 2014 at 05:59:23 PM, Fabio Estevam wrote:
> On Fri, Aug 8, 2014 at 3:36 AM, Tim Harvey <tharvey@gateworks.com> wrote:
> > According to the IMX6 reference manuals, REF_SSP_EN (Reference clock
> > enable for SS function) must remain deasserted until the reference clock
> > is running at the appropriate frequency.
> >
> > Without this patch we find a high link failure rate (>5%) on certain
> > IMX6 boards at various temperatures.
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>
> Thanks, Tim.
>
> Marek,
>
> Does this fix the PCI linkup failures you reported earlier?
I currently don't have the board available, so I will moan later if this is
still broken. Please go ahead and apply, the patch looks good to me:
Acked-by: Marek Vasut <marex@denx.de>
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH] PCI: imx6: fix occasional link failure
[not found] <Message-Id: <1407479800-6730-1-git-send-email-tharvey@gateworks.com>
@ 2014-09-03 4:04 ` Tim Harvey
2014-09-05 17:32 ` Bjorn Helgaas
0 siblings, 1 reply; 11+ messages in thread
From: Tim Harvey @ 2014-09-03 4:04 UTC (permalink / raw)
To: l.stach; +Cc: Fabio Estevam, shawn.guo, marex, bhelgaas, linux-pci
According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.
Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
---
v2:
- added Tested-by Fabio Estevam
- added Acked-by Marek Vasut
---
drivers/pci/host/pci-imx6.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 1be6073..9b6bab9 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -256,11 +256,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
int ret;
- regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
- IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
- regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
- IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
-
ret = clk_prepare_enable(imx6_pcie->pcie_phy);
if (ret) {
dev_err(pp->dev, "unable to enable pcie_phy clock\n");
@@ -282,6 +277,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
/* allow the clocks to stabilize */
usleep_range(200, 500);
+ /* power up core phy and enable ref clock */
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+ IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+ IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
+
/* Some boards don't have PCIe reset GPIO. */
if (gpio_is_valid(imx6_pcie->reset_gpio)) {
gpio_set_value(imx6_pcie->reset_gpio, 0);
--
1.8.3.2
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-09-03 4:04 ` Tim Harvey
@ 2014-09-05 17:32 ` Bjorn Helgaas
2014-09-08 18:27 ` Lucas Stach
0 siblings, 1 reply; 11+ messages in thread
From: Bjorn Helgaas @ 2014-09-05 17:32 UTC (permalink / raw)
To: Tim Harvey; +Cc: l.stach, Fabio Estevam, shawn.guo, marex, linux-pci
On Tue, Sep 02, 2014 at 09:04:37PM -0700, Tim Harvey wrote:
> According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
> for SS function) must remain deasserted until the reference clock is running
> at the appropriate frequency.
>
> Without this patch we find a high link failure rate (>5%) on certain
> IMX6 boards at various temperatures.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> Tested-by: Fabio Estevam <festevam@gmail.com>
> Acked-by: Marek Vasut <marex@denx.de>
I'm looking for the comment update requested by Richard, and an ack from
Richard and/or Lucas. Also, please add the stable tag if you want it
(see Documentation/stable_kernel_rules.txt for details).
Bjorn
> ---
>
> v2:
> - added Tested-by Fabio Estevam
> - added Acked-by Marek Vasut
>
> ---
> drivers/pci/host/pci-imx6.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
> index 1be6073..9b6bab9 100644
> --- a/drivers/pci/host/pci-imx6.c
> +++ b/drivers/pci/host/pci-imx6.c
> @@ -256,11 +256,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
> struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
> int ret;
>
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> -
> ret = clk_prepare_enable(imx6_pcie->pcie_phy);
> if (ret) {
> dev_err(pp->dev, "unable to enable pcie_phy clock\n");
> @@ -282,6 +277,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
> /* allow the clocks to stabilize */
> usleep_range(200, 500);
>
> + /* power up core phy and enable ref clock */
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> + IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> + IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> +
> /* Some boards don't have PCIe reset GPIO. */
> if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> gpio_set_value(imx6_pcie->reset_gpio, 0);
> --
> 1.8.3.2
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-09-05 17:32 ` Bjorn Helgaas
@ 2014-09-08 18:27 ` Lucas Stach
0 siblings, 0 replies; 11+ messages in thread
From: Lucas Stach @ 2014-09-08 18:27 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: Tim Harvey, Fabio Estevam, shawn.guo, marex, linux-pci
Am Freitag, den 05.09.2014, 11:32 -0600 schrieb Bjorn Helgaas:
> On Tue, Sep 02, 2014 at 09:04:37PM -0700, Tim Harvey wrote:
> > According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
> > for SS function) must remain deasserted until the reference clock is running
> > at the appropriate frequency.
> >
> > Without this patch we find a high link failure rate (>5%) on certain
> > IMX6 boards at various temperatures.
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> > Tested-by: Fabio Estevam <festevam@gmail.com>
> > Acked-by: Marek Vasut <marex@denx.de>
>
> I'm looking for the comment update requested by Richard, and an ack from
> Richard and/or Lucas. Also, please add the stable tag if you want it
> (see Documentation/stable_kernel_rules.txt for details).
>
We already have a comment some line above regarding clock stabilization,
so I don't think another one is strictly needed. Especially as this
initialization order is clearly defined by the reference manual.
So with or without the comment added:
Acked-by: Lucas Stach <l.stach@pengutronix.de>
> Bjorn
>
> > ---
> >
> > v2:
> > - added Tested-by Fabio Estevam
> > - added Acked-by Marek Vasut
> >
> > ---
> > drivers/pci/host/pci-imx6.c | 11 ++++++-----
> > 1 file changed, 6 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
> > index 1be6073..9b6bab9 100644
> > --- a/drivers/pci/host/pci-imx6.c
> > +++ b/drivers/pci/host/pci-imx6.c
> > @@ -256,11 +256,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
> > struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
> > int ret;
> >
> > - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> > - IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> > - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> > - IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> > -
> > ret = clk_prepare_enable(imx6_pcie->pcie_phy);
> > if (ret) {
> > dev_err(pp->dev, "unable to enable pcie_phy clock\n");
> > @@ -282,6 +277,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
> > /* allow the clocks to stabilize */
> > usleep_range(200, 500);
> >
> > + /* power up core phy and enable ref clock */
> > + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> > + IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> > + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> > + IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> > +
> > /* Some boards don't have PCIe reset GPIO. */
> > if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> > gpio_set_value(imx6_pcie->reset_gpio, 0);
> > --
> > 1.8.3.2
> >
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-08-08 6:36 [PATCH] PCI: imx6: fix occasional link failure Tim Harvey
` (3 preceding siblings ...)
2014-08-11 16:17 ` Fabio Estevam
@ 2014-09-16 23:28 ` Bjorn Helgaas
2014-09-16 23:53 ` Marek Vasut
4 siblings, 1 reply; 11+ messages in thread
From: Bjorn Helgaas @ 2014-09-16 23:28 UTC (permalink / raw)
To: Tim Harvey; +Cc: l.stach, Fabio Estevam, shawn.guo, stable, marex, linux-pci
On Thu, Aug 07, 2014 at 11:36:40PM -0700, Tim Harvey wrote:
> According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
> for SS function) must remain deasserted until the reference clock is running
> at the appropriate frequency.
>
> Without this patch we find a high link failure rate (>5%) on certain
> IMX6 boards at various temperatures.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Applied to pci/host-imx6 for v3.18 with acks from Marek and Lucas, thanks!
> ---
> drivers/pci/host/pci-imx6.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
> index 1be6073..9b6bab9 100644
> --- a/drivers/pci/host/pci-imx6.c
> +++ b/drivers/pci/host/pci-imx6.c
> @@ -256,11 +256,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
> struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
> int ret;
>
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> -
> ret = clk_prepare_enable(imx6_pcie->pcie_phy);
> if (ret) {
> dev_err(pp->dev, "unable to enable pcie_phy clock\n");
> @@ -282,6 +277,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
> /* allow the clocks to stabilize */
> usleep_range(200, 500);
>
> + /* power up core phy and enable ref clock */
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> + IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> + IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
> +
> /* Some boards don't have PCIe reset GPIO. */
> if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> gpio_set_value(imx6_pcie->reset_gpio, 0);
> --
> 1.8.3.2
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH] PCI: imx6: fix occasional link failure
2014-09-16 23:28 ` Bjorn Helgaas
@ 2014-09-16 23:53 ` Marek Vasut
0 siblings, 0 replies; 11+ messages in thread
From: Marek Vasut @ 2014-09-16 23:53 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Tim Harvey, l.stach, Fabio Estevam, shawn.guo, stable, linux-pci
On Wednesday, September 17, 2014 at 01:28:59 AM, Bjorn Helgaas wrote:
> On Thu, Aug 07, 2014 at 11:36:40PM -0700, Tim Harvey wrote:
> > According to the IMX6 reference manuals, REF_SSP_EN (Reference clock
> > enable for SS function) must remain deasserted until the reference clock
> > is running at the appropriate frequency.
> >
> > Without this patch we find a high link failure rate (>5%) on certain
> > IMX6 boards at various temperatures.
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>
> Applied to pci/host-imx6 for v3.18 with acks from Marek and Lucas, thanks!
Thanks!
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2014-09-16 23:53 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-08-08 6:36 [PATCH] PCI: imx6: fix occasional link failure Tim Harvey
2014-08-08 8:04 ` Hong-Xing.Zhu
2014-08-08 13:24 ` Greg KH
2014-08-08 15:59 ` Fabio Estevam
2014-08-11 17:15 ` Marek Vasut
2014-08-11 16:17 ` Fabio Estevam
2014-09-16 23:28 ` Bjorn Helgaas
2014-09-16 23:53 ` Marek Vasut
[not found] <Message-Id: <1407479800-6730-1-git-send-email-tharvey@gateworks.com>
2014-09-03 4:04 ` Tim Harvey
2014-09-05 17:32 ` Bjorn Helgaas
2014-09-08 18:27 ` Lucas Stach
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