All of lore.kernel.org
 help / color / mirror / Atom feed
From: Fabio Estevam <festevam@gmail.com>
To: Lucas Stach <dev@lynxeye.de>
Cc: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	"Lukas F . Hartmann" <lukas@mntre.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/3] arm64: dts: imx8mq: add Nitrogen8 SoM
Date: Sat, 8 May 2021 10:37:16 -0300	[thread overview]
Message-ID: <CAOMZO5B6_UVhAeCt7-AjeB8LR-_J7vQEQqb0yV5gAFUbBj_5VQ@mail.gmail.com> (raw)
In-Reply-To: <20210508121650.105864-1-dev@lynxeye.de>

Hi Lucas,

On Sat, May 8, 2021 at 9:17 AM Lucas Stach <dev@lynxeye.de> wrote:

> +       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
> +               fsl,pins = <
> +                       MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x8d
> +                       MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xcd
> +               >;
> +       };
> +
> +       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
> +               fsl,pins = <
> +                       MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x9f
> +                       MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xdf

The 100 and 200MHz pinctrl entries are unused here, so you could just
remove them.

WARNING: multiple messages have this Message-ID (diff)
From: Fabio Estevam <festevam@gmail.com>
To: Lucas Stach <dev@lynxeye.de>
Cc: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	 "Lukas F . Hartmann" <lukas@mntre.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	 Pengutronix Kernel Team <kernel@pengutronix.de>,
	 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	 "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/3] arm64: dts: imx8mq: add Nitrogen8 SoM
Date: Sat, 8 May 2021 10:37:16 -0300	[thread overview]
Message-ID: <CAOMZO5B6_UVhAeCt7-AjeB8LR-_J7vQEQqb0yV5gAFUbBj_5VQ@mail.gmail.com> (raw)
In-Reply-To: <20210508121650.105864-1-dev@lynxeye.de>

Hi Lucas,

On Sat, May 8, 2021 at 9:17 AM Lucas Stach <dev@lynxeye.de> wrote:

> +       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
> +               fsl,pins = <
> +                       MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x8d
> +                       MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xcd
> +                       MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xcd
> +               >;
> +       };
> +
> +       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
> +               fsl,pins = <
> +                       MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x9f
> +                       MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xdf
> +                       MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xdf

The 100 and 200MHz pinctrl entries are unused here, so you could just
remove them.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-05-08 13:37 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-08 12:16 [PATCH 1/3] arm64: dts: imx8mq: add Nitrogen8 SoM Lucas Stach
2021-05-08 12:16 ` Lucas Stach
2021-05-08 12:16 ` [PATCH 2/3] dt-bindings: vendor-prefixes: add mntre Lucas Stach
2021-05-08 12:16   ` Lucas Stach
2021-05-10 16:04   ` Rob Herring
2021-05-10 16:04     ` Rob Herring
2021-05-08 12:16 ` [PATCH 3/3] arm64: dts: imx8mq: add support for MNT Reform2 Lucas Stach
2021-05-08 12:16   ` Lucas Stach
2021-05-10 16:07   ` Rob Herring
2021-05-10 16:07     ` Rob Herring
2021-05-08 13:37 ` Fabio Estevam [this message]
2021-05-08 13:37   ` [PATCH 1/3] arm64: dts: imx8mq: add Nitrogen8 SoM Fabio Estevam
2021-05-10 16:04 ` Rob Herring
2021-05-10 16:04   ` Rob Herring

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAOMZO5B6_UVhAeCt7-AjeB8LR-_J7vQEQqb0yV5gAFUbBj_5VQ@mail.gmail.com \
    --to=festevam@gmail.com \
    --cc=dev@lynxeye.de \
    --cc=devicetree@vger.kernel.org \
    --cc=kernel@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=lukas@mntre.com \
    --cc=robh+dt@kernel.org \
    --cc=shawnguo@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.