* [U-Boot] Support for i.MX7ULP rev B0
@ 2019-07-17 16:59 Fabio Estevam
2019-07-18 1:20 ` Peng Fan
0 siblings, 1 reply; 7+ messages in thread
From: Fabio Estevam @ 2019-07-17 16:59 UTC (permalink / raw)
To: u-boot
Hi Peng and Ye,
I notice that mx7ulp evk does not boot with U-Boot mainline.
I see that the changes for supporting silicon revision B0 from NXP
U-Boot tree are not present in mainline U-Boot.
Do you plan to submit these patches upstream?
Please let me know.
Thanks,
Fabio Estevam
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] Support for i.MX7ULP rev B0
2019-07-17 16:59 [U-Boot] Support for i.MX7ULP rev B0 Fabio Estevam
@ 2019-07-18 1:20 ` Peng Fan
2019-07-18 1:46 ` Fabio Estevam
2019-07-18 12:16 ` Fabio Estevam
0 siblings, 2 replies; 7+ messages in thread
From: Peng Fan @ 2019-07-18 1:20 UTC (permalink / raw)
To: u-boot
Hi Fabio,
I already submitted patches 2 months ago, but still not merged.
https://patchwork.ozlabs.org/cover/1099916/
https://patchwork.ozlabs.org/patch/1100269/
Regards,
Peng.
> -----Original Message-----
> From: Fabio Estevam [mailto:festevam at gmail.com]
> Sent: 2019年7月18日 1:00
> To: Peng Fan <peng.fan@nxp.com>; Ye Li <ye.li@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>; U-Boot-Denx <u-boot@lists.denx.de>
> Subject: Support for i.MX7ULP rev B0
>
> Hi Peng and Ye,
>
> I notice that mx7ulp evk does not boot with U-Boot mainline.
>
> I see that the changes for supporting silicon revision B0 from NXP U-Boot tree
> are not present in mainline U-Boot.
>
> Do you plan to submit these patches upstream?
>
> Please let me know.
>
> Thanks,
>
> Fabio Estevam
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] Support for i.MX7ULP rev B0
2019-07-18 1:20 ` Peng Fan
@ 2019-07-18 1:46 ` Fabio Estevam
2019-07-18 12:16 ` Fabio Estevam
1 sibling, 0 replies; 7+ messages in thread
From: Fabio Estevam @ 2019-07-18 1:46 UTC (permalink / raw)
To: u-boot
Hi Peng,
On Wed, Jul 17, 2019 at 10:20 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> Hi Fabio,
>
> I already submitted patches 2 months ago, but still not merged.
> https://patchwork.ozlabs.org/cover/1099916/
> https://patchwork.ozlabs.org/patch/1100269/
Thanks, I will test them tomorrow.
Cheers
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] Support for i.MX7ULP rev B0
2019-07-18 1:20 ` Peng Fan
2019-07-18 1:46 ` Fabio Estevam
@ 2019-07-18 12:16 ` Fabio Estevam
2019-07-19 1:48 ` Peng Fan
1 sibling, 1 reply; 7+ messages in thread
From: Fabio Estevam @ 2019-07-18 12:16 UTC (permalink / raw)
To: u-boot
Hi Peng and Ye Li,
On Wed, Jul 17, 2019 at 10:20 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> Hi Fabio,
>
> I already submitted patches 2 months ago, but still not merged.
> https://patchwork.ozlabs.org/cover/1099916/
> https://patchwork.ozlabs.org/patch/1100269/
I applied all these 20 patches and now I can boot the kernel (from NXP
4.14.98 tree). Thanks!
I do see some error messages in U-Boot related to reserving fdt memory:
U-Boot 2019.07-00348-g85b2b1ec2d-dirty (Jul 18 2019 - 09:03:24 -0300)
CPU: Freescale i.MX7ULP rev2.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM: 1 GiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
In: serial at 402D0000
Out: serial at 402D0000
Err: serial at 402D0000
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
ERROR: reserving fdt memory region failed (addr=9ff00000 size=100000)
7416256 bytes read in 383 ms (18.5 MiB/s)
Booting from mmc ...
ERROR: reserving fdt memory region failed (addr=9ff00000 size=100000)
21429 bytes read in 25 ms (836.9 KiB/s)
Kernel image @ 0x60800000 [ 0x000000 - 0x7129c0 ]
## Flattened Device Tree blob at 63000000
Booting using the fdt blob at 0x63000000
ERROR: reserving fdt memory region failed (addr=9ff00000 size=100000)
Using Device Tree in place at 63000000, end 630083b4
Starting kernel ...
Then kernel starts and the following clock warnings are shown:
------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at drivers/clk/imx/clk-pfdv2.c:147
clk_pfd_set_rate+0xc0/0xd8
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.14.98-05986-gbd02ff8b9368-dirty #26
Hardware name: Freescale i.MX7ULP (Device Tree)
[<8010ed04>] (unwind_backtrace) from [<8010b25c>] (show_stack+0x10/0x14)
[<8010b25c>] (show_stack) from [<809d68c4>] (dump_stack+0x78/0x8c)
[<809d68c4>] (dump_stack) from [<8012db64>] (__warn+0xe8/0x100)
[<8012db64>] (__warn) from [<8012dc2c>] (warn_slowpath_null+0x20/0x28)
[<8012dc2c>] (warn_slowpath_null) from [<8046795c>] (clk_pfd_set_rate+0xc0/0xd8)
[<8046795c>] (clk_pfd_set_rate) from [<804608b8>] (clk_change_rate+0x184/0x274)
[<804608b8>] (clk_change_rate) from [<80460c50>]
(clk_core_set_rate_nolock+0x68/0xb0)
[<80460c50>] (clk_core_set_rate_nolock) from [<80460cb8>]
(clk_set_rate+0x20/0x30)
[<80460cb8>] (clk_set_rate) from [<80e3c1e0>]
(imx7ulp_clocks_init+0x10fc/0x11a8)
[<80e3c1e0>] (imx7ulp_clocks_init) from [<80e1d184>] (of_clk_init+0x164/0x1e4)
[<80e1d184>] (of_clk_init) from [<80e044d0>] (time_init+0x24/0x2c)
[<80e044d0>] (time_init) from [<80e00b30>] (start_kernel+0x25c/0x394)
[<80e00b30>] (start_kernel) from [<6000807c>] (0x6000807c)
random: get_random_bytes called from print_oops_end_marker+0x44/0x58
with crng_init=0
---[ end trace f4b5c563367915ee ]---
------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at drivers/clk/imx/clk-pfdv2.c:147
clk_pfd_set_rate+0xc0/0xd8
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W
4.14.98-05986-gbd02ff8b9368-dirty #26
Hardware name: Freescale i.MX7ULP (Device Tree)
[<8010ed04>] (unwind_backtrace) from [<8010b25c>] (show_stack+0x10/0x14)
[<8010b25c>] (show_stack) from [<809d68c4>] (dump_stack+0x78/0x8c)
[<809d68c4>] (dump_stack) from [<8012db64>] (__warn+0xe8/0x100)
[<8012db64>] (__warn) from [<8012dc2c>] (warn_slowpath_null+0x20/0x28)
[<8012dc2c>] (warn_slowpath_null) from [<8046795c>] (clk_pfd_set_rate+0xc0/0xd8)
[<8046795c>] (clk_pfd_set_rate) from [<804608b8>] (clk_change_rate+0x184/0x274)
[<804608b8>] (clk_change_rate) from [<80460c50>]
(clk_core_set_rate_nolock+0x68/0xb0)
[<80460c50>] (clk_core_set_rate_nolock) from [<80460cb8>]
(clk_set_rate+0x20/0x30)
[<80460cb8>] (clk_set_rate) from [<80e3c220>]
(imx7ulp_clocks_init+0x113c/0x11a8)
[<80e3c220>] (imx7ulp_clocks_init) from [<80e1d184>] (of_clk_init+0x164/0x1e4)
[<80e1d184>] (of_clk_init) from [<80e044d0>] (time_init+0x24/0x2c)
[<80e044d0>] (time_init) from [<80e00b30>] (start_kernel+0x25c/0x394)
[<80e00b30>] (start_kernel) from [<6000807c>] (0x6000807c)
---[ end trace f4b5c563367915ef ]---
I do not see the U-Boot error. nor the kernel clock warnings if I use
the NXP 2019.04 U-Boot.
Any ideas on how to solve these problems?
Thanks
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] Support for i.MX7ULP rev B0
2019-07-18 12:16 ` Fabio Estevam
@ 2019-07-19 1:48 ` Peng Fan
2019-07-19 2:04 ` Fabio Estevam
0 siblings, 1 reply; 7+ messages in thread
From: Peng Fan @ 2019-07-19 1:48 UTC (permalink / raw)
To: u-boot
Hi Fabio,
> -----Original Message-----
> From: Fabio Estevam [mailto:festevam at gmail.com]
> Sent: 2019年7月18日 20:17
> To: Peng Fan <peng.fan@nxp.com>
> Cc: Ye Li <ye.li@nxp.com>; Stefano Babic <sbabic@denx.de>; U-Boot-Denx
> <u-boot@lists.denx.de>
> Subject: Re: Support for i.MX7ULP rev B0
>
> Hi Peng and Ye Li,
>
> On Wed, Jul 17, 2019 at 10:20 PM Peng Fan <peng.fan@nxp.com> wrote:
> >
> > Hi Fabio,
> >
> > I already submitted patches 2 months ago, but still not merged.
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.ozlabs.org%2Fcover%2F1099916%2F&data=02%7C01%7Cpeng.fa
> n%40nx
> >
> p.com%7Ca81d1ac73bb74951499008d70b79dc16%7C686ea1d3bc2b4c6fa92
> cd99c5c3
> >
> 01635%7C0%7C0%7C636990490326107629&sdata=0KGKKi2EuOI0ntK8
> utTsUZk1d
> > W4SbbYvDY8TDYMPC1g%3D&reserved=0
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.ozlabs.org%2Fpatch%2F1100269%2F&data=02%7C01%7Cpeng.fa
> n%40nx
> >
> p.com%7Ca81d1ac73bb74951499008d70b79dc16%7C686ea1d3bc2b4c6fa92
> cd99c5c3
> >
> 01635%7C0%7C0%7C636990490326107629&sdata=ILHCC6FZxCpSzPHa
> 4xM2s6z6a
> > MAUsjrspbnuX4xCP7U%3D&reserved=0
>
> I applied all these 20 patches and now I can boot the kernel (from NXP
> 4.14.98 tree). Thanks!
https://patchwork.ozlabs.org/patch/1100265/
This patch needs a small change to apply, because FSL_ESDHC has changed
to FSL_ESDHC_IMX.
Stefano, do you expect to resend the series? Or you could help the small change?
>
> I do see some error messages in U-Boot related to reserving fdt memory:
>
> U-Boot 2019.07-00348-g85b2b1ec2d-dirty (Jul 18 2019 - 09:03:24 -0300)
>
> CPU: Freescale i.MX7ULP rev2.0 at 500 MHz
> Reset cause: POR
> Boot mode: Dual boot
> Model: NXP i.MX7ULP EVK
> DRAM: 1 GiB
> MMC: FSL_SDHC: 0
> Loading Environment from MMC... OK
> In: serial at 402D0000
> Out: serial at 402D0000
> Err: serial at 402D0000
> Net: Net Initialization Skipped
> No ethernet found.
> Hit any key to stop autoboot: 0
> switch to partitions #0, OK
> mmc0 is current device
> ERROR: reserving fdt memory region failed (addr=9ff00000 size=100000)
> 7416256 bytes read in 383 ms (18.5 MiB/s) Booting from mmc ...
> ERROR: reserving fdt memory region failed (addr=9ff00000 size=100000)
> 21429 bytes read in 25 ms (836.9 KiB/s)
> Kernel image @ 0x60800000 [ 0x000000 - 0x7129c0 ] ## Flattened Device
> Tree blob at 63000000
> Booting using the fdt blob at 0x63000000
> ERROR: reserving fdt memory region failed (addr=9ff00000 size=100000)
> Using Device Tree in place at 63000000, end 630083b4
>
> Starting kernel ...
>
>
> Then kernel starts and the following clock warnings are shown:
There is a downstream patch to gate off APll_PFD1/2/3, with that patch applied
you will not see kernel warning.
i.MX7ULP: change USDHC clock rate
Change USDHC0 and USDHC1 per clock source from APLL_PFD1,
and set the APll_PFD1 clock rate to 352.8MHz.
Also gate off APll_PFD1/2/3 before boot OS, otherwise set
the clock rate of APll_PFD1/2/3 during OS boot up will triger
some warning message.
Regards,
Peng.
>
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 0 at drivers/clk/imx/clk-pfdv2.c:147
> clk_pfd_set_rate+0xc0/0xd8
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted
> 4.14.98-05986-gbd02ff8b9368-dirty #26 Hardware name: Freescale
> i.MX7ULP (Device Tree) [<8010ed04>] (unwind_backtrace) from [<8010b25c>]
> (show_stack+0x10/0x14) [<8010b25c>] (show_stack) from [<809d68c4>]
> (dump_stack+0x78/0x8c) [<809d68c4>] (dump_stack) from [<8012db64>]
> (__warn+0xe8/0x100) [<8012db64>] (__warn) from [<8012dc2c>]
> (warn_slowpath_null+0x20/0x28) [<8012dc2c>] (warn_slowpath_null) from
> [<8046795c>] (clk_pfd_set_rate+0xc0/0xd8) [<8046795c>] (clk_pfd_set_rate)
> from [<804608b8>] (clk_change_rate+0x184/0x274) [<804608b8>]
> (clk_change_rate) from [<80460c50>]
> (clk_core_set_rate_nolock+0x68/0xb0)
> [<80460c50>] (clk_core_set_rate_nolock) from [<80460cb8>]
> (clk_set_rate+0x20/0x30)
> [<80460cb8>] (clk_set_rate) from [<80e3c1e0>]
> (imx7ulp_clocks_init+0x10fc/0x11a8)
> [<80e3c1e0>] (imx7ulp_clocks_init) from [<80e1d184>]
> (of_clk_init+0x164/0x1e4) [<80e1d184>] (of_clk_init) from [<80e044d0>]
> (time_init+0x24/0x2c) [<80e044d0>] (time_init) from [<80e00b30>]
> (start_kernel+0x25c/0x394) [<80e00b30>] (start_kernel) from [<6000807c>]
> (0x6000807c)
> random: get_random_bytes called from print_oops_end_marker+0x44/0x58
> with crng_init=0 ---[ end trace f4b5c563367915ee ]--- ------------[ cut
> here ]------------
> WARNING: CPU: 0 PID: 0 at drivers/clk/imx/clk-pfdv2.c:147
> clk_pfd_set_rate+0xc0/0xd8
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W
> 4.14.98-05986-gbd02ff8b9368-dirty #26
> Hardware name: Freescale i.MX7ULP (Device Tree) [<8010ed04>]
> (unwind_backtrace) from [<8010b25c>] (show_stack+0x10/0x14)
> [<8010b25c>] (show_stack) from [<809d68c4>] (dump_stack+0x78/0x8c)
> [<809d68c4>] (dump_stack) from [<8012db64>] (__warn+0xe8/0x100)
> [<8012db64>] (__warn) from [<8012dc2c>] (warn_slowpath_null+0x20/0x28)
> [<8012dc2c>] (warn_slowpath_null) from [<8046795c>]
> (clk_pfd_set_rate+0xc0/0xd8) [<8046795c>] (clk_pfd_set_rate) from
> [<804608b8>] (clk_change_rate+0x184/0x274) [<804608b8>]
> (clk_change_rate) from [<80460c50>]
> (clk_core_set_rate_nolock+0x68/0xb0)
> [<80460c50>] (clk_core_set_rate_nolock) from [<80460cb8>]
> (clk_set_rate+0x20/0x30)
> [<80460cb8>] (clk_set_rate) from [<80e3c220>]
> (imx7ulp_clocks_init+0x113c/0x11a8)
> [<80e3c220>] (imx7ulp_clocks_init) from [<80e1d184>]
> (of_clk_init+0x164/0x1e4) [<80e1d184>] (of_clk_init) from [<80e044d0>]
> (time_init+0x24/0x2c) [<80e044d0>] (time_init) from [<80e00b30>]
> (start_kernel+0x25c/0x394) [<80e00b30>] (start_kernel) from [<6000807c>]
> (0x6000807c) ---[ end trace f4b5c563367915ef ]---
>
> I do not see the U-Boot error. nor the kernel clock warnings if I use the NXP
> 2019.04 U-Boot.
>
> Any ideas on how to solve these problems?
>
> Thanks
^ permalink raw reply [flat|nested] 7+ messages in thread* [U-Boot] Support for i.MX7ULP rev B0
2019-07-19 1:48 ` Peng Fan
@ 2019-07-19 2:04 ` Fabio Estevam
2019-07-19 2:11 ` Peng Fan
0 siblings, 1 reply; 7+ messages in thread
From: Fabio Estevam @ 2019-07-19 2:04 UTC (permalink / raw)
To: u-boot
Hi Peng,
On Thu, Jul 18, 2019 at 10:48 PM Peng Fan <peng.fan@nxp.com> wrote:
> There is a downstream patch to gate off APll_PFD1/2/3, with that patch applied
> you will not see kernel warning.
>
> i.MX7ULP: change USDHC clock rate
>
> Change USDHC0 and USDHC1 per clock source from APLL_PFD1,
> and set the APll_PFD1 clock rate to 352.8MHz.
>
> Also gate off APll_PFD1/2/3 before boot OS, otherwise set
> the clock rate of APll_PFD1/2/3 during OS boot up will triger
> some warning message.
Thanks for the clarification. We can upstream this one later then.
Any insight about the "ERROR: reserving fdt memory region failed" messages?
Thanks
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] Support for i.MX7ULP rev B0
2019-07-19 2:04 ` Fabio Estevam
@ 2019-07-19 2:11 ` Peng Fan
0 siblings, 0 replies; 7+ messages in thread
From: Peng Fan @ 2019-07-19 2:11 UTC (permalink / raw)
To: u-boot
> Subject: Re: Support for i.MX7ULP rev B0
>
> Hi Peng,
>
> On Thu, Jul 18, 2019 at 10:48 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> > There is a downstream patch to gate off APll_PFD1/2/3, with that patch
> > applied you will not see kernel warning.
> >
> > i.MX7ULP: change USDHC clock rate
> >
> > Change USDHC0 and USDHC1 per clock source from APLL_PFD1,
> > and set the APll_PFD1 clock rate to 352.8MHz.
> >
> > Also gate off APll_PFD1/2/3 before boot OS, otherwise set
> > the clock rate of APll_PFD1/2/3 during OS boot up will triger
> > some warning message.
>
> Thanks for the clarification. We can upstream this one later then.
>
> Any insight about the "ERROR: reserving fdt memory region failed" messages?
It is because the rpmsg reserved region in Linux dts conflicts with uboot region.
It not impact Linux boot.
Regards,
Peng.
>
> Thanks
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-07-19 2:11 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-17 16:59 [U-Boot] Support for i.MX7ULP rev B0 Fabio Estevam
2019-07-18 1:20 ` Peng Fan
2019-07-18 1:46 ` Fabio Estevam
2019-07-18 12:16 ` Fabio Estevam
2019-07-19 1:48 ` Peng Fan
2019-07-19 2:04 ` Fabio Estevam
2019-07-19 2:11 ` Peng Fan
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